1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=P5600
4 define void @add_v16i8(ptr %a, ptr %b, ptr %c) {
5 ; P5600-LABEL: add_v16i8:
6 ; P5600: # %bb.0: # %entry
7 ; P5600-NEXT: ld.b $w1, 0($4)
8 ; P5600-NEXT: ld.b $w0, 0($5)
9 ; P5600-NEXT: addv.b $w0, $w0, $w1
10 ; P5600-NEXT: st.b $w0, 0($6)
14 %0 = load <16 x i8>, ptr %a, align 16
15 %1 = load <16 x i8>, ptr %b, align 16
16 %add = add <16 x i8> %1, %0
17 store <16 x i8> %add, ptr %c, align 16
21 define void @add_v8i16(ptr %a, ptr %b, ptr %c) {
22 ; P5600-LABEL: add_v8i16:
23 ; P5600: # %bb.0: # %entry
24 ; P5600-NEXT: ld.h $w1, 0($4)
25 ; P5600-NEXT: ld.h $w0, 0($5)
26 ; P5600-NEXT: addv.h $w0, $w0, $w1
27 ; P5600-NEXT: st.h $w0, 0($6)
31 %0 = load <8 x i16>, ptr %a, align 16
32 %1 = load <8 x i16>, ptr %b, align 16
33 %add = add <8 x i16> %1, %0
34 store <8 x i16> %add, ptr %c, align 16
38 define void @add_v4i32(ptr %a, ptr %b, ptr %c) {
39 ; P5600-LABEL: add_v4i32:
40 ; P5600: # %bb.0: # %entry
41 ; P5600-NEXT: ld.w $w1, 0($4)
42 ; P5600-NEXT: ld.w $w0, 0($5)
43 ; P5600-NEXT: addv.w $w0, $w0, $w1
44 ; P5600-NEXT: st.w $w0, 0($6)
48 %0 = load <4 x i32>, ptr %a, align 16
49 %1 = load <4 x i32>, ptr %b, align 16
50 %add = add <4 x i32> %1, %0
51 store <4 x i32> %add, ptr %c, align 16
55 define void @add_v2i64(ptr %a, ptr %b, ptr %c) {
56 ; P5600-LABEL: add_v2i64:
57 ; P5600: # %bb.0: # %entry
58 ; P5600-NEXT: ld.d $w1, 0($4)
59 ; P5600-NEXT: ld.d $w0, 0($5)
60 ; P5600-NEXT: addv.d $w0, $w0, $w1
61 ; P5600-NEXT: st.d $w0, 0($6)
65 %0 = load <2 x i64>, ptr %a, align 16
66 %1 = load <2 x i64>, ptr %b, align 16
67 %add = add <2 x i64> %1, %0
68 store <2 x i64> %add, ptr %c, align 16