1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv32 -run-pass=instruction-select %s -o - \
6 define void @store_i8(i8 %val, ptr %addr) { ret void }
7 define void @store_i16(i16 %val, ptr %addr) { ret void }
8 define void @store_i32(i32 %val, ptr %addr) { ret void }
9 define void @store_p0(ptr %val, ptr %addr) { ret void }
10 define void @store_fi_i32(ptr %val) {
14 define void @store_fi_gep_i32(ptr %val) {
15 %ptr0 = alloca [2 x i32]
18 define void @store_gep_i32(i32 %val, ptr %addr) { ret void }
24 tracksRegLiveness: true
27 liveins: $x10, $x11, $x11
29 ; CHECK-LABEL: name: store_i8
30 ; CHECK: liveins: $x10, $x11, $x11
32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
33 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
34 ; CHECK-NEXT: SB [[COPY]], [[COPY1]], 0 :: (store (s8))
35 ; CHECK-NEXT: PseudoRET
36 %0:gprb(s32) = COPY $x10
37 %1:gprb(p0) = COPY $x11
38 G_STORE %0(s32), %1(p0) :: (store (s8))
46 tracksRegLiveness: true
51 ; CHECK-LABEL: name: store_i16
52 ; CHECK: liveins: $x10, $x11
54 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
55 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
56 ; CHECK-NEXT: SH [[COPY]], [[COPY1]], 0 :: (store (s16))
57 ; CHECK-NEXT: PseudoRET
58 %0:gprb(s32) = COPY $x10
59 %1:gprb(p0) = COPY $x11
60 G_STORE %0(s32), %1(p0) :: (store (s16))
68 tracksRegLiveness: true
73 ; CHECK-LABEL: name: store_i32
74 ; CHECK: liveins: $x10, $x11
76 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
77 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
78 ; CHECK-NEXT: SW [[COPY]], [[COPY1]], 0 :: (store (s32))
79 ; CHECK-NEXT: PseudoRET
80 %0:gprb(s32) = COPY $x10
81 %1:gprb(p0) = COPY $x11
82 G_STORE %0(s32), %1(p0) :: (store (s32))
90 tracksRegLiveness: true
95 ; CHECK-LABEL: name: store_p0
96 ; CHECK: liveins: $x10, $x11
98 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
99 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
100 ; CHECK-NEXT: SW [[COPY]], [[COPY1]], 0 :: (store (p0))
101 ; CHECK-NEXT: PseudoRET
102 %0:gprb(p0) = COPY $x10
103 %1:gprb(p0) = COPY $x11
104 G_STORE %0(p0), %1(p0) :: (store (p0))
111 regBankSelected: true
112 tracksRegLiveness: true
115 - { id: 0, name: ptr0, offset: 0, size: 4, alignment: 4 }
121 ; CHECK-LABEL: name: store_fi_i32
122 ; CHECK: liveins: $x10
124 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
125 ; CHECK-NEXT: SW [[COPY]], %stack.0.ptr0, 0 :: (store (s32))
126 ; CHECK-NEXT: PseudoRET
127 %0:gprb(s32) = COPY $x10
128 %1:gprb(p0) = G_FRAME_INDEX %stack.0.ptr0
129 G_STORE %0(s32), %1(p0) :: (store (s32))
134 name: store_fi_gep_i32
136 regBankSelected: true
137 tracksRegLiveness: true
140 - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 4 }
146 ; CHECK-LABEL: name: store_fi_gep_i32
147 ; CHECK: liveins: $x10
149 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
150 ; CHECK-NEXT: SW [[COPY]], %stack.0.ptr0, 4 :: (store (s32))
151 ; CHECK-NEXT: PseudoRET
152 %0:gprb(s32) = COPY $x10
153 %1:gprb(p0) = G_FRAME_INDEX %stack.0.ptr0
154 %2:gprb(s32) = G_CONSTANT i32 4
155 %3:gprb(p0) = G_PTR_ADD %1(p0), %2(s32)
156 G_STORE %0(s32), %3(p0) :: (store (s32))
163 regBankSelected: true
164 tracksRegLiveness: true
169 ; CHECK-LABEL: name: store_gep_i32
170 ; CHECK: liveins: $x10, $x11
172 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
173 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
174 ; CHECK-NEXT: SW [[COPY]], [[COPY1]], 4 :: (store (s32))
175 ; CHECK-NEXT: PseudoRET
176 %0:gprb(s32) = COPY $x10
177 %1:gprb(p0) = COPY $x11
178 %2:gprb(s32) = G_CONSTANT i32 4
179 %3:gprb(p0) = G_PTR_ADD %1(p0), %2(s32)
180 G_STORE %0(s32), %3(p0) :: (store (s32))