1 ; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -verify-machineinstrs < %s | FileCheck %s
4 ; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
6 ; CHECK-NOT: mov x[[REG]], xzr
7 define i64 @f_XX(i64 %n, ptr nocapture readonly %P) {
9 %tobool = icmp eq i64 %n, 0
10 br i1 %tobool, label %if.end, label %if.then
12 if.then: ; preds = %entry
16 if.end: ; preds = %entry, %if.then
17 %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
22 ; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
24 ; CHECK-NOT: mov w[[REG]], wzr
25 define i32 @f_WW(i32 %n, ptr nocapture readonly %P) {
27 %tobool = icmp eq i32 %n, 0
28 br i1 %tobool, label %if.end, label %if.then
30 if.then: ; preds = %entry
34 if.end: ; preds = %entry, %if.then
35 %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
40 ; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
42 ; CHECK-NOT: mov w[[REG]], wzr
43 define i32 @f_XW(i64 %n, ptr nocapture readonly %P) {
45 %tobool = icmp eq i64 %n, 0
46 br i1 %tobool, label %if.end, label %if.then
48 if.then: ; preds = %entry
52 if.end: ; preds = %entry, %if.then
53 %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
58 ; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
60 ; CHECK: mov x[[REG]], xzr
61 ; Do not remove the mov in this case because we do not know if the upper bits
62 ; of the X register are zero.
63 define i64 @f_WX(i32 %n, ptr nocapture readonly %P) {
65 %tobool = icmp eq i32 %n, 0
66 br i1 %tobool, label %if.end, label %if.then
68 if.then: ; preds = %entry
72 if.end: ; preds = %entry, %if.then
73 %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
77 ; CHECK-LABEL: test_superreg:
78 ; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
80 ; CHECK: str x[[REG]], [x1]
81 ; CHECK-NOT: mov w[[REG]], wzr
82 ; Because we returned w0 but x0 was marked live-in to the block, we didn't
83 ; remove the <kill> on the str leading to a verification failure.
84 define i32 @test_superreg(i64 %in, ptr %dest) {
85 %tst = icmp eq i64 %in, 0
86 br i1 %tst, label %true, label %false
92 store volatile i64 %in, ptr %dest