1 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a57 -mattr=+arith-bcc-fusion | FileCheck %s --check-prefix=FUSEBCC
2 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cortex-a57 -mattr=+arith-cbz-fusion | FileCheck %s --check-prefix=FUSECBZ
3 ; RUN: llc -o - %s -mtriple=aarch64-unknown -aarch64-enable-cond-br-tune=false -mcpu=cyclone | FileCheck %s --check-prefix=FUSEBCC --check-prefix=FUSECBZ
5 target triple = "aarch64-unknown"
7 declare void @foobar(i32 %v0, i32 %v1)
9 ; Make sure cmp is scheduled in front of bcc
10 ; FUSEBCC-LABEL: test_cmp_bcc:
11 ; FUSEBCC: cmp {{w[0-9]+}}, #13
12 ; FUSEBCC-NEXT: b.ne {{.?LBB[0-9_]+}}
13 define void @test_cmp_bcc(i32 %a0, i32 %a1) {
15 %cond = icmp eq i32 %a0, 13
17 br i1 %cond, label %if, label %exit
20 call void @foobar(i32 %v1, i32 %a0)
24 call void @foobar(i32 %a0, i32 %v1)
28 ; Make sure sub is scheduled in front of cbnz
29 ; FUSECBZ-LABEL: test_sub_cbz:
30 ; FUSECBZ: sub [[R:w[0-9]+]], {{w[0-9]+}}, #13
31 ; FUSECBZ-NEXT: cbnz [[R]], {{.?LBB[0-9_]+}}
32 define void @test_sub_cbz(i32 %a0, i32 %a1) {
34 ; except for the fusion opportunity the sub/add should be equal so the
35 ; scheduler would leave them in source order if it weren't for the scheduling
37 %cond = icmp eq i32 %v0, 0
39 br i1 %cond, label %if, label %exit
42 call void @foobar(i32 %v1, i32 %v0)
46 call void @foobar(i32 %v0, i32 %v1)