1 ; RUN: llc -march=hexagon < %s | FileCheck %s
2 ; Make sure that the assembler mapped compare instructions are correctly generated.
4 @c = common global i32 0, align 4
6 define i32 @test1(i32 %a, i32 %b) nounwind {
10 %cmp = icmp slt i32 %a, 100
11 br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
13 entry.if.end_crit_edge:
14 %.pre = load i32, ptr @c, align 4
18 %sub = add nsw i32 %a, -10
19 store i32 %sub, ptr @c, align 4
23 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
27 define i32 @test2(i32 %a, i32 %b) nounwind {
31 %cmp = icmp sge i32 %a, %b
32 br i1 %cmp, label %entry.if.end_crit_edge, label %if.then
34 entry.if.end_crit_edge:
35 %.pre = load i32, ptr @c, align 4
39 %sub = add nsw i32 %a, -10
40 store i32 %sub, ptr @c, align 4
44 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
48 define i32 @test4(i32 %a, i32 %b) nounwind {
52 %cmp = icmp uge i32 %a, %b
53 br i1 %cmp, label %entry.if.end_crit_edge, label %if.then
55 entry.if.end_crit_edge:
56 %.pre = load i32, ptr @c, align 4
60 %sub = add i32 %a, -10
61 store i32 %sub, ptr @c, align 4
65 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
69 define i32 @test5(i32 %a, i32 %b) nounwind {
72 %cmp = icmp uge i32 %a, 29999
73 br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
75 entry.if.end_crit_edge:
76 %.pre = load i32, ptr @c, align 4
80 %sub = add i32 %a, -10
81 store i32 %sub, ptr @c, align 4
85 %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]