1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefixes=ALL,LA32
3 ; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefixes=ALL,LA64
5 define void @foo() noreturn nounwind {
7 ; ALL: # %bb.0: # %entry
8 ; ALL-NEXT: .p2align 4, , 16
9 ; ALL-NEXT: .LBB0_1: # %loop
10 ; ALL-NEXT: # =>This Inner Loop Header: Depth=1
18 define void @foo_br_eq(i32 %a, ptr %b) nounwind {
19 ; LA32-LABEL: foo_br_eq:
21 ; LA32-NEXT: ld.w $a2, $a1, 0
22 ; LA32-NEXT: beq $a2, $a0, .LBB1_2
23 ; LA32-NEXT: # %bb.1: # %test
24 ; LA32-NEXT: ld.w $zero, $a1, 0
25 ; LA32-NEXT: .LBB1_2: # %end
28 ; LA64-LABEL: foo_br_eq:
30 ; LA64-NEXT: ld.w $a2, $a1, 0
31 ; LA64-NEXT: addi.w $a0, $a0, 0
32 ; LA64-NEXT: beq $a2, $a0, .LBB1_2
33 ; LA64-NEXT: # %bb.1: # %test
34 ; LA64-NEXT: ld.w $zero, $a1, 0
35 ; LA64-NEXT: .LBB1_2: # %end
37 %val = load volatile i32, ptr %b
38 %cc = icmp eq i32 %val, %a
39 br i1 %cc, label %end, label %test
41 %tmp = load volatile i32, ptr %b
48 define void @foo_br_ne(i32 %a, ptr %b) nounwind {
49 ; LA32-LABEL: foo_br_ne:
51 ; LA32-NEXT: ld.w $a2, $a1, 0
52 ; LA32-NEXT: bne $a2, $a0, .LBB2_2
53 ; LA32-NEXT: # %bb.1: # %test
54 ; LA32-NEXT: ld.w $zero, $a1, 0
55 ; LA32-NEXT: .LBB2_2: # %end
58 ; LA64-LABEL: foo_br_ne:
60 ; LA64-NEXT: ld.w $a2, $a1, 0
61 ; LA64-NEXT: addi.w $a0, $a0, 0
62 ; LA64-NEXT: bne $a2, $a0, .LBB2_2
63 ; LA64-NEXT: # %bb.1: # %test
64 ; LA64-NEXT: ld.w $zero, $a1, 0
65 ; LA64-NEXT: .LBB2_2: # %end
67 %val = load volatile i32, ptr %b
68 %cc = icmp ne i32 %val, %a
69 br i1 %cc, label %end, label %test
71 %tmp = load volatile i32, ptr %b
78 define void @foo_br_slt(i32 %a, ptr %b) nounwind {
79 ; LA32-LABEL: foo_br_slt:
81 ; LA32-NEXT: ld.w $a2, $a1, 0
82 ; LA32-NEXT: blt $a2, $a0, .LBB3_2
83 ; LA32-NEXT: # %bb.1: # %test
84 ; LA32-NEXT: ld.w $zero, $a1, 0
85 ; LA32-NEXT: .LBB3_2: # %end
88 ; LA64-LABEL: foo_br_slt:
90 ; LA64-NEXT: ld.w $a2, $a1, 0
91 ; LA64-NEXT: addi.w $a0, $a0, 0
92 ; LA64-NEXT: blt $a2, $a0, .LBB3_2
93 ; LA64-NEXT: # %bb.1: # %test
94 ; LA64-NEXT: ld.w $zero, $a1, 0
95 ; LA64-NEXT: .LBB3_2: # %end
97 %val = load volatile i32, ptr %b
98 %cc = icmp slt i32 %val, %a
99 br i1 %cc, label %end, label %test
101 %tmp = load volatile i32, ptr %b
108 define void @foo_br_sge(i32 %a, ptr %b) nounwind {
109 ; LA32-LABEL: foo_br_sge:
111 ; LA32-NEXT: ld.w $a2, $a1, 0
112 ; LA32-NEXT: bge $a2, $a0, .LBB4_2
113 ; LA32-NEXT: # %bb.1: # %test
114 ; LA32-NEXT: ld.w $zero, $a1, 0
115 ; LA32-NEXT: .LBB4_2: # %end
118 ; LA64-LABEL: foo_br_sge:
120 ; LA64-NEXT: ld.w $a2, $a1, 0
121 ; LA64-NEXT: addi.w $a0, $a0, 0
122 ; LA64-NEXT: bge $a2, $a0, .LBB4_2
123 ; LA64-NEXT: # %bb.1: # %test
124 ; LA64-NEXT: ld.w $zero, $a1, 0
125 ; LA64-NEXT: .LBB4_2: # %end
127 %val = load volatile i32, ptr %b
128 %cc = icmp sge i32 %val, %a
129 br i1 %cc, label %end, label %test
131 %tmp = load volatile i32, ptr %b
138 define void @foo_br_ult(i32 %a, ptr %b) nounwind {
139 ; LA32-LABEL: foo_br_ult:
141 ; LA32-NEXT: ld.w $a2, $a1, 0
142 ; LA32-NEXT: bltu $a2, $a0, .LBB5_2
143 ; LA32-NEXT: # %bb.1: # %test
144 ; LA32-NEXT: ld.w $zero, $a1, 0
145 ; LA32-NEXT: .LBB5_2: # %end
148 ; LA64-LABEL: foo_br_ult:
150 ; LA64-NEXT: ld.w $a2, $a1, 0
151 ; LA64-NEXT: addi.w $a0, $a0, 0
152 ; LA64-NEXT: bltu $a2, $a0, .LBB5_2
153 ; LA64-NEXT: # %bb.1: # %test
154 ; LA64-NEXT: ld.w $zero, $a1, 0
155 ; LA64-NEXT: .LBB5_2: # %end
157 %val = load volatile i32, ptr %b
158 %cc = icmp ult i32 %val, %a
159 br i1 %cc, label %end, label %test
161 %tmp = load volatile i32, ptr %b
168 define void @foo_br_uge(i32 %a, ptr %b) nounwind {
169 ; LA32-LABEL: foo_br_uge:
171 ; LA32-NEXT: ld.w $a2, $a1, 0
172 ; LA32-NEXT: bgeu $a2, $a0, .LBB6_2
173 ; LA32-NEXT: # %bb.1: # %test
174 ; LA32-NEXT: ld.w $zero, $a1, 0
175 ; LA32-NEXT: .LBB6_2: # %end
178 ; LA64-LABEL: foo_br_uge:
180 ; LA64-NEXT: ld.w $a2, $a1, 0
181 ; LA64-NEXT: addi.w $a0, $a0, 0
182 ; LA64-NEXT: bgeu $a2, $a0, .LBB6_2
183 ; LA64-NEXT: # %bb.1: # %test
184 ; LA64-NEXT: ld.w $zero, $a1, 0
185 ; LA64-NEXT: .LBB6_2: # %end
187 %val = load volatile i32, ptr %b
188 %cc = icmp uge i32 %val, %a
189 br i1 %cc, label %end, label %test
191 %tmp = load volatile i32, ptr %b
198 ;; Check for condition codes that don't have a matching instruction.
199 define void @foo_br_sgt(i32 %a, ptr %b) nounwind {
200 ; LA32-LABEL: foo_br_sgt:
202 ; LA32-NEXT: ld.w $a2, $a1, 0
203 ; LA32-NEXT: blt $a0, $a2, .LBB7_2
204 ; LA32-NEXT: # %bb.1: # %test
205 ; LA32-NEXT: ld.w $zero, $a1, 0
206 ; LA32-NEXT: .LBB7_2: # %end
209 ; LA64-LABEL: foo_br_sgt:
211 ; LA64-NEXT: ld.w $a2, $a1, 0
212 ; LA64-NEXT: addi.w $a0, $a0, 0
213 ; LA64-NEXT: blt $a0, $a2, .LBB7_2
214 ; LA64-NEXT: # %bb.1: # %test
215 ; LA64-NEXT: ld.w $zero, $a1, 0
216 ; LA64-NEXT: .LBB7_2: # %end
218 %val = load volatile i32, ptr %b
219 %cc = icmp sgt i32 %val, %a
220 br i1 %cc, label %end, label %test
222 %tmp = load volatile i32, ptr %b
229 define void @foo_br_sle(i32 %a, ptr %b) nounwind {
230 ; LA32-LABEL: foo_br_sle:
232 ; LA32-NEXT: ld.w $a2, $a1, 0
233 ; LA32-NEXT: bge $a0, $a2, .LBB8_2
234 ; LA32-NEXT: # %bb.1: # %test
235 ; LA32-NEXT: ld.w $zero, $a1, 0
236 ; LA32-NEXT: .LBB8_2: # %end
239 ; LA64-LABEL: foo_br_sle:
241 ; LA64-NEXT: ld.w $a2, $a1, 0
242 ; LA64-NEXT: addi.w $a0, $a0, 0
243 ; LA64-NEXT: bge $a0, $a2, .LBB8_2
244 ; LA64-NEXT: # %bb.1: # %test
245 ; LA64-NEXT: ld.w $zero, $a1, 0
246 ; LA64-NEXT: .LBB8_2: # %end
248 %val = load volatile i32, ptr %b
249 %cc = icmp sle i32 %val, %a
250 br i1 %cc, label %end, label %test
252 %tmp = load volatile i32, ptr %b
259 define void @foo_br_ugt(i32 %a, ptr %b) nounwind {
260 ; LA32-LABEL: foo_br_ugt:
262 ; LA32-NEXT: ld.w $a2, $a1, 0
263 ; LA32-NEXT: bltu $a0, $a2, .LBB9_2
264 ; LA32-NEXT: # %bb.1: # %test
265 ; LA32-NEXT: ld.w $zero, $a1, 0
266 ; LA32-NEXT: .LBB9_2: # %end
269 ; LA64-LABEL: foo_br_ugt:
271 ; LA64-NEXT: ld.w $a2, $a1, 0
272 ; LA64-NEXT: addi.w $a0, $a0, 0
273 ; LA64-NEXT: bltu $a0, $a2, .LBB9_2
274 ; LA64-NEXT: # %bb.1: # %test
275 ; LA64-NEXT: ld.w $zero, $a1, 0
276 ; LA64-NEXT: .LBB9_2: # %end
278 %val = load volatile i32, ptr %b
279 %cc = icmp ugt i32 %val, %a
280 br i1 %cc, label %end, label %test
282 %tmp = load volatile i32, ptr %b
289 define void @foo_br_ule(i32 %a, ptr %b) nounwind {
290 ; LA32-LABEL: foo_br_ule:
292 ; LA32-NEXT: ld.w $a2, $a1, 0
293 ; LA32-NEXT: bgeu $a0, $a2, .LBB10_2
294 ; LA32-NEXT: # %bb.1: # %test
295 ; LA32-NEXT: ld.w $zero, $a1, 0
296 ; LA32-NEXT: .LBB10_2: # %end
299 ; LA64-LABEL: foo_br_ule:
301 ; LA64-NEXT: ld.w $a2, $a1, 0
302 ; LA64-NEXT: addi.w $a0, $a0, 0
303 ; LA64-NEXT: bgeu $a0, $a2, .LBB10_2
304 ; LA64-NEXT: # %bb.1: # %test
305 ; LA64-NEXT: ld.w $zero, $a1, 0
306 ; LA64-NEXT: .LBB10_2: # %end
308 %val = load volatile i32, ptr %b
309 %cc = icmp ule i32 %val, %a
310 br i1 %cc, label %end, label %test
312 %tmp = load volatile i32, ptr %b
319 ;; Check the case of a branch where the condition was generated in another
321 define void @foo_br_cc(ptr %a, i1 %cc) nounwind {
322 ; ALL-LABEL: foo_br_cc:
324 ; ALL-NEXT: ld.w $zero, $a0, 0
325 ; ALL-NEXT: andi $a1, $a1, 1
326 ; ALL-NEXT: bnez $a1, .LBB11_2
327 ; ALL-NEXT: # %bb.1: # %test
328 ; ALL-NEXT: ld.w $zero, $a0, 0
329 ; ALL-NEXT: .LBB11_2: # %end
331 %val = load volatile i32, ptr %a
332 br i1 %cc, label %end, label %test
334 %tmp = load volatile i32, ptr %a