1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_50 -verify-machineinstrs | FileCheck %s
2 ; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_50 -verify-machineinstrs | %ptxas-verify %}
4 ; calls with a bitcasted function symbol should be fine, but in combination with
5 ; a byval attribute were causing a segfault during isel. This testcase was
6 ; reduced from a SYCL kernel using aggregate types which ended up being passed
9 target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
10 target triple = "nvptx64-nvidia-cuda"
12 %"class.complex" = type { %"class.sycl::_V1::detail::half_impl::half", %"class.sycl::_V1::detail::half_impl::half" }
13 %"class.sycl::_V1::detail::half_impl::half" = type { half }
14 %complex_half = type { half, half }
16 ; CHECK: .param .align 2 .b8 param2[4];
17 ; CHECK: st.param.b16 [param2+0], %rs1;
18 ; CHECK: st.param.b16 [param2+2], %rs2;
19 ; CHECK: .param .align 2 .b8 retval0[4];
20 ; CHECK: call.uni (retval0),
21 ; CHECK-NEXT: _Z20__spirv_GroupCMulKHRjjN5__spv12complex_halfE,
22 define weak_odr void @foo() {
24 %call.i.i.i = tail call %"class.complex" @_Z20__spirv_GroupCMulKHRjjN5__spv12complex_halfE(i32 0, i32 0, ptr byval(%"class.complex") null)
28 ;; Function pointers can escape, so we have to use a conservative
29 ;; alignment for a function that has address taken.
31 declare ptr @usefp(ptr %fp)
32 ; CHECK: .func callee(
33 ; CHECK-NEXT: .param .align 2 .b8 callee_param_0[4]
34 define internal void @callee(ptr byval(%"class.complex") %byval_arg) {
38 %fp = call ptr @usefp(ptr @callee)
39 ; CHECK: .param .align 2 .b8 param0[4];
40 ; CHECK: st.param.b16 [param0+0], %rs1;
41 ; CHECK: st.param.b16 [param0+2], %rs2;
42 ; CHECK: .callprototype ()_ (.param .align 2 .b8 _[4]);
43 call void %fp(ptr byval(%"class.complex") null)
47 declare %complex_half @_Z20__spirv_GroupCMulKHRjjN5__spv12complex_halfE(i32, i32, ptr byval(%"class.complex"))