1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
3 ; RUN: -mtriple powerpc64-ibm-aix-xcoff -mattr=+aix-small-local-exec-tls < %s \
4 ; RUN: | FileCheck %s --check-prefix=SMALL-LOCAL-EXEC-SMALLCM64
5 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
6 ; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large \
7 ; RUN: -mattr=+aix-small-local-exec-tls < %s | FileCheck %s \
8 ; RUN: --check-prefix=SMALL-LOCAL-EXEC-LARGECM64
10 @ThreadLocalVarInit = thread_local(localexec) global i32 1, align 4
11 @VarInit = local_unnamed_addr global i32 87, align 4
12 @IThreadLocalVarInit = internal thread_local(localexec) global i32 1, align 4
13 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1
14 %struct.anon = type { i32 }
15 @ThreadLocalStruct = thread_local(localexec) global %struct.anon zeroinitializer, align 1
16 @a = thread_local(localexec) global [87 x i32] zeroinitializer, align 4
18 define nonnull ptr @AddrTest1() local_unnamed_addr #0 {
19 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: AddrTest1:
20 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
21 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: la r3, a[TL]@le+12(r13)
22 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
24 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: AddrTest1:
25 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
26 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: la r3, a[TL]@le+12(r13)
27 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
29 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
30 %arrayidx = getelementptr inbounds [87 x i32], ptr %0, i64 0, i64 3
34 define signext i32 @testUnaligned() {
35 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: testUnaligned:
36 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
37 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: la r3, ThreadLocalStruct[TL]@le(r13)
38 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwa r3, 0(r3)
39 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
41 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: testUnaligned:
42 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
43 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: la r3, ThreadLocalStruct[TL]@le(r13)
44 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwa r3, 0(r3)
45 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
47 %0 = call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @ThreadLocalStruct)
48 %x = getelementptr inbounds %struct.anon, ptr %0, i32 0, i32 0
49 %1 = load i32, ptr %x, align 1
53 define void @storeITLInit(i32 noundef signext %x) {
54 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: storeITLInit:
55 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
56 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: stw r3, IThreadLocalVarInit[TL]@le(r13)
57 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
59 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: storeITLInit:
60 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
61 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: stw r3, IThreadLocalVarInit[TL]@le(r13)
62 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
64 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
65 store i32 %x, ptr %0, align 4
69 define void @storeTLInit(i32 noundef signext %x) {
70 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: storeTLInit:
71 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
72 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: stw r3, ThreadLocalVarInit[TL]@le(r13)
73 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
75 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: storeTLInit:
76 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
77 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: stw r3, ThreadLocalVarInit[TL]@le(r13)
78 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
80 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
81 store i32 %x, ptr %0, align 4
85 define signext i32 @loadITLInit() {
86 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadITLInit:
87 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
88 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwa r3, IThreadLocalVarInit[TL]@le(r13)
89 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
91 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadITLInit:
92 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
93 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwa r3, IThreadLocalVarInit[TL]@le(r13)
94 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
96 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
97 %1 = load i32, ptr %0, align 4
101 define signext i32 @loadITLInit2() {
102 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadITLInit2:
103 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
104 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ld r4, L..C0(r2) # @VarInit
105 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwz r3, IThreadLocalVarInit[TL]@le(r13)
106 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwz r4, 0(r4)
107 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: add r3, r4, r3
108 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: extsw r3, r3
109 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
111 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadITLInit2:
112 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
113 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addis r4, L..C0@u(r2)
114 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwz r3, IThreadLocalVarInit[TL]@le(r13)
115 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r4, L..C0@l(r4)
116 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwz r4, 0(r4)
117 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: add r3, r4, r3
118 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: extsw r3, r3
119 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
121 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
122 %1 = load i32, ptr %0, align 4
123 %2 = load i32, ptr @VarInit, align 4
124 %add = add nsw i32 %2, %1
128 define signext i32 @loadTLInit() {
129 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadTLInit:
130 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
131 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwa r3, ThreadLocalVarInit[TL]@le(r13)
132 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
134 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadTLInit:
135 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
136 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwa r3, ThreadLocalVarInit[TL]@le(r13)
137 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
139 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
140 %1 = load i32, ptr %0, align 4
144 define signext i32 @loadTLInit2() {
145 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadTLInit2:
146 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
147 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: ld r4, L..C0(r2) # @VarInit
148 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwz r3, ThreadLocalVarInit[TL]@le(r13)
149 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwz r4, 0(r4)
150 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: add r3, r4, r3
151 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: extsw r3, r3
152 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
154 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadTLInit2:
155 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
156 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addis r4, L..C0@u(r2)
157 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwz r3, ThreadLocalVarInit[TL]@le(r13)
158 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: ld r4, L..C0@l(r4)
159 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwz r4, 0(r4)
160 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: add r3, r4, r3
161 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: extsw r3, r3
162 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
164 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
165 %1 = load i32, ptr %0, align 4
166 %2 = load i32, ptr @VarInit, align 4
167 %add = add nsw i32 %2, %1
171 define void @loadStore1(i32 noundef signext %x) {
172 ; SMALL-LOCAL-EXEC-SMALLCM64-LABEL: loadStore1:
173 ; SMALL-LOCAL-EXEC-SMALLCM64: # %bb.0: # %entry
174 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: lwz r3, IThreadLocalVarInit[TL]@le(r13)
175 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: addi r3, r3, 9
176 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: stw r3, IThreadLocalVarInit[TL]@le(r13)
177 ; SMALL-LOCAL-EXEC-SMALLCM64-NEXT: blr
179 ; SMALL-LOCAL-EXEC-LARGECM64-LABEL: loadStore1:
180 ; SMALL-LOCAL-EXEC-LARGECM64: # %bb.0: # %entry
181 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: lwz r3, IThreadLocalVarInit[TL]@le(r13)
182 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: addi r3, r3, 9
183 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: stw r3, IThreadLocalVarInit[TL]@le(r13)
184 ; SMALL-LOCAL-EXEC-LARGECM64-NEXT: blr
186 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
187 %1 = load i32, ptr %0, align 4
188 %add = add nsw i32 %1, 9
189 store i32 %add, ptr %0, align 4