1 ; NOTE: This test case aims to test the sequence of spilling the CR[0-7]LT bits
2 ; NOTE: on POWER9 using the setb instruction.
4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
5 ; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s \
6 ; RUN: | FileCheck %s --check-prefix=CHECK-P9
7 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
8 ; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s \
9 ; RUN: | FileCheck %s --check-prefix=CHECK-P9
10 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
11 ; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s \
12 ; RUN: | FileCheck %s --check-prefix=CHECK-P8
13 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
14 ; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s \
15 ; RUN: | FileCheck %s --check-prefix=CHECK-P8
17 define void @p9_setb_spill() {
18 ; CHECK-P9-LABEL: p9_setb_spill:
19 ; CHECK-P9: # %bb.1: # %if.then
20 ; CHECK-P9-DAG: crnot 4*cr[[CREG:.*]]+lt, eq
21 ; CHECK-P9-DAG: setb [[REG1:.*]], cr[[CREG]]
22 ; CHECK-P9-DAG: stw [[REG1]]
24 ; CHECK-P9: .LBB0_4: # %if.then1
26 ; CHECK-P8-LABEL: p9_setb_spill:
27 ; CHECK-P8: # %bb.1: # %if.then
28 ; CHECK-P8-DAG: crnot 4*cr[[CREG2:.*]]+lt, eq
29 ; CHECK-P8-DAG: mfocrf [[REG2:.*]],
30 ; CHECK-P8-DAG: rlwinm [[REG2]], [[REG2]]
31 ; CHECK-P8-DAG: stw [[REG2]]
33 ; CHECK-P8: .LBB0_4: # %if.then1
35 br i1 undef, label %if.end, label %if.then
37 if.then: ; preds = %entry
38 %call = tail call signext i32 @fn_call()
39 %cmp1 = icmp ne i32 %call, 0
42 if.end: ; preds = %if.then, %entry
43 %off0 = phi i1 [ %cmp1, %if.then ], [ false, %entry ]
44 tail call void asm sideeffect "#Clobber", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}"()
45 %off0.not = xor i1 %off0, true
46 %or = or i1 false, %off0.not
47 br i1 %or, label %if.end2, label %if.then1
49 if.then1: ; preds = %if.end
52 if.end2: ; preds = %if.end
56 declare signext i32 @fn_call(...)