llvm/test/CodeGen/PowerPC/vperm-swap.ll

   1 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
   2 ; RUN:   -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
   3 ; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
   4
   5 define <16 x i8> @test_none_v16i8(i8 %arg, ptr nocapture noundef readonly %b) {
   6 ; CHECK-LE-P8: .LCPI0_0:
   7 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
   8 ; CHECK-LE-P8-NEXT: .byte   22                              # 0x16
   9 ; CHECK-LE-P8-NEXT: .byte   7                               # 0x7
  10 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  11 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  12 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  13 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  14 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  15 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  16 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  17 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  18 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  19 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  20 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  21 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  22 ; CHECK-LE-P8-NEXT: .byte   23                              # 0x17
  23 ; CHECK-LE-P8-LABEL: test_none_v16i8:
  24 ; CHECK-LE-P8:       # %bb.0: # %entry
  25 ; CHECK-LE-P8-NEXT:    addis r5, r2, .LCPI0_0@toc@ha
  26 ; CHECK-LE-P8-NEXT:    lxvd2x v3, 0, r4
  27 ; CHECK-LE-P8-NEXT:    mtvsrd v4, r3
  28 ; CHECK-LE-P8-NEXT:    addi r5, r5, .LCPI0_0@toc@l
  29 ; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r5
  30 ; CHECK-LE-P8-NEXT:    xxswapd v2, vs0
  31 ; CHECK-LE-P8-NEXT:    vperm v2, v4, v3, v2
  32 ; CHECK-LE-P8-NEXT:    blr
  33 entry:
  34   %lhs = load <16 x i8>, ptr %b, align 4
  35   %rhs = insertelement <16 x i8> undef, i8 %arg, i32 0
  36   %shuffle = shufflevector <16 x i8> %lhs, <16 x i8> %rhs, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
  37   ret <16 x i8> %shuffle
  38 }