1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \
3 ; RUN: -target-abi=ilp32f | FileCheck %s
4 ; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
5 ; RUN: -target-abi=lp64f | FileCheck %s
6 ; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \
7 ; RUN: -target-abi=ilp32 | FileCheck --check-prefix=CHECKZFINX %s
8 ; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \
9 ; RUN: -target-abi=lp64 | FileCheck --check-prefix=CHECKZFINX %s
11 define float @select_fcmp_false(float %a, float %b) nounwind {
12 ; CHECK-LABEL: select_fcmp_false:
14 ; CHECK-NEXT: fmv.s fa0, fa1
17 ; CHECKZFINX-LABEL: select_fcmp_false:
18 ; CHECKZFINX: # %bb.0:
19 ; CHECKZFINX-NEXT: mv a0, a1
20 ; CHECKZFINX-NEXT: ret
21 %1 = fcmp false float %a, %b
22 %2 = select i1 %1, float %a, float %b
26 define float @select_fcmp_oeq(float %a, float %b) nounwind {
27 ; CHECK-LABEL: select_fcmp_oeq:
29 ; CHECK-NEXT: feq.s a0, fa0, fa1
30 ; CHECK-NEXT: bnez a0, .LBB1_2
31 ; CHECK-NEXT: # %bb.1:
32 ; CHECK-NEXT: fmv.s fa0, fa1
33 ; CHECK-NEXT: .LBB1_2:
36 ; CHECKZFINX-LABEL: select_fcmp_oeq:
37 ; CHECKZFINX: # %bb.0:
38 ; CHECKZFINX-NEXT: feq.s a2, a0, a1
39 ; CHECKZFINX-NEXT: bnez a2, .LBB1_2
40 ; CHECKZFINX-NEXT: # %bb.1:
41 ; CHECKZFINX-NEXT: mv a0, a1
42 ; CHECKZFINX-NEXT: .LBB1_2:
43 ; CHECKZFINX-NEXT: ret
44 %1 = fcmp oeq float %a, %b
45 %2 = select i1 %1, float %a, float %b
49 define float @select_fcmp_ogt(float %a, float %b) nounwind {
50 ; CHECK-LABEL: select_fcmp_ogt:
52 ; CHECK-NEXT: flt.s a0, fa1, fa0
53 ; CHECK-NEXT: bnez a0, .LBB2_2
54 ; CHECK-NEXT: # %bb.1:
55 ; CHECK-NEXT: fmv.s fa0, fa1
56 ; CHECK-NEXT: .LBB2_2:
59 ; CHECKZFINX-LABEL: select_fcmp_ogt:
60 ; CHECKZFINX: # %bb.0:
61 ; CHECKZFINX-NEXT: flt.s a2, a1, a0
62 ; CHECKZFINX-NEXT: bnez a2, .LBB2_2
63 ; CHECKZFINX-NEXT: # %bb.1:
64 ; CHECKZFINX-NEXT: mv a0, a1
65 ; CHECKZFINX-NEXT: .LBB2_2:
66 ; CHECKZFINX-NEXT: ret
67 %1 = fcmp ogt float %a, %b
68 %2 = select i1 %1, float %a, float %b
72 define float @select_fcmp_oge(float %a, float %b) nounwind {
73 ; CHECK-LABEL: select_fcmp_oge:
75 ; CHECK-NEXT: fle.s a0, fa1, fa0
76 ; CHECK-NEXT: bnez a0, .LBB3_2
77 ; CHECK-NEXT: # %bb.1:
78 ; CHECK-NEXT: fmv.s fa0, fa1
79 ; CHECK-NEXT: .LBB3_2:
82 ; CHECKZFINX-LABEL: select_fcmp_oge:
83 ; CHECKZFINX: # %bb.0:
84 ; CHECKZFINX-NEXT: fle.s a2, a1, a0
85 ; CHECKZFINX-NEXT: bnez a2, .LBB3_2
86 ; CHECKZFINX-NEXT: # %bb.1:
87 ; CHECKZFINX-NEXT: mv a0, a1
88 ; CHECKZFINX-NEXT: .LBB3_2:
89 ; CHECKZFINX-NEXT: ret
90 %1 = fcmp oge float %a, %b
91 %2 = select i1 %1, float %a, float %b
95 define float @select_fcmp_olt(float %a, float %b) nounwind {
96 ; CHECK-LABEL: select_fcmp_olt:
98 ; CHECK-NEXT: flt.s a0, fa0, fa1
99 ; CHECK-NEXT: bnez a0, .LBB4_2
100 ; CHECK-NEXT: # %bb.1:
101 ; CHECK-NEXT: fmv.s fa0, fa1
102 ; CHECK-NEXT: .LBB4_2:
105 ; CHECKZFINX-LABEL: select_fcmp_olt:
106 ; CHECKZFINX: # %bb.0:
107 ; CHECKZFINX-NEXT: flt.s a2, a0, a1
108 ; CHECKZFINX-NEXT: bnez a2, .LBB4_2
109 ; CHECKZFINX-NEXT: # %bb.1:
110 ; CHECKZFINX-NEXT: mv a0, a1
111 ; CHECKZFINX-NEXT: .LBB4_2:
112 ; CHECKZFINX-NEXT: ret
113 %1 = fcmp olt float %a, %b
114 %2 = select i1 %1, float %a, float %b
118 define float @select_fcmp_ole(float %a, float %b) nounwind {
119 ; CHECK-LABEL: select_fcmp_ole:
121 ; CHECK-NEXT: fle.s a0, fa0, fa1
122 ; CHECK-NEXT: bnez a0, .LBB5_2
123 ; CHECK-NEXT: # %bb.1:
124 ; CHECK-NEXT: fmv.s fa0, fa1
125 ; CHECK-NEXT: .LBB5_2:
128 ; CHECKZFINX-LABEL: select_fcmp_ole:
129 ; CHECKZFINX: # %bb.0:
130 ; CHECKZFINX-NEXT: fle.s a2, a0, a1
131 ; CHECKZFINX-NEXT: bnez a2, .LBB5_2
132 ; CHECKZFINX-NEXT: # %bb.1:
133 ; CHECKZFINX-NEXT: mv a0, a1
134 ; CHECKZFINX-NEXT: .LBB5_2:
135 ; CHECKZFINX-NEXT: ret
136 %1 = fcmp ole float %a, %b
137 %2 = select i1 %1, float %a, float %b
141 define float @select_fcmp_one(float %a, float %b) nounwind {
142 ; CHECK-LABEL: select_fcmp_one:
144 ; CHECK-NEXT: flt.s a0, fa0, fa1
145 ; CHECK-NEXT: flt.s a1, fa1, fa0
146 ; CHECK-NEXT: or a0, a1, a0
147 ; CHECK-NEXT: bnez a0, .LBB6_2
148 ; CHECK-NEXT: # %bb.1:
149 ; CHECK-NEXT: fmv.s fa0, fa1
150 ; CHECK-NEXT: .LBB6_2:
153 ; CHECKZFINX-LABEL: select_fcmp_one:
154 ; CHECKZFINX: # %bb.0:
155 ; CHECKZFINX-NEXT: flt.s a2, a0, a1
156 ; CHECKZFINX-NEXT: flt.s a3, a1, a0
157 ; CHECKZFINX-NEXT: or a2, a3, a2
158 ; CHECKZFINX-NEXT: bnez a2, .LBB6_2
159 ; CHECKZFINX-NEXT: # %bb.1:
160 ; CHECKZFINX-NEXT: mv a0, a1
161 ; CHECKZFINX-NEXT: .LBB6_2:
162 ; CHECKZFINX-NEXT: ret
163 %1 = fcmp one float %a, %b
164 %2 = select i1 %1, float %a, float %b
168 define float @select_fcmp_ord(float %a, float %b) nounwind {
169 ; CHECK-LABEL: select_fcmp_ord:
171 ; CHECK-NEXT: feq.s a0, fa1, fa1
172 ; CHECK-NEXT: feq.s a1, fa0, fa0
173 ; CHECK-NEXT: and a0, a1, a0
174 ; CHECK-NEXT: bnez a0, .LBB7_2
175 ; CHECK-NEXT: # %bb.1:
176 ; CHECK-NEXT: fmv.s fa0, fa1
177 ; CHECK-NEXT: .LBB7_2:
180 ; CHECKZFINX-LABEL: select_fcmp_ord:
181 ; CHECKZFINX: # %bb.0:
182 ; CHECKZFINX-NEXT: feq.s a2, a1, a1
183 ; CHECKZFINX-NEXT: feq.s a3, a0, a0
184 ; CHECKZFINX-NEXT: and a2, a3, a2
185 ; CHECKZFINX-NEXT: bnez a2, .LBB7_2
186 ; CHECKZFINX-NEXT: # %bb.1:
187 ; CHECKZFINX-NEXT: mv a0, a1
188 ; CHECKZFINX-NEXT: .LBB7_2:
189 ; CHECKZFINX-NEXT: ret
190 %1 = fcmp ord float %a, %b
191 %2 = select i1 %1, float %a, float %b
195 define float @select_fcmp_ueq(float %a, float %b) nounwind {
196 ; CHECK-LABEL: select_fcmp_ueq:
198 ; CHECK-NEXT: flt.s a0, fa0, fa1
199 ; CHECK-NEXT: flt.s a1, fa1, fa0
200 ; CHECK-NEXT: or a0, a1, a0
201 ; CHECK-NEXT: beqz a0, .LBB8_2
202 ; CHECK-NEXT: # %bb.1:
203 ; CHECK-NEXT: fmv.s fa0, fa1
204 ; CHECK-NEXT: .LBB8_2:
207 ; CHECKZFINX-LABEL: select_fcmp_ueq:
208 ; CHECKZFINX: # %bb.0:
209 ; CHECKZFINX-NEXT: flt.s a2, a0, a1
210 ; CHECKZFINX-NEXT: flt.s a3, a1, a0
211 ; CHECKZFINX-NEXT: or a2, a3, a2
212 ; CHECKZFINX-NEXT: beqz a2, .LBB8_2
213 ; CHECKZFINX-NEXT: # %bb.1:
214 ; CHECKZFINX-NEXT: mv a0, a1
215 ; CHECKZFINX-NEXT: .LBB8_2:
216 ; CHECKZFINX-NEXT: ret
217 %1 = fcmp ueq float %a, %b
218 %2 = select i1 %1, float %a, float %b
222 define float @select_fcmp_ugt(float %a, float %b) nounwind {
223 ; CHECK-LABEL: select_fcmp_ugt:
225 ; CHECK-NEXT: fle.s a0, fa0, fa1
226 ; CHECK-NEXT: beqz a0, .LBB9_2
227 ; CHECK-NEXT: # %bb.1:
228 ; CHECK-NEXT: fmv.s fa0, fa1
229 ; CHECK-NEXT: .LBB9_2:
232 ; CHECKZFINX-LABEL: select_fcmp_ugt:
233 ; CHECKZFINX: # %bb.0:
234 ; CHECKZFINX-NEXT: fle.s a2, a0, a1
235 ; CHECKZFINX-NEXT: beqz a2, .LBB9_2
236 ; CHECKZFINX-NEXT: # %bb.1:
237 ; CHECKZFINX-NEXT: mv a0, a1
238 ; CHECKZFINX-NEXT: .LBB9_2:
239 ; CHECKZFINX-NEXT: ret
240 %1 = fcmp ugt float %a, %b
241 %2 = select i1 %1, float %a, float %b
245 define float @select_fcmp_uge(float %a, float %b) nounwind {
246 ; CHECK-LABEL: select_fcmp_uge:
248 ; CHECK-NEXT: flt.s a0, fa0, fa1
249 ; CHECK-NEXT: beqz a0, .LBB10_2
250 ; CHECK-NEXT: # %bb.1:
251 ; CHECK-NEXT: fmv.s fa0, fa1
252 ; CHECK-NEXT: .LBB10_2:
255 ; CHECKZFINX-LABEL: select_fcmp_uge:
256 ; CHECKZFINX: # %bb.0:
257 ; CHECKZFINX-NEXT: flt.s a2, a0, a1
258 ; CHECKZFINX-NEXT: beqz a2, .LBB10_2
259 ; CHECKZFINX-NEXT: # %bb.1:
260 ; CHECKZFINX-NEXT: mv a0, a1
261 ; CHECKZFINX-NEXT: .LBB10_2:
262 ; CHECKZFINX-NEXT: ret
263 %1 = fcmp uge float %a, %b
264 %2 = select i1 %1, float %a, float %b
268 define float @select_fcmp_ult(float %a, float %b) nounwind {
269 ; CHECK-LABEL: select_fcmp_ult:
271 ; CHECK-NEXT: fle.s a0, fa1, fa0
272 ; CHECK-NEXT: beqz a0, .LBB11_2
273 ; CHECK-NEXT: # %bb.1:
274 ; CHECK-NEXT: fmv.s fa0, fa1
275 ; CHECK-NEXT: .LBB11_2:
278 ; CHECKZFINX-LABEL: select_fcmp_ult:
279 ; CHECKZFINX: # %bb.0:
280 ; CHECKZFINX-NEXT: fle.s a2, a1, a0
281 ; CHECKZFINX-NEXT: beqz a2, .LBB11_2
282 ; CHECKZFINX-NEXT: # %bb.1:
283 ; CHECKZFINX-NEXT: mv a0, a1
284 ; CHECKZFINX-NEXT: .LBB11_2:
285 ; CHECKZFINX-NEXT: ret
286 %1 = fcmp ult float %a, %b
287 %2 = select i1 %1, float %a, float %b
291 define float @select_fcmp_ule(float %a, float %b) nounwind {
292 ; CHECK-LABEL: select_fcmp_ule:
294 ; CHECK-NEXT: flt.s a0, fa1, fa0
295 ; CHECK-NEXT: beqz a0, .LBB12_2
296 ; CHECK-NEXT: # %bb.1:
297 ; CHECK-NEXT: fmv.s fa0, fa1
298 ; CHECK-NEXT: .LBB12_2:
301 ; CHECKZFINX-LABEL: select_fcmp_ule:
302 ; CHECKZFINX: # %bb.0:
303 ; CHECKZFINX-NEXT: flt.s a2, a1, a0
304 ; CHECKZFINX-NEXT: beqz a2, .LBB12_2
305 ; CHECKZFINX-NEXT: # %bb.1:
306 ; CHECKZFINX-NEXT: mv a0, a1
307 ; CHECKZFINX-NEXT: .LBB12_2:
308 ; CHECKZFINX-NEXT: ret
309 %1 = fcmp ule float %a, %b
310 %2 = select i1 %1, float %a, float %b
314 define float @select_fcmp_une(float %a, float %b) nounwind {
315 ; CHECK-LABEL: select_fcmp_une:
317 ; CHECK-NEXT: feq.s a0, fa0, fa1
318 ; CHECK-NEXT: beqz a0, .LBB13_2
319 ; CHECK-NEXT: # %bb.1:
320 ; CHECK-NEXT: fmv.s fa0, fa1
321 ; CHECK-NEXT: .LBB13_2:
324 ; CHECKZFINX-LABEL: select_fcmp_une:
325 ; CHECKZFINX: # %bb.0:
326 ; CHECKZFINX-NEXT: feq.s a2, a0, a1
327 ; CHECKZFINX-NEXT: beqz a2, .LBB13_2
328 ; CHECKZFINX-NEXT: # %bb.1:
329 ; CHECKZFINX-NEXT: mv a0, a1
330 ; CHECKZFINX-NEXT: .LBB13_2:
331 ; CHECKZFINX-NEXT: ret
332 %1 = fcmp une float %a, %b
333 %2 = select i1 %1, float %a, float %b
337 define float @select_fcmp_uno(float %a, float %b) nounwind {
338 ; CHECK-LABEL: select_fcmp_uno:
340 ; CHECK-NEXT: feq.s a0, fa1, fa1
341 ; CHECK-NEXT: feq.s a1, fa0, fa0
342 ; CHECK-NEXT: and a0, a1, a0
343 ; CHECK-NEXT: beqz a0, .LBB14_2
344 ; CHECK-NEXT: # %bb.1:
345 ; CHECK-NEXT: fmv.s fa0, fa1
346 ; CHECK-NEXT: .LBB14_2:
349 ; CHECKZFINX-LABEL: select_fcmp_uno:
350 ; CHECKZFINX: # %bb.0:
351 ; CHECKZFINX-NEXT: feq.s a2, a1, a1
352 ; CHECKZFINX-NEXT: feq.s a3, a0, a0
353 ; CHECKZFINX-NEXT: and a2, a3, a2
354 ; CHECKZFINX-NEXT: beqz a2, .LBB14_2
355 ; CHECKZFINX-NEXT: # %bb.1:
356 ; CHECKZFINX-NEXT: mv a0, a1
357 ; CHECKZFINX-NEXT: .LBB14_2:
358 ; CHECKZFINX-NEXT: ret
359 %1 = fcmp uno float %a, %b
360 %2 = select i1 %1, float %a, float %b
364 define float @select_fcmp_true(float %a, float %b) nounwind {
365 ; CHECK-LABEL: select_fcmp_true:
369 ; CHECKZFINX-LABEL: select_fcmp_true:
370 ; CHECKZFINX: # %bb.0:
371 ; CHECKZFINX-NEXT: ret
372 %1 = fcmp true float %a, %b
373 %2 = select i1 %1, float %a, float %b
377 ; Ensure that ISel succeeds for a select+fcmp that has an i32 result type.
378 define i32 @i32_select_fcmp_oeq(float %a, float %b, i32 %c, i32 %d) nounwind {
379 ; CHECK-LABEL: i32_select_fcmp_oeq:
381 ; CHECK-NEXT: feq.s a2, fa0, fa1
382 ; CHECK-NEXT: bnez a2, .LBB16_2
383 ; CHECK-NEXT: # %bb.1:
384 ; CHECK-NEXT: mv a0, a1
385 ; CHECK-NEXT: .LBB16_2:
388 ; CHECKZFINX-LABEL: i32_select_fcmp_oeq:
389 ; CHECKZFINX: # %bb.0:
390 ; CHECKZFINX-NEXT: feq.s a1, a0, a1
391 ; CHECKZFINX-NEXT: mv a0, a2
392 ; CHECKZFINX-NEXT: bnez a1, .LBB16_2
393 ; CHECKZFINX-NEXT: # %bb.1:
394 ; CHECKZFINX-NEXT: mv a0, a3
395 ; CHECKZFINX-NEXT: .LBB16_2:
396 ; CHECKZFINX-NEXT: ret
397 %1 = fcmp oeq float %a, %b
398 %2 = select i1 %1, i32 %c, i32 %d
402 define i32 @select_fcmp_oeq_1_2(float %a, float %b) {
403 ; CHECK-LABEL: select_fcmp_oeq_1_2:
405 ; CHECK-NEXT: feq.s a0, fa0, fa1
406 ; CHECK-NEXT: li a1, 2
407 ; CHECK-NEXT: sub a0, a1, a0
410 ; CHECKZFINX-LABEL: select_fcmp_oeq_1_2:
411 ; CHECKZFINX: # %bb.0:
412 ; CHECKZFINX-NEXT: feq.s a0, a0, a1
413 ; CHECKZFINX-NEXT: li a1, 2
414 ; CHECKZFINX-NEXT: sub a0, a1, a0
415 ; CHECKZFINX-NEXT: ret
416 %1 = fcmp fast oeq float %a, %b
417 %2 = select i1 %1, i32 1, i32 2
421 define signext i32 @select_fcmp_uge_negone_zero(float %a, float %b) nounwind {
422 ; CHECK-LABEL: select_fcmp_uge_negone_zero:
424 ; CHECK-NEXT: fle.s a0, fa0, fa1
425 ; CHECK-NEXT: addi a0, a0, -1
428 ; CHECKZFINX-LABEL: select_fcmp_uge_negone_zero:
429 ; CHECKZFINX: # %bb.0:
430 ; CHECKZFINX-NEXT: fle.s a0, a0, a1
431 ; CHECKZFINX-NEXT: addi a0, a0, -1
432 ; CHECKZFINX-NEXT: ret
433 %1 = fcmp ugt float %a, %b
434 %2 = select i1 %1, i32 -1, i32 0
438 define signext i32 @select_fcmp_uge_1_2(float %a, float %b) nounwind {
439 ; CHECK-LABEL: select_fcmp_uge_1_2:
441 ; CHECK-NEXT: fle.s a0, fa0, fa1
442 ; CHECK-NEXT: addi a0, a0, 1
445 ; CHECKZFINX-LABEL: select_fcmp_uge_1_2:
446 ; CHECKZFINX: # %bb.0:
447 ; CHECKZFINX-NEXT: fle.s a0, a0, a1
448 ; CHECKZFINX-NEXT: addi a0, a0, 1
449 ; CHECKZFINX-NEXT: ret
450 %1 = fcmp ugt float %a, %b
451 %2 = select i1 %1, i32 1, i32 2