1 ; Test STOCFHs that are presented as selects.
2 ; See comments in asm-18.ll about testing high-word operations.
4 ; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z13 \
5 ; RUN: -no-integrated-as | FileCheck %s
9 ; Test the simple case, with the loaded value first.
10 define void @f1(ptr %ptr, i32 %limit) {
12 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
13 ; CHECK-DAG: clfi %r3, 42
14 ; CHECK: stocfhhe [[REG]], 0(%r2)
16 %alt = call i32 asm "stepa $0", "=h"()
17 %cond = icmp ult i32 %limit, 42
18 %orig = load i32, ptr %ptr
19 %res = select i1 %cond, i32 %orig, i32 %alt
20 store i32 %res, ptr %ptr
24 ; ...and with the loaded value second
25 define void @f2(ptr %ptr, i32 %limit) {
27 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
28 ; CHECK-DAG: clfi %r3, 42
29 ; CHECK: stocfhl [[REG]], 0(%r2)
31 %alt = call i32 asm "stepa $0", "=h"()
32 %cond = icmp ult i32 %limit, 42
33 %orig = load i32, ptr %ptr
34 %res = select i1 %cond, i32 %alt, i32 %orig
35 store i32 %res, ptr %ptr
39 ; Check the high end of the aligned STOC range.
40 define void @f3(ptr %base, i32 %limit) {
42 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
43 ; CHECK-DAG: clfi %r3, 42
44 ; CHECK: stocfhhe [[REG]], 524284(%r2)
46 %alt = call i32 asm "stepa $0", "=h"()
47 %ptr = getelementptr i32, ptr %base, i64 131071
48 %cond = icmp ult i32 %limit, 42
49 %orig = load i32, ptr %ptr
50 %res = select i1 %cond, i32 %orig, i32 %alt
51 store i32 %res, ptr %ptr
55 ; Check the next word up. Other sequences besides this one would be OK.
56 define void @f4(ptr %base, i32 %limit) {
58 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
59 ; CHECK-DAG: agfi %r2, 524288
60 ; CHECK-DAG: clfi %r3, 42
61 ; CHECK: stocfhhe [[REG]], 0(%r2)
63 %alt = call i32 asm "stepa $0", "=h"()
64 %ptr = getelementptr i32, ptr %base, i64 131072
65 %cond = icmp ult i32 %limit, 42
66 %orig = load i32, ptr %ptr
67 %res = select i1 %cond, i32 %orig, i32 %alt
68 store i32 %res, ptr %ptr
72 ; Check the low end of the STOC range.
73 define void @f5(ptr %base, i32 %limit) {
75 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
76 ; CHECK-DAG: clfi %r3, 42
77 ; CHECK: stocfhhe [[REG]], -524288(%r2)
79 %alt = call i32 asm "stepa $0", "=h"()
80 %ptr = getelementptr i32, ptr %base, i64 -131072
81 %cond = icmp ult i32 %limit, 42
82 %orig = load i32, ptr %ptr
83 %res = select i1 %cond, i32 %orig, i32 %alt
84 store i32 %res, ptr %ptr
88 ; Check the next word down, with the same comments as f8.
89 define void @f6(ptr %base, i32 %limit) {
91 ; CHECK-DAG: stepa [[REG:%r[0-5]]]
92 ; CHECK-DAG: agfi %r2, -524292
93 ; CHECK-DAG: clfi %r3, 42
94 ; CHECK: stocfhhe [[REG]], 0(%r2)
96 %alt = call i32 asm "stepa $0", "=h"()
97 %ptr = getelementptr i32, ptr %base, i64 -131073
98 %cond = icmp ult i32 %limit, 42
99 %orig = load i32, ptr %ptr
100 %res = select i1 %cond, i32 %orig, i32 %alt
101 store i32 %res, ptr %ptr
105 ; Try a frame index base.
106 define void @f7(i32 %limit) {
108 ; CHECK: brasl %r14, foo@PLT
109 ; CHECK: stepa [[REG:%r[0-5]]]
110 ; CHECK: stocfhhe [[REG]], {{[0-9]+}}(%r15)
111 ; CHECK: brasl %r14, foo@PLT
114 call void @foo(ptr %ptr)
115 %alt = call i32 asm "stepa $0", "=h"()
116 %cond = icmp ult i32 %limit, 42
117 %orig = load i32, ptr %ptr
118 %res = select i1 %cond, i32 %orig, i32 %alt
119 store i32 %res, ptr %ptr
120 call void @foo(ptr %ptr)
124 ; Test that conditionally-executed stores do not use STOC, since STOC
125 ; is allowed to trap even when the condition is false.
126 define void @f8(i32 %a, i32 %b, ptr %dest) {
132 %val = call i32 asm "stepa $0", "=h"()
133 %cmp = icmp ule i32 %a, %b
134 br i1 %cmp, label %store, label %exit
137 store i32 %val, ptr %dest