1 ; Test 32-bit GPR accesses to a PC-relative location.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 @gsrc16 = dso_local global i16 1
6 @gsrc32 = dso_local global i32 1
7 @gdst16 = dso_local global i16 2
8 @gdst32 = dso_local global i32 2
9 @gsrc16u = dso_local global i16 1, align 1, section "foo"
10 @gsrc32u = dso_local global i32 1, align 2, section "foo"
11 @gdst16u = dso_local global i16 2, align 1, section "foo"
12 @gdst32u = dso_local global i32 2, align 2, section "foo"
13 @garray8 = dso_local global [2 x i8] [i8 100, i8 101]
14 @garray16 = dso_local global [2 x i16] [i16 102, i16 103]
16 ; Check sign-extending loads from i16.
17 define dso_local i32 @f1() {
19 ; CHECK: lhrl %r2, gsrc16
21 %val = load i16, ptr@gsrc16
22 %ext = sext i16 %val to i32
26 ; Check zero-extending loads from i16.
27 define dso_local i32 @f2() {
29 ; CHECK: llhrl %r2, gsrc16
31 %val = load i16, ptr@gsrc16
32 %ext = zext i16 %val to i32
36 ; Check truncating 16-bit stores.
37 define dso_local void @f3(i32 %val) {
39 ; CHECK: sthrl %r2, gdst16
41 %half = trunc i32 %val to i16
42 store i16 %half, ptr@gdst16
46 ; Check plain loads and stores.
47 define dso_local void @f4() {
49 ; CHECK: lrl %r0, gsrc32
50 ; CHECK: strl %r0, gdst32
52 %val = load i32, ptr@gsrc32
53 store i32 %val, ptr@gdst32
57 ; Repeat f1 with an unaligned variable.
58 define dso_local i32 @f5() {
60 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
61 ; CHECK: lh %r2, 0([[REG]])
63 %val = load i16, ptr@gsrc16u, align 1
64 %ext = sext i16 %val to i32
68 ; Repeat f2 with an unaligned variable.
69 define dso_local i32 @f6() {
71 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
72 ; CHECK: llh %r2, 0([[REG]])
74 %val = load i16, ptr@gsrc16u, align 1
75 %ext = zext i16 %val to i32
79 ; Repeat f3 with an unaligned variable.
80 define dso_local void @f7(i32 %val) {
82 ; CHECK: lgrl [[REG:%r[0-5]]], gdst16u
83 ; CHECK: sth %r2, 0([[REG]])
85 %half = trunc i32 %val to i16
86 store i16 %half, ptr@gdst16u, align 1
90 ; Repeat f4 with unaligned variables.
91 define dso_local void @f8() {
93 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
94 ; CHECK: l [[VAL:%r[0-5]]], 0([[REG]])
95 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
96 ; CHECK: st [[VAL]], 0([[REG]])
98 %val = load i32, ptr@gsrc32u, align 2
99 store i32 %val, ptr@gdst32u, align 2
103 ; Test a case where we want to use one LARL for accesses to two different
104 ; parts of a variable.
105 define dso_local void @f9() {
107 ; CHECK: larl [[REG:%r[0-5]]], garray8
108 ; CHECK: llc [[VAL:%r[0-5]]], 0([[REG]])
109 ; CHECK: srl [[VAL]], 1
110 ; CHECK: stc [[VAL]], 1([[REG]])
112 %ptr1 = getelementptr [2 x i8], ptr@garray8, i64 0, i64 0
113 %ptr2 = getelementptr [2 x i8], ptr@garray8, i64 0, i64 1
114 %val = load i8, ptr %ptr1
115 %shr = lshr i8 %val, 1
116 store i8 %shr, ptr %ptr2
120 ; Test a case where we want to use separate relative-long addresses for
121 ; two different parts of a variable.
122 define dso_local void @f10() {
124 ; CHECK: llhrl [[VAL:%r[0-5]]], garray16
125 ; CHECK: srl [[VAL]], 1
126 ; CHECK: sthrl [[VAL]], garray16+2
128 %ptr1 = getelementptr [2 x i16], ptr@garray16, i64 0, i64 0
129 %ptr2 = getelementptr [2 x i16], ptr@garray16, i64 0, i64 1
130 %val = load i16, ptr %ptr1
131 %shr = lshr i16 %val, 1
132 store i16 %shr, ptr %ptr2