| blob | 570834fb6701008b702830a6b13c5ec0eac5efac |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-MVE
3 ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-MVEFP
5 ;
6 ; Float to signed 32-bit -- Vector size variation
7 ;
9 declare <1 x i32> @llvm.fptosi.sat.v1f32.v1i32 (<1 x float>)
10 declare <2 x i32> @llvm.fptosi.sat.v2f32.v2i32 (<2 x float>)
11 declare <3 x i32> @llvm.fptosi.sat.v3f32.v3i32 (<3 x float>)
12 declare <4 x i32> @llvm.fptosi.sat.v4f32.v4i32 (<4 x float>)
13 declare <5 x i32> @llvm.fptosi.sat.v5f32.v5i32 (<5 x float>)
14 declare <6 x i32> @llvm.fptosi.sat.v6f32.v6i32 (<6 x float>)
15 declare <7 x i32> @llvm.fptosi.sat.v7f32.v7i32 (<7 x float>)
16 declare <8 x i32> @llvm.fptosi.sat.v8f32.v8i32 (<8 x float>)
18 define arm_aapcs_vfpcc <1 x i32> @test_signed_v1f32_v1i32(<1 x float> %f) {
19 ; CHECK-LABEL: test_signed_v1f32_v1i32:
20 ; CHECK: @ %bb.0:
21 ; CHECK-NEXT: vcvt.s32.f32 s0, s0
22 ; CHECK-NEXT: vmov r0, s0
23 ; CHECK-NEXT: bx lr
24 %x = call <1 x i32> @llvm.fptosi.sat.v1f32.v1i32(<1 x float> %f)
25 ret <1 x i32> %x
26 }
28 define arm_aapcs_vfpcc <2 x i32> @test_signed_v2f32_v2i32(<2 x float> %f) {
29 ; CHECK-LABEL: test_signed_v2f32_v2i32:
30 ; CHECK: @ %bb.0:
31 ; CHECK-NEXT: .save {r4, r5, r7, lr}
32 ; CHECK-NEXT: push {r4, r5, r7, lr}
33 ; CHECK-NEXT: .vsave {d8, d9, d10}
34 ; CHECK-NEXT: vpush {d8, d9, d10}
35 ; CHECK-NEXT: vmov q4, q0
36 ; CHECK-NEXT: vmov r0, s17
37 ; CHECK-NEXT: bl __aeabi_f2lz
38 ; CHECK-NEXT: mov r5, r0
39 ; CHECK-NEXT: vmov r0, s16
40 ; CHECK-NEXT: vldr s18, .LCPI1_0
41 ; CHECK-NEXT: mov r4, r1
42 ; CHECK-NEXT: vldr s20, .LCPI1_1
43 ; CHECK-NEXT: vcmp.f32 s17, s18
44 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
45 ; CHECK-NEXT: it lt
46 ; CHECK-NEXT: movlt.w r5, #-2147483648
47 ; CHECK-NEXT: vcmp.f32 s17, s20
48 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
49 ; CHECK-NEXT: it gt
50 ; CHECK-NEXT: mvngt r5, #-2147483648
51 ; CHECK-NEXT: vcmp.f32 s17, s17
52 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
53 ; CHECK-NEXT: it vs
54 ; CHECK-NEXT: movvs r5, #0
55 ; CHECK-NEXT: bl __aeabi_f2lz
56 ; CHECK-NEXT: vcmp.f32 s16, s18
57 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
58 ; CHECK-NEXT: vcmp.f32 s16, s20
59 ; CHECK-NEXT: it lt
60 ; CHECK-NEXT: movlt.w r0, #-2147483648
61 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
62 ; CHECK-NEXT: vcmp.f32 s16, s16
63 ; CHECK-NEXT: it gt
64 ; CHECK-NEXT: mvngt r0, #-2147483648
65 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
66 ; CHECK-NEXT: vcmp.f32 s17, s18
67 ; CHECK-NEXT: it vs
68 ; CHECK-NEXT: movvs r0, #0
69 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
70 ; CHECK-NEXT: vcmp.f32 s17, s20
71 ; CHECK-NEXT: it lt
72 ; CHECK-NEXT: movlt.w r4, #-1
73 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
74 ; CHECK-NEXT: vcmp.f32 s17, s17
75 ; CHECK-NEXT: it gt
76 ; CHECK-NEXT: movgt r4, #0
77 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
78 ; CHECK-NEXT: vcmp.f32 s16, s18
79 ; CHECK-NEXT: it vs
80 ; CHECK-NEXT: movvs r4, #0
81 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
82 ; CHECK-NEXT: it lt
83 ; CHECK-NEXT: movlt.w r1, #-1
84 ; CHECK-NEXT: vcmp.f32 s16, s20
85 ; CHECK-NEXT: vmov q0[2], q0[0], r0, r5
86 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
87 ; CHECK-NEXT: it gt
88 ; CHECK-NEXT: movgt r1, #0
89 ; CHECK-NEXT: vcmp.f32 s16, s16
90 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
91 ; CHECK-NEXT: it vs
92 ; CHECK-NEXT: movvs r1, #0
93 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r4
94 ; CHECK-NEXT: vpop {d8, d9, d10}
95 ; CHECK-NEXT: pop {r4, r5, r7, pc}
96 ; CHECK-NEXT: .p2align 2
97 ; CHECK-NEXT: @ %bb.1:
98 ; CHECK-NEXT: .LCPI1_0:
99 ; CHECK-NEXT: .long 0xcf000000 @ float -2.14748365E+9
100 ; CHECK-NEXT: .LCPI1_1:
101 ; CHECK-NEXT: .long 0x4effffff @ float 2.14748352E+9
102 %x = call <2 x i32> @llvm.fptosi.sat.v2f32.v2i32(<2 x float> %f)
103 ret <2 x i32> %x
104 }
106 define arm_aapcs_vfpcc <3 x i32> @test_signed_v3f32_v3i32(<3 x float> %f) {
107 ; CHECK-MVE-LABEL: test_signed_v3f32_v3i32:
108 ; CHECK-MVE: @ %bb.0:
109 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
110 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
111 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s3
112 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s1
113 ; CHECK-MVE-NEXT: vmov r0, s2
114 ; CHECK-MVE-NEXT: vmov r1, s0
115 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
116 ; CHECK-MVE-NEXT: vmov r0, s4
117 ; CHECK-MVE-NEXT: vmov r1, s6
118 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0
119 ; CHECK-MVE-NEXT: bx lr
120 ;
121 ; CHECK-MVEFP-LABEL: test_signed_v3f32_v3i32:
122 ; CHECK-MVEFP: @ %bb.0:
123 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
124 ; CHECK-MVEFP-NEXT: bx lr
125 %x = call <3 x i32> @llvm.fptosi.sat.v3f32.v3i32(<3 x float> %f)
126 ret <3 x i32> %x
127 }
129 define arm_aapcs_vfpcc <4 x i32> @test_signed_v4f32_v4i32(<4 x float> %f) {
130 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i32:
131 ; CHECK-MVE: @ %bb.0:
132 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
133 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
134 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s3
135 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s1
136 ; CHECK-MVE-NEXT: vmov r0, s2
137 ; CHECK-MVE-NEXT: vmov r1, s0
138 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
139 ; CHECK-MVE-NEXT: vmov r0, s4
140 ; CHECK-MVE-NEXT: vmov r1, s6
141 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0
142 ; CHECK-MVE-NEXT: bx lr
143 ;
144 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i32:
145 ; CHECK-MVEFP: @ %bb.0:
146 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
147 ; CHECK-MVEFP-NEXT: bx lr
148 %x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f)
149 ret <4 x i32> %x
150 }
152 define arm_aapcs_vfpcc <5 x i32> @test_signed_v5f32_v5i32(<5 x float> %f) {
153 ; CHECK-MVE-LABEL: test_signed_v5f32_v5i32:
154 ; CHECK-MVE: @ %bb.0:
155 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
156 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
157 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s3
158 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s1
159 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
160 ; CHECK-MVE-NEXT: vmov r1, s2
161 ; CHECK-MVE-NEXT: vmov r2, s0
162 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1
163 ; CHECK-MVE-NEXT: vmov r1, s6
164 ; CHECK-MVE-NEXT: vmov r2, s8
165 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1
166 ; CHECK-MVE-NEXT: vstrw.32 q0, [r0]
167 ; CHECK-MVE-NEXT: vstr s4, [r0, #16]
168 ; CHECK-MVE-NEXT: bx lr
169 ;
170 ; CHECK-MVEFP-LABEL: test_signed_v5f32_v5i32:
171 ; CHECK-MVEFP: @ %bb.0:
172 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q1, q1
173 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
174 ; CHECK-MVEFP-NEXT: vmov r1, s4
175 ; CHECK-MVEFP-NEXT: str r1, [r0, #16]
176 ; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]
177 ; CHECK-MVEFP-NEXT: bx lr
178 %x = call <5 x i32> @llvm.fptosi.sat.v5f32.v5i32(<5 x float> %f)
179 ret <5 x i32> %x
180 }
182 define arm_aapcs_vfpcc <6 x i32> @test_signed_v6f32_v6i32(<6 x float> %f) {
183 ; CHECK-MVE-LABEL: test_signed_v6f32_v6i32:
184 ; CHECK-MVE: @ %bb.0:
185 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
186 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
187 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s3
188 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s1
189 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s5
190 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
191 ; CHECK-MVE-NEXT: vmov r1, s2
192 ; CHECK-MVE-NEXT: vmov r2, s0
193 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1
194 ; CHECK-MVE-NEXT: vmov r1, s8
195 ; CHECK-MVE-NEXT: vmov r2, s10
196 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1
197 ; CHECK-MVE-NEXT: vstr s6, [r0, #20]
198 ; CHECK-MVE-NEXT: vstrw.32 q0, [r0]
199 ; CHECK-MVE-NEXT: vstr s4, [r0, #16]
200 ; CHECK-MVE-NEXT: bx lr
201 ;
202 ; CHECK-MVEFP-LABEL: test_signed_v6f32_v6i32:
203 ; CHECK-MVEFP: @ %bb.0:
204 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q1, q1
205 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
206 ; CHECK-MVEFP-NEXT: vmov.f32 s6, s5
207 ; CHECK-MVEFP-NEXT: vmov r2, s4
208 ; CHECK-MVEFP-NEXT: vmov r1, s6
209 ; CHECK-MVEFP-NEXT: strd r2, r1, [r0, #16]
210 ; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]
211 ; CHECK-MVEFP-NEXT: bx lr
212 %x = call <6 x i32> @llvm.fptosi.sat.v6f32.v6i32(<6 x float> %f)
213 ret <6 x i32> %x
214 }
216 define arm_aapcs_vfpcc <7 x i32> @test_signed_v7f32_v7i32(<7 x float> %f) {
217 ; CHECK-MVE-LABEL: test_signed_v7f32_v7i32:
218 ; CHECK-MVE: @ %bb.0:
219 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
220 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
221 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s3
222 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s1
223 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s5
224 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
225 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s6
226 ; CHECK-MVE-NEXT: vmov r1, s2
227 ; CHECK-MVE-NEXT: vmov r2, s0
228 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r2, r1
229 ; CHECK-MVE-NEXT: vmov r1, s10
230 ; CHECK-MVE-NEXT: vmov r2, s12
231 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r2, r1
232 ; CHECK-MVE-NEXT: vstr s8, [r0, #20]
233 ; CHECK-MVE-NEXT: vstr s4, [r0, #16]
234 ; CHECK-MVE-NEXT: vstrw.32 q0, [r0]
235 ; CHECK-MVE-NEXT: vstr s6, [r0, #24]
236 ; CHECK-MVE-NEXT: bx lr
237 ;
238 ; CHECK-MVEFP-LABEL: test_signed_v7f32_v7i32:
239 ; CHECK-MVEFP: @ %bb.0:
240 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q1, q1
241 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
242 ; CHECK-MVEFP-NEXT: vmov.f32 s10, s5
243 ; CHECK-MVEFP-NEXT: vmov r2, s4
244 ; CHECK-MVEFP-NEXT: vmov r3, s6
245 ; CHECK-MVEFP-NEXT: vmov r1, s10
246 ; CHECK-MVEFP-NEXT: strd r2, r1, [r0, #16]
247 ; CHECK-MVEFP-NEXT: str r3, [r0, #24]
248 ; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]
249 ; CHECK-MVEFP-NEXT: bx lr
250 %x = call <7 x i32> @llvm.fptosi.sat.v7f32.v7i32(<7 x float> %f)
251 ret <7 x i32> %x
252 }
254 define arm_aapcs_vfpcc <8 x i32> @test_signed_v8f32_v8i32(<8 x float> %f) {
255 ; CHECK-MVE-LABEL: test_signed_v8f32_v8i32:
256 ; CHECK-MVE: @ %bb.0:
257 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
258 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
259 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s3
260 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s1
261 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s6
262 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
263 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s7
264 ; CHECK-MVE-NEXT: vcvt.s32.f32 s14, s5
265 ; CHECK-MVE-NEXT: vmov r0, s2
266 ; CHECK-MVE-NEXT: vmov r1, s0
267 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
268 ; CHECK-MVE-NEXT: vmov r0, s8
269 ; CHECK-MVE-NEXT: vmov r1, s10
270 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0
271 ; CHECK-MVE-NEXT: vmov r0, s6
272 ; CHECK-MVE-NEXT: vmov r1, s4
273 ; CHECK-MVE-NEXT: vmov q1[2], q1[0], r1, r0
274 ; CHECK-MVE-NEXT: vmov r0, s12
275 ; CHECK-MVE-NEXT: vmov r1, s14
276 ; CHECK-MVE-NEXT: vmov q1[3], q1[1], r1, r0
277 ; CHECK-MVE-NEXT: bx lr
278 ;
279 ; CHECK-MVEFP-LABEL: test_signed_v8f32_v8i32:
280 ; CHECK-MVEFP: @ %bb.0:
281 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
282 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q1, q1
283 ; CHECK-MVEFP-NEXT: bx lr
284 %x = call <8 x i32> @llvm.fptosi.sat.v8f32.v8i32(<8 x float> %f)
285 ret <8 x i32> %x
286 }
288 ;
289 ; Double to signed 32-bit -- Vector size variation
290 ;
292 declare <1 x i32> @llvm.fptosi.sat.v1f64.v1i32 (<1 x double>)
293 declare <2 x i32> @llvm.fptosi.sat.v2f64.v2i32 (<2 x double>)
294 declare <3 x i32> @llvm.fptosi.sat.v3f64.v3i32 (<3 x double>)
295 declare <4 x i32> @llvm.fptosi.sat.v4f64.v4i32 (<4 x double>)
296 declare <5 x i32> @llvm.fptosi.sat.v5f64.v5i32 (<5 x double>)
297 declare <6 x i32> @llvm.fptosi.sat.v6f64.v6i32 (<6 x double>)
299 define arm_aapcs_vfpcc <1 x i32> @test_signed_v1f64_v1i32(<1 x double> %f) {
300 ; CHECK-LABEL: test_signed_v1f64_v1i32:
301 ; CHECK: @ %bb.0:
302 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, lr}
303 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}
304 ; CHECK-NEXT: vldr d1, .LCPI8_0
305 ; CHECK-NEXT: vmov r5, r4, d0
306 ; CHECK-NEXT: vmov r2, r3, d1
307 ; CHECK-NEXT: mov r0, r5
308 ; CHECK-NEXT: mov r1, r4
309 ; CHECK-NEXT: bl __aeabi_dcmpgt
310 ; CHECK-NEXT: vldr d0, .LCPI8_1
311 ; CHECK-NEXT: mov r8, r0
312 ; CHECK-NEXT: mov r0, r5
313 ; CHECK-NEXT: mov r1, r4
314 ; CHECK-NEXT: vmov r2, r3, d0
315 ; CHECK-NEXT: bl __aeabi_dcmpge
316 ; CHECK-NEXT: mov r7, r0
317 ; CHECK-NEXT: mov r0, r5
318 ; CHECK-NEXT: mov r1, r4
319 ; CHECK-NEXT: bl __aeabi_d2iz
320 ; CHECK-NEXT: mov r6, r0
321 ; CHECK-NEXT: cmp r7, #0
322 ; CHECK-NEXT: it eq
323 ; CHECK-NEXT: moveq.w r6, #-2147483648
324 ; CHECK-NEXT: mov r0, r5
325 ; CHECK-NEXT: mov r1, r4
326 ; CHECK-NEXT: mov r2, r5
327 ; CHECK-NEXT: mov r3, r4
328 ; CHECK-NEXT: cmp.w r8, #0
329 ; CHECK-NEXT: it ne
330 ; CHECK-NEXT: mvnne r6, #-2147483648
331 ; CHECK-NEXT: bl __aeabi_dcmpun
332 ; CHECK-NEXT: cmp r0, #0
333 ; CHECK-NEXT: it ne
334 ; CHECK-NEXT: movne r6, #0
335 ; CHECK-NEXT: mov r0, r6
336 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}
337 ; CHECK-NEXT: .p2align 3
338 ; CHECK-NEXT: @ %bb.1:
339 ; CHECK-NEXT: .LCPI8_0:
340 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
341 ; CHECK-NEXT: .long 1105199103
342 ; CHECK-NEXT: .LCPI8_1:
343 ; CHECK-NEXT: .long 0 @ double -2147483648
344 ; CHECK-NEXT: .long 3252682752
345 %x = call <1 x i32> @llvm.fptosi.sat.v1f64.v1i32(<1 x double> %f)
346 ret <1 x i32> %x
347 }
349 define arm_aapcs_vfpcc <2 x i32> @test_signed_v2f64_v2i32(<2 x double> %f) {
350 ; CHECK-LABEL: test_signed_v2f64_v2i32:
351 ; CHECK: @ %bb.0:
352 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
353 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
354 ; CHECK-NEXT: .pad #4
355 ; CHECK-NEXT: sub sp, #4
356 ; CHECK-NEXT: .vsave {d8, d9}
357 ; CHECK-NEXT: vpush {d8, d9}
358 ; CHECK-NEXT: .pad #24
359 ; CHECK-NEXT: sub sp, #24
360 ; CHECK-NEXT: vmov q4, q0
361 ; CHECK-NEXT: vldr d0, .LCPI9_0
362 ; CHECK-NEXT: vmov r8, r7, d9
363 ; CHECK-NEXT: vmov r2, r3, d0
364 ; CHECK-NEXT: mov r0, r8
365 ; CHECK-NEXT: mov r1, r7
366 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
367 ; CHECK-NEXT: bl __aeabi_dcmpge
368 ; CHECK-NEXT: clz r0, r0
369 ; CHECK-NEXT: vldr d0, .LCPI9_1
370 ; CHECK-NEXT: mov r1, r7
371 ; CHECK-NEXT: lsrs r4, r0, #5
372 ; CHECK-NEXT: mov r0, r8
373 ; CHECK-NEXT: vmov r6, r5, d0
374 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
375 ; CHECK-NEXT: bl __aeabi_d2lz
376 ; CHECK-NEXT: mov r11, r0
377 ; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill
378 ; CHECK-NEXT: mov r0, r8
379 ; CHECK-NEXT: mov r1, r7
380 ; CHECK-NEXT: mov r2, r6
381 ; CHECK-NEXT: mov r3, r5
382 ; CHECK-NEXT: cmp r4, #0
383 ; CHECK-NEXT: it ne
384 ; CHECK-NEXT: movne.w r11, #-2147483648
385 ; CHECK-NEXT: bl __aeabi_dcmpgt
386 ; CHECK-NEXT: cmp r0, #0
387 ; CHECK-NEXT: it ne
388 ; CHECK-NEXT: movne r0, #1
389 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
390 ; CHECK-NEXT: cmp r0, #0
391 ; CHECK-NEXT: mov r0, r8
392 ; CHECK-NEXT: mov r1, r7
393 ; CHECK-NEXT: mov r2, r8
394 ; CHECK-NEXT: mov r3, r7
395 ; CHECK-NEXT: it ne
396 ; CHECK-NEXT: mvnne r11, #-2147483648
397 ; CHECK-NEXT: bl __aeabi_dcmpun
398 ; CHECK-NEXT: vmov r10, r7, d8
399 ; CHECK-NEXT: mov r8, r0
400 ; CHECK-NEXT: cmp r0, #0
401 ; CHECK-NEXT: mov r2, r6
402 ; CHECK-NEXT: mov r3, r5
403 ; CHECK-NEXT: it ne
404 ; CHECK-NEXT: movne.w r8, #1
405 ; CHECK-NEXT: cmp.w r8, #0
406 ; CHECK-NEXT: it ne
407 ; CHECK-NEXT: movne.w r11, #0
408 ; CHECK-NEXT: mov r0, r10
409 ; CHECK-NEXT: mov r1, r7
410 ; CHECK-NEXT: bl __aeabi_dcmpgt
411 ; CHECK-NEXT: mov r6, r0
412 ; CHECK-NEXT: cmp r0, #0
413 ; CHECK-NEXT: it ne
414 ; CHECK-NEXT: movne r6, #1
415 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
416 ; CHECK-NEXT: mov r0, r10
417 ; CHECK-NEXT: mov r1, r7
418 ; CHECK-NEXT: bl __aeabi_dcmpge
419 ; CHECK-NEXT: clz r0, r0
420 ; CHECK-NEXT: mov r1, r7
421 ; CHECK-NEXT: lsr.w r9, r0, #5
422 ; CHECK-NEXT: mov r0, r10
423 ; CHECK-NEXT: bl __aeabi_d2lz
424 ; CHECK-NEXT: mov r5, r0
425 ; CHECK-NEXT: mov r4, r1
426 ; CHECK-NEXT: cmp.w r9, #0
427 ; CHECK-NEXT: it ne
428 ; CHECK-NEXT: movne.w r5, #-2147483648
429 ; CHECK-NEXT: mov r0, r10
430 ; CHECK-NEXT: mov r1, r7
431 ; CHECK-NEXT: mov r2, r10
432 ; CHECK-NEXT: mov r3, r7
433 ; CHECK-NEXT: cmp r6, #0
434 ; CHECK-NEXT: it ne
435 ; CHECK-NEXT: mvnne r5, #-2147483648
436 ; CHECK-NEXT: bl __aeabi_dcmpun
437 ; CHECK-NEXT: cmp r0, #0
438 ; CHECK-NEXT: it ne
439 ; CHECK-NEXT: movne r0, #1
440 ; CHECK-NEXT: cmp r0, #0
441 ; CHECK-NEXT: it ne
442 ; CHECK-NEXT: movne r5, #0
443 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
444 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
445 ; CHECK-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
446 ; CHECK-NEXT: cmp r1, #0
447 ; CHECK-NEXT: it ne
448 ; CHECK-NEXT: movne.w r2, #-1
449 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
450 ; CHECK-NEXT: cmp r1, #0
451 ; CHECK-NEXT: it ne
452 ; CHECK-NEXT: movne r2, #0
453 ; CHECK-NEXT: cmp.w r8, #0
454 ; CHECK-NEXT: it ne
455 ; CHECK-NEXT: movne r2, #0
456 ; CHECK-NEXT: cmp.w r9, #0
457 ; CHECK-NEXT: it ne
458 ; CHECK-NEXT: movne.w r4, #-1
459 ; CHECK-NEXT: cmp r6, #0
460 ; CHECK-NEXT: it ne
461 ; CHECK-NEXT: movne r4, #0
462 ; CHECK-NEXT: cmp r0, #0
463 ; CHECK-NEXT: it ne
464 ; CHECK-NEXT: movne r4, #0
465 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r2
466 ; CHECK-NEXT: add sp, #24
467 ; CHECK-NEXT: vpop {d8, d9}
468 ; CHECK-NEXT: add sp, #4
469 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
470 ; CHECK-NEXT: .p2align 3
471 ; CHECK-NEXT: @ %bb.1:
472 ; CHECK-NEXT: .LCPI9_0:
473 ; CHECK-NEXT: .long 0 @ double -2147483648
474 ; CHECK-NEXT: .long 3252682752
475 ; CHECK-NEXT: .LCPI9_1:
476 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
477 ; CHECK-NEXT: .long 1105199103
478 %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
479 ret <2 x i32> %x
480 }
482 define arm_aapcs_vfpcc <3 x i32> @test_signed_v3f64_v3i32(<3 x double> %f) {
483 ; CHECK-LABEL: test_signed_v3f64_v3i32:
484 ; CHECK: @ %bb.0:
485 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
486 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
487 ; CHECK-NEXT: .pad #4
488 ; CHECK-NEXT: sub sp, #4
489 ; CHECK-NEXT: .vsave {d8, d9}
490 ; CHECK-NEXT: vpush {d8, d9}
491 ; CHECK-NEXT: .pad #24
492 ; CHECK-NEXT: sub sp, #24
493 ; CHECK-NEXT: vmov.f32 s16, s0
494 ; CHECK-NEXT: vmov.f32 s17, s1
495 ; CHECK-NEXT: vldr d0, .LCPI10_0
496 ; CHECK-NEXT: vmov r4, r6, d1
497 ; CHECK-NEXT: vmov r2, r11, d0
498 ; CHECK-NEXT: vmov.f32 s18, s4
499 ; CHECK-NEXT: vmov.f32 s19, s5
500 ; CHECK-NEXT: str r2, [sp, #20] @ 4-byte Spill
501 ; CHECK-NEXT: mov r0, r4
502 ; CHECK-NEXT: mov r1, r6
503 ; CHECK-NEXT: mov r3, r11
504 ; CHECK-NEXT: str.w r11, [sp, #12] @ 4-byte Spill
505 ; CHECK-NEXT: bl __aeabi_dcmpgt
506 ; CHECK-NEXT: vldr d0, .LCPI10_1
507 ; CHECK-NEXT: mov r1, r6
508 ; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill
509 ; CHECK-NEXT: mov r0, r4
510 ; CHECK-NEXT: vmov r2, r8, d0
511 ; CHECK-NEXT: str r2, [sp, #16] @ 4-byte Spill
512 ; CHECK-NEXT: str.w r8, [sp, #8] @ 4-byte Spill
513 ; CHECK-NEXT: mov r3, r8
514 ; CHECK-NEXT: bl __aeabi_dcmpge
515 ; CHECK-NEXT: mov r9, r0
516 ; CHECK-NEXT: mov r0, r4
517 ; CHECK-NEXT: mov r1, r6
518 ; CHECK-NEXT: bl __aeabi_d2lz
519 ; CHECK-NEXT: mov r10, r0
520 ; CHECK-NEXT: cmp.w r9, #0
521 ; CHECK-NEXT: it eq
522 ; CHECK-NEXT: moveq.w r10, #-2147483648
523 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
524 ; CHECK-NEXT: mov r1, r6
525 ; CHECK-NEXT: mov r2, r4
526 ; CHECK-NEXT: cmp r0, #0
527 ; CHECK-NEXT: mov r0, r4
528 ; CHECK-NEXT: mov r3, r6
529 ; CHECK-NEXT: vmov r5, r7, d9
530 ; CHECK-NEXT: it ne
531 ; CHECK-NEXT: mvnne r10, #-2147483648
532 ; CHECK-NEXT: bl __aeabi_dcmpun
533 ; CHECK-NEXT: cmp r0, #0
534 ; CHECK-NEXT: it ne
535 ; CHECK-NEXT: movne.w r10, #0
536 ; CHECK-NEXT: ldr r2, [sp, #20] @ 4-byte Reload
537 ; CHECK-NEXT: mov r0, r5
538 ; CHECK-NEXT: mov r1, r7
539 ; CHECK-NEXT: mov r3, r11
540 ; CHECK-NEXT: bl __aeabi_dcmpgt
541 ; CHECK-NEXT: ldr r2, [sp, #16] @ 4-byte Reload
542 ; CHECK-NEXT: mov r4, r0
543 ; CHECK-NEXT: mov r0, r5
544 ; CHECK-NEXT: mov r1, r7
545 ; CHECK-NEXT: mov r3, r8
546 ; CHECK-NEXT: bl __aeabi_dcmpge
547 ; CHECK-NEXT: mov r11, r0
548 ; CHECK-NEXT: mov r0, r5
549 ; CHECK-NEXT: mov r1, r7
550 ; CHECK-NEXT: bl __aeabi_d2lz
551 ; CHECK-NEXT: mov r6, r0
552 ; CHECK-NEXT: cmp.w r11, #0
553 ; CHECK-NEXT: it eq
554 ; CHECK-NEXT: moveq.w r6, #-2147483648
555 ; CHECK-NEXT: mov r0, r5
556 ; CHECK-NEXT: mov r1, r7
557 ; CHECK-NEXT: mov r2, r5
558 ; CHECK-NEXT: mov r3, r7
559 ; CHECK-NEXT: cmp r4, #0
560 ; CHECK-NEXT: vmov r9, r8, d8
561 ; CHECK-NEXT: it ne
562 ; CHECK-NEXT: mvnne r6, #-2147483648
563 ; CHECK-NEXT: bl __aeabi_dcmpun
564 ; CHECK-NEXT: cmp r0, #0
565 ; CHECK-NEXT: it ne
566 ; CHECK-NEXT: movne r6, #0
567 ; CHECK-NEXT: ldr r2, [sp, #20] @ 4-byte Reload
568 ; CHECK-NEXT: mov r0, r9
569 ; CHECK-NEXT: ldr r3, [sp, #12] @ 4-byte Reload
570 ; CHECK-NEXT: mov r1, r8
571 ; CHECK-NEXT: bl __aeabi_dcmpgt
572 ; CHECK-NEXT: ldr r2, [sp, #16] @ 4-byte Reload
573 ; CHECK-NEXT: mov r4, r0
574 ; CHECK-NEXT: ldr r3, [sp, #8] @ 4-byte Reload
575 ; CHECK-NEXT: mov r0, r9
576 ; CHECK-NEXT: mov r1, r8
577 ; CHECK-NEXT: bl __aeabi_dcmpge
578 ; CHECK-NEXT: mov r5, r0
579 ; CHECK-NEXT: mov r0, r9
580 ; CHECK-NEXT: mov r1, r8
581 ; CHECK-NEXT: bl __aeabi_d2lz
582 ; CHECK-NEXT: mov r7, r0
583 ; CHECK-NEXT: cmp r5, #0
584 ; CHECK-NEXT: it eq
585 ; CHECK-NEXT: moveq.w r7, #-2147483648
586 ; CHECK-NEXT: mov r0, r9
587 ; CHECK-NEXT: mov r1, r8
588 ; CHECK-NEXT: mov r2, r9
589 ; CHECK-NEXT: mov r3, r8
590 ; CHECK-NEXT: cmp r4, #0
591 ; CHECK-NEXT: it ne
592 ; CHECK-NEXT: mvnne r7, #-2147483648
593 ; CHECK-NEXT: bl __aeabi_dcmpun
594 ; CHECK-NEXT: vmov.32 q0[1], r10
595 ; CHECK-NEXT: cmp r0, #0
596 ; CHECK-NEXT: it ne
597 ; CHECK-NEXT: movne r7, #0
598 ; CHECK-NEXT: vmov q0[2], q0[0], r7, r6
599 ; CHECK-NEXT: add sp, #24
600 ; CHECK-NEXT: vpop {d8, d9}
601 ; CHECK-NEXT: add sp, #4
602 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
603 ; CHECK-NEXT: .p2align 3
604 ; CHECK-NEXT: @ %bb.1:
605 ; CHECK-NEXT: .LCPI10_0:
606 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
607 ; CHECK-NEXT: .long 1105199103
608 ; CHECK-NEXT: .LCPI10_1:
609 ; CHECK-NEXT: .long 0 @ double -2147483648
610 ; CHECK-NEXT: .long 3252682752
611 %x = call <3 x i32> @llvm.fptosi.sat.v3f64.v3i32(<3 x double> %f)
612 ret <3 x i32> %x
613 }
615 define arm_aapcs_vfpcc <4 x i32> @test_signed_v4f64_v4i32(<4 x double> %f) {
616 ; CHECK-LABEL: test_signed_v4f64_v4i32:
617 ; CHECK: @ %bb.0:
618 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
619 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
620 ; CHECK-NEXT: .pad #4
621 ; CHECK-NEXT: sub sp, #4
622 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
623 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
624 ; CHECK-NEXT: .pad #32
625 ; CHECK-NEXT: sub sp, #32
626 ; CHECK-NEXT: vmov q4, q0
627 ; CHECK-NEXT: vldr d0, .LCPI11_0
628 ; CHECK-NEXT: vmov q5, q1
629 ; CHECK-NEXT: vmov r5, r6, d10
630 ; CHECK-NEXT: vmov r9, r3, d0
631 ; CHECK-NEXT: str r3, [sp, #24] @ 4-byte Spill
632 ; CHECK-NEXT: mov r0, r5
633 ; CHECK-NEXT: mov r1, r6
634 ; CHECK-NEXT: mov r2, r9
635 ; CHECK-NEXT: bl __aeabi_dcmpgt
636 ; CHECK-NEXT: vldr d0, .LCPI11_1
637 ; CHECK-NEXT: mov r4, r0
638 ; CHECK-NEXT: mov r0, r5
639 ; CHECK-NEXT: mov r1, r6
640 ; CHECK-NEXT: vmov r2, r3, d0
641 ; CHECK-NEXT: str r3, [sp, #20] @ 4-byte Spill
642 ; CHECK-NEXT: str r2, [sp, #28] @ 4-byte Spill
643 ; CHECK-NEXT: bl __aeabi_dcmpge
644 ; CHECK-NEXT: mov r8, r0
645 ; CHECK-NEXT: mov r0, r5
646 ; CHECK-NEXT: mov r1, r6
647 ; CHECK-NEXT: bl __aeabi_d2lz
648 ; CHECK-NEXT: vmov r11, r1, d11
649 ; CHECK-NEXT: cmp.w r8, #0
650 ; CHECK-NEXT: mov r2, r5
651 ; CHECK-NEXT: mov r3, r6
652 ; CHECK-NEXT: vmov r7, r10, d8
653 ; CHECK-NEXT: str r1, [sp, #12] @ 4-byte Spill
654 ; CHECK-NEXT: it eq
655 ; CHECK-NEXT: moveq.w r0, #-2147483648
656 ; CHECK-NEXT: cmp r4, #0
657 ; CHECK-NEXT: it ne
658 ; CHECK-NEXT: mvnne r0, #-2147483648
659 ; CHECK-NEXT: mov r4, r0
660 ; CHECK-NEXT: mov r0, r5
661 ; CHECK-NEXT: mov r1, r6
662 ; CHECK-NEXT: bl __aeabi_dcmpun
663 ; CHECK-NEXT: cmp r0, #0
664 ; CHECK-NEXT: it ne
665 ; CHECK-NEXT: movne r4, #0
666 ; CHECK-NEXT: ldr.w r8, [sp, #24] @ 4-byte Reload
667 ; CHECK-NEXT: mov r0, r7
668 ; CHECK-NEXT: mov r1, r10
669 ; CHECK-NEXT: mov r2, r9
670 ; CHECK-NEXT: str r4, [sp, #16] @ 4-byte Spill
671 ; CHECK-NEXT: mov r3, r8
672 ; CHECK-NEXT: str.w r9, [sp, #8] @ 4-byte Spill
673 ; CHECK-NEXT: bl __aeabi_dcmpgt
674 ; CHECK-NEXT: ldr r4, [sp, #20] @ 4-byte Reload
675 ; CHECK-NEXT: mov r1, r10
676 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
677 ; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill
678 ; CHECK-NEXT: mov r0, r7
679 ; CHECK-NEXT: mov r3, r4
680 ; CHECK-NEXT: bl __aeabi_dcmpge
681 ; CHECK-NEXT: mov r5, r0
682 ; CHECK-NEXT: mov r0, r7
683 ; CHECK-NEXT: mov r1, r10
684 ; CHECK-NEXT: bl __aeabi_d2lz
685 ; CHECK-NEXT: mov r6, r0
686 ; CHECK-NEXT: cmp r5, #0
687 ; CHECK-NEXT: it eq
688 ; CHECK-NEXT: moveq.w r6, #-2147483648
689 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
690 ; CHECK-NEXT: mov r1, r10
691 ; CHECK-NEXT: mov r2, r7
692 ; CHECK-NEXT: cmp r0, #0
693 ; CHECK-NEXT: mov r0, r7
694 ; CHECK-NEXT: mov r3, r10
695 ; CHECK-NEXT: it ne
696 ; CHECK-NEXT: mvnne r6, #-2147483648
697 ; CHECK-NEXT: bl __aeabi_dcmpun
698 ; CHECK-NEXT: cmp r0, #0
699 ; CHECK-NEXT: it ne
700 ; CHECK-NEXT: movne r6, #0
701 ; CHECK-NEXT: ldr r5, [sp, #12] @ 4-byte Reload
702 ; CHECK-NEXT: mov r0, r11
703 ; CHECK-NEXT: mov r2, r9
704 ; CHECK-NEXT: mov r3, r8
705 ; CHECK-NEXT: mov r1, r5
706 ; CHECK-NEXT: bl __aeabi_dcmpgt
707 ; CHECK-NEXT: ldr.w r9, [sp, #28] @ 4-byte Reload
708 ; CHECK-NEXT: mov r10, r0
709 ; CHECK-NEXT: mov r0, r11
710 ; CHECK-NEXT: mov r1, r5
711 ; CHECK-NEXT: mov r3, r4
712 ; CHECK-NEXT: mov r2, r9
713 ; CHECK-NEXT: bl __aeabi_dcmpge
714 ; CHECK-NEXT: mov r4, r0
715 ; CHECK-NEXT: mov r0, r11
716 ; CHECK-NEXT: mov r1, r5
717 ; CHECK-NEXT: bl __aeabi_d2lz
718 ; CHECK-NEXT: mov r8, r0
719 ; CHECK-NEXT: cmp r4, #0
720 ; CHECK-NEXT: it eq
721 ; CHECK-NEXT: moveq.w r8, #-2147483648
722 ; CHECK-NEXT: mov r0, r11
723 ; CHECK-NEXT: mov r1, r5
724 ; CHECK-NEXT: mov r2, r11
725 ; CHECK-NEXT: mov r3, r5
726 ; CHECK-NEXT: cmp.w r10, #0
727 ; CHECK-NEXT: vmov r7, r4, d9
728 ; CHECK-NEXT: it ne
729 ; CHECK-NEXT: mvnne r8, #-2147483648
730 ; CHECK-NEXT: bl __aeabi_dcmpun
731 ; CHECK-NEXT: cmp r0, #0
732 ; CHECK-NEXT: it ne
733 ; CHECK-NEXT: movne.w r8, #0
734 ; CHECK-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
735 ; CHECK-NEXT: mov r0, r7
736 ; CHECK-NEXT: ldr r3, [sp, #24] @ 4-byte Reload
737 ; CHECK-NEXT: mov r1, r4
738 ; CHECK-NEXT: bl __aeabi_dcmpgt
739 ; CHECK-NEXT: ldr r3, [sp, #20] @ 4-byte Reload
740 ; CHECK-NEXT: mov r10, r0
741 ; CHECK-NEXT: mov r0, r7
742 ; CHECK-NEXT: mov r1, r4
743 ; CHECK-NEXT: mov r2, r9
744 ; CHECK-NEXT: bl __aeabi_dcmpge
745 ; CHECK-NEXT: mov r11, r0
746 ; CHECK-NEXT: mov r0, r7
747 ; CHECK-NEXT: mov r1, r4
748 ; CHECK-NEXT: bl __aeabi_d2lz
749 ; CHECK-NEXT: mov r5, r0
750 ; CHECK-NEXT: cmp.w r11, #0
751 ; CHECK-NEXT: it eq
752 ; CHECK-NEXT: moveq.w r5, #-2147483648
753 ; CHECK-NEXT: mov r0, r7
754 ; CHECK-NEXT: mov r1, r4
755 ; CHECK-NEXT: mov r2, r7
756 ; CHECK-NEXT: mov r3, r4
757 ; CHECK-NEXT: cmp.w r10, #0
758 ; CHECK-NEXT: it ne
759 ; CHECK-NEXT: mvnne r5, #-2147483648
760 ; CHECK-NEXT: bl __aeabi_dcmpun
761 ; CHECK-NEXT: cmp r0, #0
762 ; CHECK-NEXT: it ne
763 ; CHECK-NEXT: movne r5, #0
764 ; CHECK-NEXT: ldr r0, [sp, #16] @ 4-byte Reload
765 ; CHECK-NEXT: vmov q0[2], q0[0], r6, r0
766 ; CHECK-NEXT: vmov q0[3], q0[1], r5, r8
767 ; CHECK-NEXT: add sp, #32
768 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
769 ; CHECK-NEXT: add sp, #4
770 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
771 ; CHECK-NEXT: .p2align 3
772 ; CHECK-NEXT: @ %bb.1:
773 ; CHECK-NEXT: .LCPI11_0:
774 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
775 ; CHECK-NEXT: .long 1105199103
776 ; CHECK-NEXT: .LCPI11_1:
777 ; CHECK-NEXT: .long 0 @ double -2147483648
778 ; CHECK-NEXT: .long 3252682752
779 %x = call <4 x i32> @llvm.fptosi.sat.v4f64.v4i32(<4 x double> %f)
780 ret <4 x i32> %x
781 }
783 define arm_aapcs_vfpcc <5 x i32> @test_signed_v5f64_v5i32(<5 x double> %f) {
784 ; CHECK-LABEL: test_signed_v5f64_v5i32:
785 ; CHECK: @ %bb.0:
786 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
787 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
788 ; CHECK-NEXT: .pad #4
789 ; CHECK-NEXT: sub sp, #4
790 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
791 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
792 ; CHECK-NEXT: .pad #32
793 ; CHECK-NEXT: sub sp, #32
794 ; CHECK-NEXT: vmov.f32 s16, s0
795 ; CHECK-NEXT: mov r7, r0
796 ; CHECK-NEXT: vmov.f32 s17, s1
797 ; CHECK-NEXT: vldr d0, .LCPI12_0
798 ; CHECK-NEXT: vmov r5, r4, d4
799 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
800 ; CHECK-NEXT: vmov r2, r3, d0
801 ; CHECK-NEXT: vmov.f32 s20, s6
802 ; CHECK-NEXT: vmov.f32 s18, s4
803 ; CHECK-NEXT: vmov.f32 s22, s2
804 ; CHECK-NEXT: vmov.f32 s21, s7
805 ; CHECK-NEXT: vmov.f32 s19, s5
806 ; CHECK-NEXT: vmov.f32 s23, s3
807 ; CHECK-NEXT: mov r0, r5
808 ; CHECK-NEXT: mov r1, r4
809 ; CHECK-NEXT: strd r2, r3, [sp, #20] @ 8-byte Folded Spill
810 ; CHECK-NEXT: bl __aeabi_dcmpgt
811 ; CHECK-NEXT: vldr d0, .LCPI12_1
812 ; CHECK-NEXT: mov r1, r4
813 ; CHECK-NEXT: str r0, [sp, #12] @ 4-byte Spill
814 ; CHECK-NEXT: mov r0, r5
815 ; CHECK-NEXT: vmov r2, r3, d0
816 ; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill
817 ; CHECK-NEXT: str r2, [sp, #28] @ 4-byte Spill
818 ; CHECK-NEXT: bl __aeabi_dcmpge
819 ; CHECK-NEXT: mov r10, r0
820 ; CHECK-NEXT: mov r0, r5
821 ; CHECK-NEXT: mov r1, r4
822 ; CHECK-NEXT: bl __aeabi_d2lz
823 ; CHECK-NEXT: mov r11, r0
824 ; CHECK-NEXT: vmov r8, r0, d11
825 ; CHECK-NEXT: cmp.w r10, #0
826 ; CHECK-NEXT: mov r1, r4
827 ; CHECK-NEXT: mov r2, r5
828 ; CHECK-NEXT: mov r3, r4
829 ; CHECK-NEXT: vmov r9, r6, d10
830 ; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
831 ; CHECK-NEXT: it eq
832 ; CHECK-NEXT: moveq.w r11, #-2147483648
833 ; CHECK-NEXT: ldr r0, [sp, #12] @ 4-byte Reload
834 ; CHECK-NEXT: cmp r0, #0
835 ; CHECK-NEXT: mov r0, r5
836 ; CHECK-NEXT: it ne
837 ; CHECK-NEXT: mvnne r11, #-2147483648
838 ; CHECK-NEXT: bl __aeabi_dcmpun
839 ; CHECK-NEXT: cmp r0, #0
840 ; CHECK-NEXT: it ne
841 ; CHECK-NEXT: movne.w r11, #0
842 ; CHECK-NEXT: str.w r11, [r7, #16]
843 ; CHECK-NEXT: mov r0, r9
844 ; CHECK-NEXT: ldr.w r10, [sp, #20] @ 4-byte Reload
845 ; CHECK-NEXT: mov r1, r6
846 ; CHECK-NEXT: ldr r7, [sp, #24] @ 4-byte Reload
847 ; CHECK-NEXT: mov r2, r10
848 ; CHECK-NEXT: mov r3, r7
849 ; CHECK-NEXT: bl __aeabi_dcmpgt
850 ; CHECK-NEXT: ldr r4, [sp, #28] @ 4-byte Reload
851 ; CHECK-NEXT: mov r1, r6
852 ; CHECK-NEXT: ldr.w r11, [sp, #4] @ 4-byte Reload
853 ; CHECK-NEXT: str r0, [sp, #12] @ 4-byte Spill
854 ; CHECK-NEXT: mov r0, r9
855 ; CHECK-NEXT: mov r2, r4
856 ; CHECK-NEXT: mov r3, r11
857 ; CHECK-NEXT: bl __aeabi_dcmpge
858 ; CHECK-NEXT: mov r5, r0
859 ; CHECK-NEXT: mov r0, r9
860 ; CHECK-NEXT: mov r1, r6
861 ; CHECK-NEXT: bl __aeabi_d2lz
862 ; CHECK-NEXT: cmp r5, #0
863 ; CHECK-NEXT: it eq
864 ; CHECK-NEXT: moveq.w r0, #-2147483648
865 ; CHECK-NEXT: ldr r1, [sp, #12] @ 4-byte Reload
866 ; CHECK-NEXT: mov r2, r9
867 ; CHECK-NEXT: mov r3, r6
868 ; CHECK-NEXT: cmp r1, #0
869 ; CHECK-NEXT: it ne
870 ; CHECK-NEXT: mvnne r0, #-2147483648
871 ; CHECK-NEXT: mov r5, r0
872 ; CHECK-NEXT: mov r0, r9
873 ; CHECK-NEXT: mov r1, r6
874 ; CHECK-NEXT: bl __aeabi_dcmpun
875 ; CHECK-NEXT: cmp r0, #0
876 ; CHECK-NEXT: it ne
877 ; CHECK-NEXT: movne r5, #0
878 ; CHECK-NEXT: str r5, [sp, #12] @ 4-byte Spill
879 ; CHECK-NEXT: mov r0, r8
880 ; CHECK-NEXT: ldr r5, [sp, #8] @ 4-byte Reload
881 ; CHECK-NEXT: mov r2, r10
882 ; CHECK-NEXT: mov r3, r7
883 ; CHECK-NEXT: mov r1, r5
884 ; CHECK-NEXT: bl __aeabi_dcmpgt
885 ; CHECK-NEXT: mov r9, r0
886 ; CHECK-NEXT: mov r0, r8
887 ; CHECK-NEXT: mov r1, r5
888 ; CHECK-NEXT: mov r2, r4
889 ; CHECK-NEXT: mov r3, r11
890 ; CHECK-NEXT: mov r6, r11
891 ; CHECK-NEXT: bl __aeabi_dcmpge
892 ; CHECK-NEXT: mov r7, r0
893 ; CHECK-NEXT: mov r0, r8
894 ; CHECK-NEXT: mov r1, r5
895 ; CHECK-NEXT: bl __aeabi_d2lz
896 ; CHECK-NEXT: mov r10, r0
897 ; CHECK-NEXT: cmp r7, #0
898 ; CHECK-NEXT: it eq
899 ; CHECK-NEXT: moveq.w r10, #-2147483648
900 ; CHECK-NEXT: mov r0, r8
901 ; CHECK-NEXT: mov r1, r5
902 ; CHECK-NEXT: mov r2, r8
903 ; CHECK-NEXT: mov r3, r5
904 ; CHECK-NEXT: cmp.w r9, #0
905 ; CHECK-NEXT: vmov r11, r4, d9
906 ; CHECK-NEXT: it ne
907 ; CHECK-NEXT: mvnne r10, #-2147483648
908 ; CHECK-NEXT: bl __aeabi_dcmpun
909 ; CHECK-NEXT: cmp r0, #0
910 ; CHECK-NEXT: it ne
911 ; CHECK-NEXT: movne.w r10, #0
912 ; CHECK-NEXT: ldrd r2, r3, [sp, #20] @ 8-byte Folded Reload
913 ; CHECK-NEXT: mov r0, r11
914 ; CHECK-NEXT: mov r1, r4
915 ; CHECK-NEXT: bl __aeabi_dcmpgt
916 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
917 ; CHECK-NEXT: mov r8, r0
918 ; CHECK-NEXT: mov r0, r11
919 ; CHECK-NEXT: mov r1, r4
920 ; CHECK-NEXT: mov r3, r6
921 ; CHECK-NEXT: bl __aeabi_dcmpge
922 ; CHECK-NEXT: mov r9, r0
923 ; CHECK-NEXT: mov r0, r11
924 ; CHECK-NEXT: mov r1, r4
925 ; CHECK-NEXT: bl __aeabi_d2lz
926 ; CHECK-NEXT: mov r7, r0
927 ; CHECK-NEXT: cmp.w r9, #0
928 ; CHECK-NEXT: it eq
929 ; CHECK-NEXT: moveq.w r7, #-2147483648
930 ; CHECK-NEXT: mov r0, r11
931 ; CHECK-NEXT: mov r1, r4
932 ; CHECK-NEXT: mov r2, r11
933 ; CHECK-NEXT: mov r3, r4
934 ; CHECK-NEXT: cmp.w r8, #0
935 ; CHECK-NEXT: it ne
936 ; CHECK-NEXT: mvnne r7, #-2147483648
937 ; CHECK-NEXT: bl __aeabi_dcmpun
938 ; CHECK-NEXT: vmov r5, r4, d8
939 ; CHECK-NEXT: cmp r0, #0
940 ; CHECK-NEXT: it ne
941 ; CHECK-NEXT: movne r7, #0
942 ; CHECK-NEXT: ldrd r2, r3, [sp, #20] @ 8-byte Folded Reload
943 ; CHECK-NEXT: mov r0, r5
944 ; CHECK-NEXT: mov r1, r4
945 ; CHECK-NEXT: bl __aeabi_dcmpgt
946 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
947 ; CHECK-NEXT: mov r8, r0
948 ; CHECK-NEXT: mov r0, r5
949 ; CHECK-NEXT: mov r1, r4
950 ; CHECK-NEXT: mov r3, r6
951 ; CHECK-NEXT: bl __aeabi_dcmpge
952 ; CHECK-NEXT: mov r9, r0
953 ; CHECK-NEXT: mov r0, r5
954 ; CHECK-NEXT: mov r1, r4
955 ; CHECK-NEXT: bl __aeabi_d2lz
956 ; CHECK-NEXT: mov r6, r0
957 ; CHECK-NEXT: cmp.w r9, #0
958 ; CHECK-NEXT: it eq
959 ; CHECK-NEXT: moveq.w r6, #-2147483648
960 ; CHECK-NEXT: mov r0, r5
961 ; CHECK-NEXT: mov r1, r4
962 ; CHECK-NEXT: mov r2, r5
963 ; CHECK-NEXT: mov r3, r4
964 ; CHECK-NEXT: cmp.w r8, #0
965 ; CHECK-NEXT: it ne
966 ; CHECK-NEXT: mvnne r6, #-2147483648
967 ; CHECK-NEXT: bl __aeabi_dcmpun
968 ; CHECK-NEXT: cmp r0, #0
969 ; CHECK-NEXT: it ne
970 ; CHECK-NEXT: movne r6, #0
971 ; CHECK-NEXT: ldr r0, [sp, #12] @ 4-byte Reload
972 ; CHECK-NEXT: vmov q0[2], q0[0], r6, r7
973 ; CHECK-NEXT: vmov q0[3], q0[1], r10, r0
974 ; CHECK-NEXT: ldr r0, [sp, #16] @ 4-byte Reload
975 ; CHECK-NEXT: vstrw.32 q0, [r0]
976 ; CHECK-NEXT: add sp, #32
977 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
978 ; CHECK-NEXT: add sp, #4
979 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
980 ; CHECK-NEXT: .p2align 3
981 ; CHECK-NEXT: @ %bb.1:
982 ; CHECK-NEXT: .LCPI12_0:
983 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
984 ; CHECK-NEXT: .long 1105199103
985 ; CHECK-NEXT: .LCPI12_1:
986 ; CHECK-NEXT: .long 0 @ double -2147483648
987 ; CHECK-NEXT: .long 3252682752
988 %x = call <5 x i32> @llvm.fptosi.sat.v5f64.v5i32(<5 x double> %f)
989 ret <5 x i32> %x
990 }
992 define arm_aapcs_vfpcc <6 x i32> @test_signed_v6f64_v6i32(<6 x double> %f) {
993 ; CHECK-LABEL: test_signed_v6f64_v6i32:
994 ; CHECK: @ %bb.0:
995 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
996 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
997 ; CHECK-NEXT: .pad #4
998 ; CHECK-NEXT: sub sp, #4
999 ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12}
1000 ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12}
1001 ; CHECK-NEXT: .pad #40
1002 ; CHECK-NEXT: sub sp, #40
1003 ; CHECK-NEXT: vmov.f32 s16, s0
1004 ; CHECK-NEXT: str r0, [sp, #20] @ 4-byte Spill
1005 ; CHECK-NEXT: vmov.f32 s17, s1
1006 ; CHECK-NEXT: vldr d0, .LCPI13_0
1007 ; CHECK-NEXT: vmov r9, r4, d5
1008 ; CHECK-NEXT: vmov r2, r6, d0
1009 ; CHECK-NEXT: vmov.f32 s22, s8
1010 ; CHECK-NEXT: vmov.f32 s20, s6
1011 ; CHECK-NEXT: vmov.f32 s18, s4
1012 ; CHECK-NEXT: vmov.f32 s24, s2
1013 ; CHECK-NEXT: vmov.f32 s23, s9
1014 ; CHECK-NEXT: vmov.f32 s21, s7
1015 ; CHECK-NEXT: vmov.f32 s19, s5
1016 ; CHECK-NEXT: vmov.f32 s25, s3
1017 ; CHECK-NEXT: str r2, [sp, #24] @ 4-byte Spill
1018 ; CHECK-NEXT: mov r0, r9
1019 ; CHECK-NEXT: mov r1, r4
1020 ; CHECK-NEXT: mov r3, r6
1021 ; CHECK-NEXT: str r6, [sp, #28] @ 4-byte Spill
1022 ; CHECK-NEXT: bl __aeabi_dcmpgt
1023 ; CHECK-NEXT: vldr d0, .LCPI13_1
1024 ; CHECK-NEXT: mov r1, r4
1025 ; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill
1026 ; CHECK-NEXT: mov r0, r9
1027 ; CHECK-NEXT: vmov r2, r3, d0
1028 ; CHECK-NEXT: strd r2, r3, [sp, #32] @ 8-byte Folded Spill
1029 ; CHECK-NEXT: bl __aeabi_dcmpge
1030 ; CHECK-NEXT: mov r11, r0
1031 ; CHECK-NEXT: mov r0, r9
1032 ; CHECK-NEXT: mov r1, r4
1033 ; CHECK-NEXT: bl __aeabi_d2lz
1034 ; CHECK-NEXT: mov r10, r0
1035 ; CHECK-NEXT: vmov r8, r0, d10
1036 ; CHECK-NEXT: cmp.w r11, #0
1037 ; CHECK-NEXT: mov r2, r9
1038 ; CHECK-NEXT: mov r3, r4
1039 ; CHECK-NEXT: vmov r7, r5, d11
1040 ; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
1041 ; CHECK-NEXT: vmov r1, r0, d12
1042 ; CHECK-NEXT: strd r1, r0, [sp, #12] @ 8-byte Folded Spill
1043 ; CHECK-NEXT: it eq
1044 ; CHECK-NEXT: moveq.w r10, #-2147483648
1045 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
1046 ; CHECK-NEXT: mov r1, r4
1047 ; CHECK-NEXT: cmp r0, #0
1048 ; CHECK-NEXT: mov r0, r9
1049 ; CHECK-NEXT: it ne
1050 ; CHECK-NEXT: mvnne r10, #-2147483648
1051 ; CHECK-NEXT: bl __aeabi_dcmpun
1052 ; CHECK-NEXT: cmp r0, #0
1053 ; CHECK-NEXT: it ne
1054 ; CHECK-NEXT: movne.w r10, #0
1055 ; CHECK-NEXT: ldr.w r11, [sp, #20] @ 4-byte Reload
1056 ; CHECK-NEXT: mov r0, r7
1057 ; CHECK-NEXT: mov r1, r5
1058 ; CHECK-NEXT: mov r3, r6
1059 ; CHECK-NEXT: str.w r10, [r11, #20]
1060 ; CHECK-NEXT: ldr.w r10, [sp, #24] @ 4-byte Reload
1061 ; CHECK-NEXT: mov r2, r10
1062 ; CHECK-NEXT: bl __aeabi_dcmpgt
1063 ; CHECK-NEXT: ldrd r2, r3, [sp, #32] @ 8-byte Folded Reload
1064 ; CHECK-NEXT: mov r9, r0
1065 ; CHECK-NEXT: mov r0, r7
1066 ; CHECK-NEXT: mov r1, r5
1067 ; CHECK-NEXT: bl __aeabi_dcmpge
1068 ; CHECK-NEXT: mov r4, r0
1069 ; CHECK-NEXT: mov r0, r7
1070 ; CHECK-NEXT: mov r1, r5
1071 ; CHECK-NEXT: bl __aeabi_d2lz
1072 ; CHECK-NEXT: mov r6, r0
1073 ; CHECK-NEXT: cmp r4, #0
1074 ; CHECK-NEXT: it eq
1075 ; CHECK-NEXT: moveq.w r6, #-2147483648
1076 ; CHECK-NEXT: mov r0, r7
1077 ; CHECK-NEXT: mov r1, r5
1078 ; CHECK-NEXT: mov r2, r7
1079 ; CHECK-NEXT: mov r3, r5
1080 ; CHECK-NEXT: cmp.w r9, #0
1081 ; CHECK-NEXT: it ne
1082 ; CHECK-NEXT: mvnne r6, #-2147483648
1083 ; CHECK-NEXT: bl __aeabi_dcmpun
1084 ; CHECK-NEXT: cmp r0, #0
1085 ; CHECK-NEXT: it ne
1086 ; CHECK-NEXT: movne r6, #0
1087 ; CHECK-NEXT: str.w r6, [r11, #16]
1088 ; CHECK-NEXT: mov r0, r8
1089 ; CHECK-NEXT: ldr r4, [sp, #8] @ 4-byte Reload
1090 ; CHECK-NEXT: mov r2, r10
1091 ; CHECK-NEXT: ldr.w r11, [sp, #28] @ 4-byte Reload
1092 ; CHECK-NEXT: mov r1, r4
1093 ; CHECK-NEXT: mov r3, r11
1094 ; CHECK-NEXT: bl __aeabi_dcmpgt
1095 ; CHECK-NEXT: ldr r7, [sp, #32] @ 4-byte Reload
1096 ; CHECK-NEXT: mov r9, r0
1097 ; CHECK-NEXT: ldr r5, [sp, #36] @ 4-byte Reload
1098 ; CHECK-NEXT: mov r0, r8
1099 ; CHECK-NEXT: mov r1, r4
1100 ; CHECK-NEXT: mov r2, r7
1101 ; CHECK-NEXT: mov r3, r5
1102 ; CHECK-NEXT: bl __aeabi_dcmpge
1103 ; CHECK-NEXT: mov r6, r0
1104 ; CHECK-NEXT: mov r0, r8
1105 ; CHECK-NEXT: mov r1, r4
1106 ; CHECK-NEXT: bl __aeabi_d2lz
1107 ; CHECK-NEXT: mov r10, r0
1108 ; CHECK-NEXT: cmp r6, #0
1109 ; CHECK-NEXT: it eq
1110 ; CHECK-NEXT: moveq.w r10, #-2147483648
1111 ; CHECK-NEXT: mov r0, r8
1112 ; CHECK-NEXT: mov r1, r4
1113 ; CHECK-NEXT: mov r2, r8
1114 ; CHECK-NEXT: mov r3, r4
1115 ; CHECK-NEXT: cmp.w r9, #0
1116 ; CHECK-NEXT: it ne
1117 ; CHECK-NEXT: mvnne r10, #-2147483648
1118 ; CHECK-NEXT: bl __aeabi_dcmpun
1119 ; CHECK-NEXT: cmp r0, #0
1120 ; CHECK-NEXT: it ne
1121 ; CHECK-NEXT: movne.w r10, #0
1122 ; CHECK-NEXT: ldr r4, [sp, #12] @ 4-byte Reload
1123 ; CHECK-NEXT: mov r3, r11
1124 ; CHECK-NEXT: ldr r6, [sp, #16] @ 4-byte Reload
1125 ; CHECK-NEXT: ldr r2, [sp, #24] @ 4-byte Reload
1126 ; CHECK-NEXT: mov r0, r4
1127 ; CHECK-NEXT: mov r1, r6
1128 ; CHECK-NEXT: bl __aeabi_dcmpgt
1129 ; CHECK-NEXT: mov r9, r0
1130 ; CHECK-NEXT: mov r0, r4
1131 ; CHECK-NEXT: mov r1, r6
1132 ; CHECK-NEXT: mov r2, r7
1133 ; CHECK-NEXT: mov r3, r5
1134 ; CHECK-NEXT: bl __aeabi_dcmpge
1135 ; CHECK-NEXT: mov r11, r0
1136 ; CHECK-NEXT: mov r0, r4
1137 ; CHECK-NEXT: mov r1, r6
1138 ; CHECK-NEXT: mov r5, r6
1139 ; CHECK-NEXT: bl __aeabi_d2lz
1140 ; CHECK-NEXT: mov r8, r0
1141 ; CHECK-NEXT: cmp.w r11, #0
1142 ; CHECK-NEXT: it eq
1143 ; CHECK-NEXT: moveq.w r8, #-2147483648
1144 ; CHECK-NEXT: mov r0, r4
1145 ; CHECK-NEXT: mov r1, r5
1146 ; CHECK-NEXT: mov r2, r4
1147 ; CHECK-NEXT: mov r3, r5
1148 ; CHECK-NEXT: cmp.w r9, #0
1149 ; CHECK-NEXT: vmov r7, r6, d9
1150 ; CHECK-NEXT: it ne
1151 ; CHECK-NEXT: mvnne r8, #-2147483648
1152 ; CHECK-NEXT: bl __aeabi_dcmpun
1153 ; CHECK-NEXT: cmp r0, #0
1154 ; CHECK-NEXT: it ne
1155 ; CHECK-NEXT: movne.w r8, #0
1156 ; CHECK-NEXT: ldr.w r11, [sp, #24] @ 4-byte Reload
1157 ; CHECK-NEXT: mov r0, r7
1158 ; CHECK-NEXT: ldr r3, [sp, #28] @ 4-byte Reload
1159 ; CHECK-NEXT: mov r1, r6
1160 ; CHECK-NEXT: mov r2, r11
1161 ; CHECK-NEXT: bl __aeabi_dcmpgt
1162 ; CHECK-NEXT: ldrd r2, r3, [sp, #32] @ 8-byte Folded Reload
1163 ; CHECK-NEXT: mov r9, r0
1164 ; CHECK-NEXT: mov r0, r7
1165 ; CHECK-NEXT: mov r1, r6
1166 ; CHECK-NEXT: bl __aeabi_dcmpge
1167 ; CHECK-NEXT: mov r5, r0
1168 ; CHECK-NEXT: mov r0, r7
1169 ; CHECK-NEXT: mov r1, r6
1170 ; CHECK-NEXT: bl __aeabi_d2lz
1171 ; CHECK-NEXT: mov r4, r0
1172 ; CHECK-NEXT: cmp r5, #0
1173 ; CHECK-NEXT: it eq
1174 ; CHECK-NEXT: moveq.w r4, #-2147483648
1175 ; CHECK-NEXT: mov r0, r7
1176 ; CHECK-NEXT: mov r1, r6
1177 ; CHECK-NEXT: mov r2, r7
1178 ; CHECK-NEXT: mov r3, r6
1179 ; CHECK-NEXT: cmp.w r9, #0
1180 ; CHECK-NEXT: it ne
1181 ; CHECK-NEXT: mvnne r4, #-2147483648
1182 ; CHECK-NEXT: bl __aeabi_dcmpun
1183 ; CHECK-NEXT: vmov r7, r6, d8
1184 ; CHECK-NEXT: cmp r0, #0
1185 ; CHECK-NEXT: it ne
1186 ; CHECK-NEXT: movne r4, #0
1187 ; CHECK-NEXT: ldr r3, [sp, #28] @ 4-byte Reload
1188 ; CHECK-NEXT: mov r2, r11
1189 ; CHECK-NEXT: mov r0, r7
1190 ; CHECK-NEXT: mov r1, r6
1191 ; CHECK-NEXT: bl __aeabi_dcmpgt
1192 ; CHECK-NEXT: ldrd r2, r3, [sp, #32] @ 8-byte Folded Reload
1193 ; CHECK-NEXT: mov r9, r0
1194 ; CHECK-NEXT: mov r0, r7
1195 ; CHECK-NEXT: mov r1, r6
1196 ; CHECK-NEXT: bl __aeabi_dcmpge
1197 ; CHECK-NEXT: mov r11, r0
1198 ; CHECK-NEXT: mov r0, r7
1199 ; CHECK-NEXT: mov r1, r6
1200 ; CHECK-NEXT: bl __aeabi_d2lz
1201 ; CHECK-NEXT: mov r5, r0
1202 ; CHECK-NEXT: cmp.w r11, #0
1203 ; CHECK-NEXT: it eq
1204 ; CHECK-NEXT: moveq.w r5, #-2147483648
1205 ; CHECK-NEXT: mov r0, r7
1206 ; CHECK-NEXT: mov r1, r6
1207 ; CHECK-NEXT: mov r2, r7
1208 ; CHECK-NEXT: mov r3, r6
1209 ; CHECK-NEXT: cmp.w r9, #0
1210 ; CHECK-NEXT: it ne
1211 ; CHECK-NEXT: mvnne r5, #-2147483648
1212 ; CHECK-NEXT: bl __aeabi_dcmpun
1213 ; CHECK-NEXT: cmp r0, #0
1214 ; CHECK-NEXT: it ne
1215 ; CHECK-NEXT: movne r5, #0
1216 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r4
1217 ; CHECK-NEXT: ldr r0, [sp, #20] @ 4-byte Reload
1218 ; CHECK-NEXT: vmov q0[3], q0[1], r8, r10
1219 ; CHECK-NEXT: vstrw.32 q0, [r0]
1220 ; CHECK-NEXT: add sp, #40
1221 ; CHECK-NEXT: vpop {d8, d9, d10, d11, d12}
1222 ; CHECK-NEXT: add sp, #4
1223 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
1224 ; CHECK-NEXT: .p2align 3
1225 ; CHECK-NEXT: @ %bb.1:
1226 ; CHECK-NEXT: .LCPI13_0:
1227 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
1228 ; CHECK-NEXT: .long 1105199103
1229 ; CHECK-NEXT: .LCPI13_1:
1230 ; CHECK-NEXT: .long 0 @ double -2147483648
1231 ; CHECK-NEXT: .long 3252682752
1232 %x = call <6 x i32> @llvm.fptosi.sat.v6f64.v6i32(<6 x double> %f)
1233 ret <6 x i32> %x
1234 }
1236 ;
1237 ; FP16 to signed 32-bit -- Vector size variation
1238 ;
1240 declare <1 x i32> @llvm.fptosi.sat.v1f16.v1i32 (<1 x half>)
1241 declare <2 x i32> @llvm.fptosi.sat.v2f16.v2i32 (<2 x half>)
1242 declare <3 x i32> @llvm.fptosi.sat.v3f16.v3i32 (<3 x half>)
1243 declare <4 x i32> @llvm.fptosi.sat.v4f16.v4i32 (<4 x half>)
1244 declare <5 x i32> @llvm.fptosi.sat.v5f16.v5i32 (<5 x half>)
1245 declare <6 x i32> @llvm.fptosi.sat.v6f16.v6i32 (<6 x half>)
1246 declare <7 x i32> @llvm.fptosi.sat.v7f16.v7i32 (<7 x half>)
1247 declare <8 x i32> @llvm.fptosi.sat.v8f16.v8i32 (<8 x half>)
1249 define arm_aapcs_vfpcc <1 x i32> @test_signed_v1f16_v1i32(<1 x half> %f) {
1250 ; CHECK-LABEL: test_signed_v1f16_v1i32:
1251 ; CHECK: @ %bb.0:
1252 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1253 ; CHECK-NEXT: vmov r0, s0
1254 ; CHECK-NEXT: bx lr
1255 %x = call <1 x i32> @llvm.fptosi.sat.v1f16.v1i32(<1 x half> %f)
1256 ret <1 x i32> %x
1257 }
1259 define arm_aapcs_vfpcc <2 x i32> @test_signed_v2f16_v2i32(<2 x half> %f) {
1260 ; CHECK-LABEL: test_signed_v2f16_v2i32:
1261 ; CHECK: @ %bb.0:
1262 ; CHECK-NEXT: .save {r4, r5, r7, lr}
1263 ; CHECK-NEXT: push {r4, r5, r7, lr}
1264 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
1265 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
1266 ; CHECK-NEXT: vmov q4, q0
1267 ; CHECK-NEXT: vcvtt.f32.f16 s18, s16
1268 ; CHECK-NEXT: vmov r0, s18
1269 ; CHECK-NEXT: bl __aeabi_f2lz
1270 ; CHECK-NEXT: vcvtb.f32.f16 s16, s16
1271 ; CHECK-NEXT: mov r5, r0
1272 ; CHECK-NEXT: vmov r0, s16
1273 ; CHECK-NEXT: vldr s20, .LCPI15_0
1274 ; CHECK-NEXT: vldr s22, .LCPI15_1
1275 ; CHECK-NEXT: mov r4, r1
1276 ; CHECK-NEXT: vcmp.f32 s18, s20
1277 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1278 ; CHECK-NEXT: it lt
1279 ; CHECK-NEXT: movlt.w r5, #-2147483648
1280 ; CHECK-NEXT: vcmp.f32 s18, s22
1281 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1282 ; CHECK-NEXT: it gt
1283 ; CHECK-NEXT: mvngt r5, #-2147483648
1284 ; CHECK-NEXT: vcmp.f32 s18, s18
1285 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1286 ; CHECK-NEXT: it vs
1287 ; CHECK-NEXT: movvs r5, #0
1288 ; CHECK-NEXT: bl __aeabi_f2lz
1289 ; CHECK-NEXT: vcmp.f32 s16, s20
1290 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1291 ; CHECK-NEXT: vcmp.f32 s16, s22
1292 ; CHECK-NEXT: it lt
1293 ; CHECK-NEXT: movlt.w r0, #-2147483648
1294 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1295 ; CHECK-NEXT: vcmp.f32 s16, s16
1296 ; CHECK-NEXT: it gt
1297 ; CHECK-NEXT: mvngt r0, #-2147483648
1298 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1299 ; CHECK-NEXT: vcmp.f32 s18, s20
1300 ; CHECK-NEXT: it vs
1301 ; CHECK-NEXT: movvs r0, #0
1302 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1303 ; CHECK-NEXT: vcmp.f32 s18, s22
1304 ; CHECK-NEXT: it lt
1305 ; CHECK-NEXT: movlt.w r4, #-1
1306 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1307 ; CHECK-NEXT: vcmp.f32 s18, s18
1308 ; CHECK-NEXT: it gt
1309 ; CHECK-NEXT: movgt r4, #0
1310 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1311 ; CHECK-NEXT: vcmp.f32 s16, s20
1312 ; CHECK-NEXT: it vs
1313 ; CHECK-NEXT: movvs r4, #0
1314 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1315 ; CHECK-NEXT: it lt
1316 ; CHECK-NEXT: movlt.w r1, #-1
1317 ; CHECK-NEXT: vcmp.f32 s16, s22
1318 ; CHECK-NEXT: vmov q0[2], q0[0], r0, r5
1319 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1320 ; CHECK-NEXT: it gt
1321 ; CHECK-NEXT: movgt r1, #0
1322 ; CHECK-NEXT: vcmp.f32 s16, s16
1323 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1324 ; CHECK-NEXT: it vs
1325 ; CHECK-NEXT: movvs r1, #0
1326 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r4
1327 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
1328 ; CHECK-NEXT: pop {r4, r5, r7, pc}
1329 ; CHECK-NEXT: .p2align 2
1330 ; CHECK-NEXT: @ %bb.1:
1331 ; CHECK-NEXT: .LCPI15_0:
1332 ; CHECK-NEXT: .long 0xcf000000 @ float -2.14748365E+9
1333 ; CHECK-NEXT: .LCPI15_1:
1334 ; CHECK-NEXT: .long 0x4effffff @ float 2.14748352E+9
1335 %x = call <2 x i32> @llvm.fptosi.sat.v2f16.v2i32(<2 x half> %f)
1336 ret <2 x i32> %x
1337 }
1339 define arm_aapcs_vfpcc <3 x i32> @test_signed_v3f16_v3i32(<3 x half> %f) {
1340 ; CHECK-LABEL: test_signed_v3f16_v3i32:
1341 ; CHECK: @ %bb.0:
1342 ; CHECK-NEXT: vcvt.s32.f16 s6, s0
1343 ; CHECK-NEXT: vcvt.s32.f16 s0, s1
1344 ; CHECK-NEXT: vcvt.s32.f16 s4, s2
1345 ; CHECK-NEXT: vmov r0, s0
1346 ; CHECK-NEXT: vmov.32 q0[1], r0
1347 ; CHECK-NEXT: vmov r0, s4
1348 ; CHECK-NEXT: vmov r1, s6
1349 ; CHECK-NEXT: vmov q0[2], q0[0], r1, r0
1350 ; CHECK-NEXT: bx lr
1351 %x = call <3 x i32> @llvm.fptosi.sat.v3f16.v3i32(<3 x half> %f)
1352 ret <3 x i32> %x
1353 }
1355 define arm_aapcs_vfpcc <4 x i32> @test_signed_v4f16_v4i32(<4 x half> %f) {
1356 ; CHECK-LABEL: test_signed_v4f16_v4i32:
1357 ; CHECK: @ %bb.0:
1358 ; CHECK-NEXT: vmovx.f16 s2, s1
1359 ; CHECK-NEXT: vcvt.s32.f16 s4, s2
1360 ; CHECK-NEXT: vmovx.f16 s2, s0
1361 ; CHECK-NEXT: vcvt.s32.f16 s6, s2
1362 ; CHECK-NEXT: vcvt.s32.f16 s2, s1
1363 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1364 ; CHECK-NEXT: vmov r0, s2
1365 ; CHECK-NEXT: vmov r1, s0
1366 ; CHECK-NEXT: vmov q0[2], q0[0], r1, r0
1367 ; CHECK-NEXT: vmov r0, s4
1368 ; CHECK-NEXT: vmov r1, s6
1369 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r0
1370 ; CHECK-NEXT: bx lr
1371 %x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f)
1372 ret <4 x i32> %x
1373 }
1375 define arm_aapcs_vfpcc <5 x i32> @test_signed_v5f16_v5i32(<5 x half> %f) {
1376 ; CHECK-LABEL: test_signed_v5f16_v5i32:
1377 ; CHECK: @ %bb.0:
1378 ; CHECK-NEXT: vmovx.f16 s6, s0
1379 ; CHECK-NEXT: vmovx.f16 s4, s1
1380 ; CHECK-NEXT: vcvt.s32.f16 s8, s1
1381 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1382 ; CHECK-NEXT: vcvt.s32.f16 s4, s4
1383 ; CHECK-NEXT: vcvt.s32.f16 s6, s6
1384 ; CHECK-NEXT: vmov r1, s8
1385 ; CHECK-NEXT: vcvt.s32.f16 s2, s2
1386 ; CHECK-NEXT: vmov r2, s0
1387 ; CHECK-NEXT: vmov q2[2], q2[0], r2, r1
1388 ; CHECK-NEXT: vmov r1, s4
1389 ; CHECK-NEXT: vmov r2, s6
1390 ; CHECK-NEXT: vmov q2[3], q2[1], r2, r1
1391 ; CHECK-NEXT: vmov r1, s2
1392 ; CHECK-NEXT: str r1, [r0, #16]
1393 ; CHECK-NEXT: vstrw.32 q2, [r0]
1394 ; CHECK-NEXT: bx lr
1395 %x = call <5 x i32> @llvm.fptosi.sat.v5f16.v5i32(<5 x half> %f)
1396 ret <5 x i32> %x
1397 }
1399 define arm_aapcs_vfpcc <6 x i32> @test_signed_v6f16_v6i32(<6 x half> %f) {
1400 ; CHECK-LABEL: test_signed_v6f16_v6i32:
1401 ; CHECK: @ %bb.0:
1402 ; CHECK-NEXT: vmovx.f16 s8, s0
1403 ; CHECK-NEXT: vmovx.f16 s6, s1
1404 ; CHECK-NEXT: vcvt.s32.f16 s10, s1
1405 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1406 ; CHECK-NEXT: vcvt.s32.f16 s4, s2
1407 ; CHECK-NEXT: vmovx.f16 s2, s2
1408 ; CHECK-NEXT: vcvt.s32.f16 s6, s6
1409 ; CHECK-NEXT: vcvt.s32.f16 s8, s8
1410 ; CHECK-NEXT: vmov r1, s10
1411 ; CHECK-NEXT: vcvt.s32.f16 s2, s2
1412 ; CHECK-NEXT: vmov r2, s0
1413 ; CHECK-NEXT: vmov q3[2], q3[0], r2, r1
1414 ; CHECK-NEXT: vmov r1, s6
1415 ; CHECK-NEXT: vmov r2, s8
1416 ; CHECK-NEXT: vmov q3[3], q3[1], r2, r1
1417 ; CHECK-NEXT: vmov r1, s2
1418 ; CHECK-NEXT: vmov r2, s4
1419 ; CHECK-NEXT: strd r2, r1, [r0, #16]
1420 ; CHECK-NEXT: vstrw.32 q3, [r0]
1421 ; CHECK-NEXT: bx lr
1422 %x = call <6 x i32> @llvm.fptosi.sat.v6f16.v6i32(<6 x half> %f)
1423 ret <6 x i32> %x
1424 }
1426 define arm_aapcs_vfpcc <7 x i32> @test_signed_v7f16_v7i32(<7 x half> %f) {
1427 ; CHECK-LABEL: test_signed_v7f16_v7i32:
1428 ; CHECK: @ %bb.0:
1429 ; CHECK-NEXT: vmovx.f16 s10, s0
1430 ; CHECK-NEXT: vmovx.f16 s8, s1
1431 ; CHECK-NEXT: vcvt.s32.f16 s12, s1
1432 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1433 ; CHECK-NEXT: vcvt.s32.f16 s4, s2
1434 ; CHECK-NEXT: vmovx.f16 s2, s2
1435 ; CHECK-NEXT: vcvt.s32.f16 s8, s8
1436 ; CHECK-NEXT: vcvt.s32.f16 s10, s10
1437 ; CHECK-NEXT: vmov r1, s12
1438 ; CHECK-NEXT: vcvt.s32.f16 s2, s2
1439 ; CHECK-NEXT: vmov r2, s0
1440 ; CHECK-NEXT: vcvt.s32.f16 s6, s3
1441 ; CHECK-NEXT: vmov q3[2], q3[0], r2, r1
1442 ; CHECK-NEXT: vmov r1, s8
1443 ; CHECK-NEXT: vmov r2, s10
1444 ; CHECK-NEXT: vmov q3[3], q3[1], r2, r1
1445 ; CHECK-NEXT: vmov r1, s2
1446 ; CHECK-NEXT: vmov r2, s4
1447 ; CHECK-NEXT: vmov r3, s6
1448 ; CHECK-NEXT: strd r2, r1, [r0, #16]
1449 ; CHECK-NEXT: str r3, [r0, #24]
1450 ; CHECK-NEXT: vstrw.32 q3, [r0]
1451 ; CHECK-NEXT: bx lr
1452 %x = call <7 x i32> @llvm.fptosi.sat.v7f16.v7i32(<7 x half> %f)
1453 ret <7 x i32> %x
1454 }
1456 define arm_aapcs_vfpcc <8 x i32> @test_signed_v8f16_v8i32(<8 x half> %f) {
1457 ; CHECK-LABEL: test_signed_v8f16_v8i32:
1458 ; CHECK: @ %bb.0:
1459 ; CHECK-NEXT: vmovx.f16 s4, s3
1460 ; CHECK-NEXT: vmovx.f16 s6, s0
1461 ; CHECK-NEXT: vcvt.s32.f16 s8, s4
1462 ; CHECK-NEXT: vmovx.f16 s4, s2
1463 ; CHECK-NEXT: vcvt.s32.f16 s10, s4
1464 ; CHECK-NEXT: vmovx.f16 s4, s1
1465 ; CHECK-NEXT: vcvt.s32.f16 s14, s2
1466 ; CHECK-NEXT: vcvt.s32.f16 s2, s1
1467 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
1468 ; CHECK-NEXT: vcvt.s32.f16 s4, s4
1469 ; CHECK-NEXT: vcvt.s32.f16 s6, s6
1470 ; CHECK-NEXT: vmov r0, s2
1471 ; CHECK-NEXT: vmov r1, s0
1472 ; CHECK-NEXT: vcvt.s32.f16 s12, s3
1473 ; CHECK-NEXT: vmov q0[2], q0[0], r1, r0
1474 ; CHECK-NEXT: vmov r0, s4
1475 ; CHECK-NEXT: vmov r1, s6
1476 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r0
1477 ; CHECK-NEXT: vmov r0, s12
1478 ; CHECK-NEXT: vmov r1, s14
1479 ; CHECK-NEXT: vmov q1[2], q1[0], r1, r0
1480 ; CHECK-NEXT: vmov r0, s8
1481 ; CHECK-NEXT: vmov r1, s10
1482 ; CHECK-NEXT: vmov q1[3], q1[1], r1, r0
1483 ; CHECK-NEXT: bx lr
1484 %x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f)
1485 ret <8 x i32> %x
1486 }
1488 ;
1489 ; 2-Vector float to signed integer -- result size variation
1490 ;
1492 declare <4 x i1> @llvm.fptosi.sat.v4f32.v4i1 (<4 x float>)
1493 declare <4 x i8> @llvm.fptosi.sat.v4f32.v4i8 (<4 x float>)
1494 declare <4 x i13> @llvm.fptosi.sat.v4f32.v4i13 (<4 x float>)
1495 declare <4 x i16> @llvm.fptosi.sat.v4f32.v4i16 (<4 x float>)
1496 declare <4 x i19> @llvm.fptosi.sat.v4f32.v4i19 (<4 x float>)
1497 declare <4 x i50> @llvm.fptosi.sat.v4f32.v4i50 (<4 x float>)
1498 declare <4 x i64> @llvm.fptosi.sat.v4f32.v4i64 (<4 x float>)
1499 declare <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float>)
1500 declare <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float>)
1502 define arm_aapcs_vfpcc <4 x i1> @test_signed_v4f32_v4i1(<4 x float> %f) {
1503 ; CHECK-LABEL: test_signed_v4f32_v4i1:
1504 ; CHECK: @ %bb.0:
1505 ; CHECK-NEXT: vmov.f32 s4, #-1.000000e+00
1506 ; CHECK-NEXT: vldr s6, .LCPI22_0
1507 ; CHECK-NEXT: vmaxnm.f32 s12, s0, s4
1508 ; CHECK-NEXT: vmaxnm.f32 s8, s3, s4
1509 ; CHECK-NEXT: vminnm.f32 s12, s12, s6
1510 ; CHECK-NEXT: vmaxnm.f32 s10, s2, s4
1511 ; CHECK-NEXT: vcvt.s32.f32 s12, s12
1512 ; CHECK-NEXT: vmaxnm.f32 s4, s1, s4
1513 ; CHECK-NEXT: vminnm.f32 s4, s4, s6
1514 ; CHECK-NEXT: vminnm.f32 s10, s10, s6
1515 ; CHECK-NEXT: vcvt.s32.f32 s4, s4
1516 ; CHECK-NEXT: movs r1, #0
1517 ; CHECK-NEXT: vcmp.f32 s0, s0
1518 ; CHECK-NEXT: vminnm.f32 s8, s8, s6
1519 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1520 ; CHECK-NEXT: vcvt.s32.f32 s10, s10
1521 ; CHECK-NEXT: vcmp.f32 s1, s1
1522 ; CHECK-NEXT: vcvt.s32.f32 s8, s8
1523 ; CHECK-NEXT: vmov r2, s12
1524 ; CHECK-NEXT: it vs
1525 ; CHECK-NEXT: movvs r2, #0
1526 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1527 ; CHECK-NEXT: and r2, r2, #1
1528 ; CHECK-NEXT: vcmp.f32 s2, s2
1529 ; CHECK-NEXT: rsb.w r2, r2, #0
1530 ; CHECK-NEXT: bfi r1, r2, #0, #1
1531 ; CHECK-NEXT: vmov r2, s4
1532 ; CHECK-NEXT: it vs
1533 ; CHECK-NEXT: movvs r2, #0
1534 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1535 ; CHECK-NEXT: and r2, r2, #1
1536 ; CHECK-NEXT: vcmp.f32 s3, s3
1537 ; CHECK-NEXT: rsb.w r2, r2, #0
1538 ; CHECK-NEXT: bfi r1, r2, #1, #1
1539 ; CHECK-NEXT: vmov r2, s10
1540 ; CHECK-NEXT: it vs
1541 ; CHECK-NEXT: movvs r2, #0
1542 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1543 ; CHECK-NEXT: and r2, r2, #1
1544 ; CHECK-NEXT: rsb.w r2, r2, #0
1545 ; CHECK-NEXT: bfi r1, r2, #2, #1
1546 ; CHECK-NEXT: vmov r2, s8
1547 ; CHECK-NEXT: it vs
1548 ; CHECK-NEXT: movvs r2, #0
1549 ; CHECK-NEXT: and r2, r2, #1
1550 ; CHECK-NEXT: rsbs r2, r2, #0
1551 ; CHECK-NEXT: bfi r1, r2, #3, #1
1552 ; CHECK-NEXT: strb r1, [r0]
1553 ; CHECK-NEXT: bx lr
1554 ; CHECK-NEXT: .p2align 2
1555 ; CHECK-NEXT: @ %bb.1:
1556 ; CHECK-NEXT: .LCPI22_0:
1557 ; CHECK-NEXT: .long 0x00000000 @ float 0
1558 %x = call <4 x i1> @llvm.fptosi.sat.v4f32.v4i1(<4 x float> %f)
1559 ret <4 x i1> %x
1560 }
1562 define arm_aapcs_vfpcc <4 x i8> @test_signed_v4f32_v4i8(<4 x float> %f) {
1563 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i8:
1564 ; CHECK-MVE: @ %bb.0:
1565 ; CHECK-MVE-NEXT: vldr s4, .LCPI23_0
1566 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
1567 ; CHECK-MVE-NEXT: vldr s6, .LCPI23_1
1568 ; CHECK-MVE-NEXT: vmaxnm.f32 s12, s2, s4
1569 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s0, s4
1570 ; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s6
1571 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s1, s4
1572 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
1573 ; CHECK-MVE-NEXT: vmaxnm.f32 s4, s3, s4
1574 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s12
1575 ; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s6
1576 ; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s6
1577 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
1578 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s8
1579 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1580 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
1581 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
1582 ; CHECK-MVE-NEXT: vmov r0, s12
1583 ; CHECK-MVE-NEXT: it vs
1584 ; CHECK-MVE-NEXT: movvs r0, #0
1585 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1586 ; CHECK-MVE-NEXT: vmov r1, s10
1587 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
1588 ; CHECK-MVE-NEXT: it vs
1589 ; CHECK-MVE-NEXT: movvs r1, #0
1590 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1591 ; CHECK-MVE-NEXT: vmov r2, s4
1592 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
1593 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
1594 ; CHECK-MVE-NEXT: vmov r3, s8
1595 ; CHECK-MVE-NEXT: it vs
1596 ; CHECK-MVE-NEXT: movvs r2, #0
1597 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1598 ; CHECK-MVE-NEXT: it vs
1599 ; CHECK-MVE-NEXT: movvs r3, #0
1600 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r3, r2
1601 ; CHECK-MVE-NEXT: bx lr
1602 ; CHECK-MVE-NEXT: .p2align 2
1603 ; CHECK-MVE-NEXT: @ %bb.1:
1604 ; CHECK-MVE-NEXT: .LCPI23_0:
1605 ; CHECK-MVE-NEXT: .long 0xc3000000 @ float -128
1606 ; CHECK-MVE-NEXT: .LCPI23_1:
1607 ; CHECK-MVE-NEXT: .long 0x42fe0000 @ float 127
1608 ;
1609 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i8:
1610 ; CHECK-MVEFP: @ %bb.0:
1611 ; CHECK-MVEFP-NEXT: vmov.i32 q1, #0x7f
1612 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
1613 ; CHECK-MVEFP-NEXT: vmvn.i32 q2, #0x7f
1614 ; CHECK-MVEFP-NEXT: vmin.s32 q0, q0, q1
1615 ; CHECK-MVEFP-NEXT: vmax.s32 q0, q0, q2
1616 ; CHECK-MVEFP-NEXT: bx lr
1617 %x = call <4 x i8> @llvm.fptosi.sat.v4f32.v4i8(<4 x float> %f)
1618 ret <4 x i8> %x
1619 }
1621 define arm_aapcs_vfpcc <4 x i13> @test_signed_v4f32_v4i13(<4 x float> %f) {
1622 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i13:
1623 ; CHECK-MVE: @ %bb.0:
1624 ; CHECK-MVE-NEXT: vldr s4, .LCPI24_0
1625 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
1626 ; CHECK-MVE-NEXT: vldr s6, .LCPI24_1
1627 ; CHECK-MVE-NEXT: vmaxnm.f32 s12, s2, s4
1628 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s0, s4
1629 ; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s6
1630 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s1, s4
1631 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
1632 ; CHECK-MVE-NEXT: vmaxnm.f32 s4, s3, s4
1633 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s12
1634 ; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s6
1635 ; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s6
1636 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
1637 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s8
1638 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1639 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
1640 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
1641 ; CHECK-MVE-NEXT: vmov r0, s12
1642 ; CHECK-MVE-NEXT: it vs
1643 ; CHECK-MVE-NEXT: movvs r0, #0
1644 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1645 ; CHECK-MVE-NEXT: vmov r1, s10
1646 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
1647 ; CHECK-MVE-NEXT: it vs
1648 ; CHECK-MVE-NEXT: movvs r1, #0
1649 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1650 ; CHECK-MVE-NEXT: vmov r2, s4
1651 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
1652 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
1653 ; CHECK-MVE-NEXT: vmov r3, s8
1654 ; CHECK-MVE-NEXT: it vs
1655 ; CHECK-MVE-NEXT: movvs r2, #0
1656 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1657 ; CHECK-MVE-NEXT: it vs
1658 ; CHECK-MVE-NEXT: movvs r3, #0
1659 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r3, r2
1660 ; CHECK-MVE-NEXT: bx lr
1661 ; CHECK-MVE-NEXT: .p2align 2
1662 ; CHECK-MVE-NEXT: @ %bb.1:
1663 ; CHECK-MVE-NEXT: .LCPI24_0:
1664 ; CHECK-MVE-NEXT: .long 0xc5800000 @ float -4096
1665 ; CHECK-MVE-NEXT: .LCPI24_1:
1666 ; CHECK-MVE-NEXT: .long 0x457ff000 @ float 4095
1667 ;
1668 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i13:
1669 ; CHECK-MVEFP: @ %bb.0:
1670 ; CHECK-MVEFP-NEXT: vmov.i32 q1, #0xfff
1671 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
1672 ; CHECK-MVEFP-NEXT: vmvn.i32 q2, #0xfff
1673 ; CHECK-MVEFP-NEXT: vmin.s32 q0, q0, q1
1674 ; CHECK-MVEFP-NEXT: vmax.s32 q0, q0, q2
1675 ; CHECK-MVEFP-NEXT: bx lr
1676 %x = call <4 x i13> @llvm.fptosi.sat.v4f32.v4i13(<4 x float> %f)
1677 ret <4 x i13> %x
1678 }
1680 define arm_aapcs_vfpcc <4 x i16> @test_signed_v4f32_v4i16(<4 x float> %f) {
1681 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i16:
1682 ; CHECK-MVE: @ %bb.0:
1683 ; CHECK-MVE-NEXT: vldr s4, .LCPI25_0
1684 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
1685 ; CHECK-MVE-NEXT: vldr s6, .LCPI25_1
1686 ; CHECK-MVE-NEXT: vmaxnm.f32 s12, s2, s4
1687 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s0, s4
1688 ; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s6
1689 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s1, s4
1690 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
1691 ; CHECK-MVE-NEXT: vmaxnm.f32 s4, s3, s4
1692 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s12
1693 ; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s6
1694 ; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s6
1695 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
1696 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s8
1697 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1698 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
1699 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
1700 ; CHECK-MVE-NEXT: vmov r0, s12
1701 ; CHECK-MVE-NEXT: it vs
1702 ; CHECK-MVE-NEXT: movvs r0, #0
1703 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1704 ; CHECK-MVE-NEXT: vmov r1, s10
1705 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
1706 ; CHECK-MVE-NEXT: it vs
1707 ; CHECK-MVE-NEXT: movvs r1, #0
1708 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1709 ; CHECK-MVE-NEXT: vmov r2, s4
1710 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
1711 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
1712 ; CHECK-MVE-NEXT: vmov r3, s8
1713 ; CHECK-MVE-NEXT: it vs
1714 ; CHECK-MVE-NEXT: movvs r2, #0
1715 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1716 ; CHECK-MVE-NEXT: it vs
1717 ; CHECK-MVE-NEXT: movvs r3, #0
1718 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r3, r2
1719 ; CHECK-MVE-NEXT: bx lr
1720 ; CHECK-MVE-NEXT: .p2align 2
1721 ; CHECK-MVE-NEXT: @ %bb.1:
1722 ; CHECK-MVE-NEXT: .LCPI25_0:
1723 ; CHECK-MVE-NEXT: .long 0xc7000000 @ float -32768
1724 ; CHECK-MVE-NEXT: .LCPI25_1:
1725 ; CHECK-MVE-NEXT: .long 0x46fffe00 @ float 32767
1726 ;
1727 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i16:
1728 ; CHECK-MVEFP: @ %bb.0:
1729 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
1730 ; CHECK-MVEFP-NEXT: vqmovnb.s32 q0, q0
1731 ; CHECK-MVEFP-NEXT: vmovlb.s16 q0, q0
1732 ; CHECK-MVEFP-NEXT: bx lr
1733 %x = call <4 x i16> @llvm.fptosi.sat.v4f32.v4i16(<4 x float> %f)
1734 ret <4 x i16> %x
1735 }
1737 define arm_aapcs_vfpcc <4 x i19> @test_signed_v4f32_v4i19(<4 x float> %f) {
1738 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i19:
1739 ; CHECK-MVE: @ %bb.0:
1740 ; CHECK-MVE-NEXT: vldr s4, .LCPI26_0
1741 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
1742 ; CHECK-MVE-NEXT: vldr s6, .LCPI26_1
1743 ; CHECK-MVE-NEXT: vmaxnm.f32 s12, s2, s4
1744 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s0, s4
1745 ; CHECK-MVE-NEXT: vminnm.f32 s12, s12, s6
1746 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s1, s4
1747 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
1748 ; CHECK-MVE-NEXT: vmaxnm.f32 s4, s3, s4
1749 ; CHECK-MVE-NEXT: vcvt.s32.f32 s12, s12
1750 ; CHECK-MVE-NEXT: vminnm.f32 s8, s8, s6
1751 ; CHECK-MVE-NEXT: vminnm.f32 s4, s4, s6
1752 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
1753 ; CHECK-MVE-NEXT: vcvt.s32.f32 s8, s8
1754 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1755 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s4
1756 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
1757 ; CHECK-MVE-NEXT: vmov r0, s12
1758 ; CHECK-MVE-NEXT: it vs
1759 ; CHECK-MVE-NEXT: movvs r0, #0
1760 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1761 ; CHECK-MVE-NEXT: vmov r1, s10
1762 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
1763 ; CHECK-MVE-NEXT: it vs
1764 ; CHECK-MVE-NEXT: movvs r1, #0
1765 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1766 ; CHECK-MVE-NEXT: vmov r2, s4
1767 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
1768 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
1769 ; CHECK-MVE-NEXT: vmov r3, s8
1770 ; CHECK-MVE-NEXT: it vs
1771 ; CHECK-MVE-NEXT: movvs r2, #0
1772 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
1773 ; CHECK-MVE-NEXT: it vs
1774 ; CHECK-MVE-NEXT: movvs r3, #0
1775 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r3, r2
1776 ; CHECK-MVE-NEXT: bx lr
1777 ; CHECK-MVE-NEXT: .p2align 2
1778 ; CHECK-MVE-NEXT: @ %bb.1:
1779 ; CHECK-MVE-NEXT: .LCPI26_0:
1780 ; CHECK-MVE-NEXT: .long 0xc8800000 @ float -262144
1781 ; CHECK-MVE-NEXT: .LCPI26_1:
1782 ; CHECK-MVE-NEXT: .long 0x487fffc0 @ float 262143
1783 ;
1784 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i19:
1785 ; CHECK-MVEFP: @ %bb.0:
1786 ; CHECK-MVEFP-NEXT: movs r0, #0
1787 ; CHECK-MVEFP-NEXT: vmov.i32 q1, #0x3ffff
1788 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
1789 ; CHECK-MVEFP-NEXT: movt r0, #65532
1790 ; CHECK-MVEFP-NEXT: vmin.s32 q0, q0, q1
1791 ; CHECK-MVEFP-NEXT: vdup.32 q1, r0
1792 ; CHECK-MVEFP-NEXT: vmax.s32 q0, q0, q1
1793 ; CHECK-MVEFP-NEXT: bx lr
1794 %x = call <4 x i19> @llvm.fptosi.sat.v4f32.v4i19(<4 x float> %f)
1795 ret <4 x i19> %x
1796 }
1798 define arm_aapcs_vfpcc <4 x i32> @test_signed_v4f32_v4i32_duplicate(<4 x float> %f) {
1799 ; CHECK-MVE-LABEL: test_signed_v4f32_v4i32_duplicate:
1800 ; CHECK-MVE: @ %bb.0:
1801 ; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s2
1802 ; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s0
1803 ; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s3
1804 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s1
1805 ; CHECK-MVE-NEXT: vmov r0, s2
1806 ; CHECK-MVE-NEXT: vmov r1, s0
1807 ; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r0
1808 ; CHECK-MVE-NEXT: vmov r0, s4
1809 ; CHECK-MVE-NEXT: vmov r1, s6
1810 ; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r0
1811 ; CHECK-MVE-NEXT: bx lr
1812 ;
1813 ; CHECK-MVEFP-LABEL: test_signed_v4f32_v4i32_duplicate:
1814 ; CHECK-MVEFP: @ %bb.0:
1815 ; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q0
1816 ; CHECK-MVEFP-NEXT: bx lr
1817 %x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f)
1818 ret <4 x i32> %x
1819 }
1821 define arm_aapcs_vfpcc <4 x i50> @test_signed_v4f32_v4i50(<4 x float> %f) {
1822 ; CHECK-LABEL: test_signed_v4f32_v4i50:
1823 ; CHECK: @ %bb.0:
1824 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, lr}
1825 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, lr}
1826 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
1827 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
1828 ; CHECK-NEXT: vmov q4, q0
1829 ; CHECK-NEXT: mov r8, r0
1830 ; CHECK-NEXT: vmov r0, s18
1831 ; CHECK-NEXT: bl __aeabi_f2lz
1832 ; CHECK-NEXT: mov r9, r0
1833 ; CHECK-NEXT: vmov r0, s19
1834 ; CHECK-NEXT: vldr s20, .LCPI28_0
1835 ; CHECK-NEXT: mov r5, r1
1836 ; CHECK-NEXT: vmov r6, s16
1837 ; CHECK-NEXT: vcmp.f32 s18, s20
1838 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1839 ; CHECK-NEXT: itt lt
1840 ; CHECK-NEXT: movlt r5, #0
1841 ; CHECK-NEXT: movtlt r5, #65534
1842 ; CHECK-NEXT: bl __aeabi_f2lz
1843 ; CHECK-NEXT: vldr s22, .LCPI28_1
1844 ; CHECK-NEXT: vcmp.f32 s19, s20
1845 ; CHECK-NEXT: mov r4, r0
1846 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1847 ; CHECK-NEXT: mov r7, r1
1848 ; CHECK-NEXT: mov r0, r6
1849 ; CHECK-NEXT: vcmp.f32 s18, s22
1850 ; CHECK-NEXT: itt lt
1851 ; CHECK-NEXT: movlt r7, #0
1852 ; CHECK-NEXT: movtlt r7, #65534
1853 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1854 ; CHECK-NEXT: itt gt
1855 ; CHECK-NEXT: movwgt r5, #65535
1856 ; CHECK-NEXT: movtgt r5, #1
1857 ; CHECK-NEXT: bl __aeabi_f2lz
1858 ; CHECK-NEXT: vcmp.f32 s16, s20
1859 ; CHECK-NEXT: mov r10, r1
1860 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1861 ; CHECK-NEXT: vcmp.f32 s19, s22
1862 ; CHECK-NEXT: it lt
1863 ; CHECK-NEXT: movlt r0, #0
1864 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1865 ; CHECK-NEXT: vcmp.f32 s16, s22
1866 ; CHECK-NEXT: itt gt
1867 ; CHECK-NEXT: movwgt r7, #65535
1868 ; CHECK-NEXT: movtgt r7, #1
1869 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1870 ; CHECK-NEXT: it gt
1871 ; CHECK-NEXT: movgt.w r0, #-1
1872 ; CHECK-NEXT: vcmp.f32 s16, s16
1873 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1874 ; CHECK-NEXT: it vs
1875 ; CHECK-NEXT: movvs r0, #0
1876 ; CHECK-NEXT: str.w r0, [r8]
1877 ; CHECK-NEXT: vmov r0, s17
1878 ; CHECK-NEXT: vcmp.f32 s19, s20
1879 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1880 ; CHECK-NEXT: vcmp.f32 s19, s22
1881 ; CHECK-NEXT: it lt
1882 ; CHECK-NEXT: movlt r4, #0
1883 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1884 ; CHECK-NEXT: vcmp.f32 s19, s19
1885 ; CHECK-NEXT: it gt
1886 ; CHECK-NEXT: movgt.w r4, #-1
1887 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1888 ; CHECK-NEXT: vcmp.f32 s18, s20
1889 ; CHECK-NEXT: itt vs
1890 ; CHECK-NEXT: movvs r4, #0
1891 ; CHECK-NEXT: movvs r7, #0
1892 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1893 ; CHECK-NEXT: it lt
1894 ; CHECK-NEXT: movlt.w r9, #0
1895 ; CHECK-NEXT: vcmp.f32 s18, s22
1896 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1897 ; CHECK-NEXT: it gt
1898 ; CHECK-NEXT: movgt.w r9, #-1
1899 ; CHECK-NEXT: vcmp.f32 s18, s18
1900 ; CHECK-NEXT: mov r1, r7
1901 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1902 ; CHECK-NEXT: itt vs
1903 ; CHECK-NEXT: movvs.w r9, #0
1904 ; CHECK-NEXT: movvs r5, #0
1905 ; CHECK-NEXT: bfc r1, #18, #14
1906 ; CHECK-NEXT: vcmp.f32 s16, s20
1907 ; CHECK-NEXT: bfc r5, #18, #14
1908 ; CHECK-NEXT: mov r6, r9
1909 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1910 ; CHECK-NEXT: lsll r4, r1, #22
1911 ; CHECK-NEXT: lsrl r6, r5, #28
1912 ; CHECK-NEXT: itt lt
1913 ; CHECK-NEXT: movwlt r10, #0
1914 ; CHECK-NEXT: movtlt r10, #65534
1915 ; CHECK-NEXT: vcmp.f32 s16, s22
1916 ; CHECK-NEXT: orrs r1, r5
1917 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1918 ; CHECK-NEXT: itt gt
1919 ; CHECK-NEXT: movwgt r10, #65535
1920 ; CHECK-NEXT: movtgt r10, #1
1921 ; CHECK-NEXT: str.w r1, [r8, #20]
1922 ; CHECK-NEXT: bl __aeabi_f2lz
1923 ; CHECK-NEXT: vcmp.f32 s17, s20
1924 ; CHECK-NEXT: orr.w r2, r6, r4
1925 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1926 ; CHECK-NEXT: itt lt
1927 ; CHECK-NEXT: movlt r1, #0
1928 ; CHECK-NEXT: movtlt r1, #65534
1929 ; CHECK-NEXT: vcmp.f32 s17, s22
1930 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1931 ; CHECK-NEXT: itt gt
1932 ; CHECK-NEXT: movwgt r1, #65535
1933 ; CHECK-NEXT: movtgt r1, #1
1934 ; CHECK-NEXT: str.w r2, [r8, #16]
1935 ; CHECK-NEXT: lsrs r2, r7, #10
1936 ; CHECK-NEXT: vcmp.f32 s17, s20
1937 ; CHECK-NEXT: strb.w r2, [r8, #24]
1938 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1939 ; CHECK-NEXT: it lt
1940 ; CHECK-NEXT: movlt r0, #0
1941 ; CHECK-NEXT: vcmp.f32 s17, s22
1942 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1943 ; CHECK-NEXT: it gt
1944 ; CHECK-NEXT: movgt.w r0, #-1
1945 ; CHECK-NEXT: vcmp.f32 s17, s17
1946 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1947 ; CHECK-NEXT: itt vs
1948 ; CHECK-NEXT: movvs r0, #0
1949 ; CHECK-NEXT: movvs r1, #0
1950 ; CHECK-NEXT: bfc r1, #18, #14
1951 ; CHECK-NEXT: mov r2, r0
1952 ; CHECK-NEXT: lsrl r2, r1, #14
1953 ; CHECK-NEXT: vcmp.f32 s16, s16
1954 ; CHECK-NEXT: orr.w r1, r1, r9, lsl #4
1955 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1956 ; CHECK-NEXT: strd r2, r1, [r8, #8]
1957 ; CHECK-NEXT: it vs
1958 ; CHECK-NEXT: movvs.w r10, #0
1959 ; CHECK-NEXT: bfc r10, #18, #14
1960 ; CHECK-NEXT: orr.w r0, r10, r0, lsl #18
1961 ; CHECK-NEXT: str.w r0, [r8, #4]
1962 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
1963 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, pc}
1964 ; CHECK-NEXT: .p2align 2
1965 ; CHECK-NEXT: @ %bb.1:
1966 ; CHECK-NEXT: .LCPI28_0:
1967 ; CHECK-NEXT: .long 0xd8000000 @ float -5.62949953E+14
1968 ; CHECK-NEXT: .LCPI28_1:
1969 ; CHECK-NEXT: .long 0x57ffffff @ float 5.6294992E+14
1970 %x = call <4 x i50> @llvm.fptosi.sat.v4f32.v4i50(<4 x float> %f)
1971 ret <4 x i50> %x
1972 }
1974 define arm_aapcs_vfpcc <4 x i64> @test_signed_v4f32_v4i64(<4 x float> %f) {
1975 ; CHECK-LABEL: test_signed_v4f32_v4i64:
1976 ; CHECK: @ %bb.0:
1977 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, lr}
1978 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, lr}
1979 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
1980 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
1981 ; CHECK-NEXT: vmov q4, q0
1982 ; CHECK-NEXT: vmov r0, s19
1983 ; CHECK-NEXT: bl __aeabi_f2lz
1984 ; CHECK-NEXT: mov r10, r0
1985 ; CHECK-NEXT: vmov r0, s18
1986 ; CHECK-NEXT: vldr s22, .LCPI29_0
1987 ; CHECK-NEXT: mov r9, r1
1988 ; CHECK-NEXT: vldr s20, .LCPI29_1
1989 ; CHECK-NEXT: vmov r8, s16
1990 ; CHECK-NEXT: vcmp.f32 s19, s22
1991 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1992 ; CHECK-NEXT: it lt
1993 ; CHECK-NEXT: movlt.w r10, #0
1994 ; CHECK-NEXT: vcmp.f32 s19, s20
1995 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
1996 ; CHECK-NEXT: it gt
1997 ; CHECK-NEXT: movgt.w r10, #-1
1998 ; CHECK-NEXT: vcmp.f32 s19, s19
1999 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2000 ; CHECK-NEXT: vmov r4, s17
2001 ; CHECK-NEXT: it vs
2002 ; CHECK-NEXT: movvs.w r10, #0
2003 ; CHECK-NEXT: bl __aeabi_f2lz
2004 ; CHECK-NEXT: vcmp.f32 s18, s22
2005 ; CHECK-NEXT: mov r7, r0
2006 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2007 ; CHECK-NEXT: vcmp.f32 s18, s20
2008 ; CHECK-NEXT: it lt
2009 ; CHECK-NEXT: movlt r7, #0
2010 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2011 ; CHECK-NEXT: vcmp.f32 s18, s18
2012 ; CHECK-NEXT: it gt
2013 ; CHECK-NEXT: movgt.w r7, #-1
2014 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2015 ; CHECK-NEXT: vcmp.f32 s19, s22
2016 ; CHECK-NEXT: it vs
2017 ; CHECK-NEXT: movvs r7, #0
2018 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2019 ; CHECK-NEXT: vcmp.f32 s19, s20
2020 ; CHECK-NEXT: it lt
2021 ; CHECK-NEXT: movlt.w r9, #-2147483648
2022 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2023 ; CHECK-NEXT: vcmp.f32 s19, s19
2024 ; CHECK-NEXT: it gt
2025 ; CHECK-NEXT: mvngt r9, #-2147483648
2026 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2027 ; CHECK-NEXT: mov r6, r1
2028 ; CHECK-NEXT: vcmp.f32 s18, s22
2029 ; CHECK-NEXT: it vs
2030 ; CHECK-NEXT: movvs.w r9, #0
2031 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2032 ; CHECK-NEXT: it lt
2033 ; CHECK-NEXT: movlt.w r6, #-2147483648
2034 ; CHECK-NEXT: vcmp.f32 s18, s20
2035 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2036 ; CHECK-NEXT: mov r0, r4
2037 ; CHECK-NEXT: it gt
2038 ; CHECK-NEXT: mvngt r6, #-2147483648
2039 ; CHECK-NEXT: vcmp.f32 s18, s18
2040 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2041 ; CHECK-NEXT: it vs
2042 ; CHECK-NEXT: movvs r6, #0
2043 ; CHECK-NEXT: bl __aeabi_f2lz
2044 ; CHECK-NEXT: mov r5, r0
2045 ; CHECK-NEXT: vcmp.f32 s17, s22
2046 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2047 ; CHECK-NEXT: it lt
2048 ; CHECK-NEXT: movlt r5, #0
2049 ; CHECK-NEXT: vcmp.f32 s17, s20
2050 ; CHECK-NEXT: mov r0, r8
2051 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2052 ; CHECK-NEXT: it gt
2053 ; CHECK-NEXT: movgt.w r5, #-1
2054 ; CHECK-NEXT: vcmp.f32 s17, s17
2055 ; CHECK-NEXT: mov r4, r1
2056 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2057 ; CHECK-NEXT: it vs
2058 ; CHECK-NEXT: movvs r5, #0
2059 ; CHECK-NEXT: bl __aeabi_f2lz
2060 ; CHECK-NEXT: vcmp.f32 s16, s22
2061 ; CHECK-NEXT: vmov q1[2], q1[0], r7, r10
2062 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2063 ; CHECK-NEXT: vcmp.f32 s16, s20
2064 ; CHECK-NEXT: it lt
2065 ; CHECK-NEXT: movlt r0, #0
2066 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2067 ; CHECK-NEXT: vcmp.f32 s16, s16
2068 ; CHECK-NEXT: it gt
2069 ; CHECK-NEXT: movgt.w r0, #-1
2070 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2071 ; CHECK-NEXT: vcmp.f32 s17, s22
2072 ; CHECK-NEXT: it vs
2073 ; CHECK-NEXT: movvs r0, #0
2074 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2075 ; CHECK-NEXT: vcmp.f32 s17, s20
2076 ; CHECK-NEXT: it lt
2077 ; CHECK-NEXT: movlt.w r4, #-2147483648
2078 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2079 ; CHECK-NEXT: vcmp.f32 s17, s17
2080 ; CHECK-NEXT: it gt
2081 ; CHECK-NEXT: mvngt r4, #-2147483648
2082 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2083 ; CHECK-NEXT: vcmp.f32 s16, s22
2084 ; CHECK-NEXT: it vs
2085 ; CHECK-NEXT: movvs r4, #0
2086 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2087 ; CHECK-NEXT: it lt
2088 ; CHECK-NEXT: movlt.w r1, #-2147483648
2089 ; CHECK-NEXT: vcmp.f32 s16, s20
2090 ; CHECK-NEXT: vmov q0[2], q0[0], r0, r5
2091 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2092 ; CHECK-NEXT: it gt
2093 ; CHECK-NEXT: mvngt r1, #-2147483648
2094 ; CHECK-NEXT: vcmp.f32 s16, s16
2095 ; CHECK-NEXT: vmov q1[3], q1[1], r6, r9
2096 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2097 ; CHECK-NEXT: it vs
2098 ; CHECK-NEXT: movvs r1, #0
2099 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r4
2100 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
2101 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, pc}
2102 ; CHECK-NEXT: .p2align 2
2103 ; CHECK-NEXT: @ %bb.1:
2104 ; CHECK-NEXT: .LCPI29_0:
2105 ; CHECK-NEXT: .long 0xdf000000 @ float -9.22337203E+18
2106 ; CHECK-NEXT: .LCPI29_1:
2107 ; CHECK-NEXT: .long 0x5effffff @ float 9.22337149E+18
2108 %x = call <4 x i64> @llvm.fptosi.sat.v4f32.v4i64(<4 x float> %f)
2109 ret <4 x i64> %x
2110 }
2112 define arm_aapcs_vfpcc <4 x i100> @test_signed_v4f32_v4i100(<4 x float> %f) {
2113 ; CHECK-LABEL: test_signed_v4f32_v4i100:
2114 ; CHECK: @ %bb.0:
2115 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2116 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2117 ; CHECK-NEXT: .pad #4
2118 ; CHECK-NEXT: sub sp, #4
2119 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
2120 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
2121 ; CHECK-NEXT: vmov q4, q0
2122 ; CHECK-NEXT: mov r9, r0
2123 ; CHECK-NEXT: vmov r0, s18
2124 ; CHECK-NEXT: bl __fixsfti
2125 ; CHECK-NEXT: mov r10, r3
2126 ; CHECK-NEXT: vmov r3, s16
2127 ; CHECK-NEXT: vldr s22, .LCPI30_0
2128 ; CHECK-NEXT: vmov r7, s17
2129 ; CHECK-NEXT: vldr s20, .LCPI30_1
2130 ; CHECK-NEXT: vmov r4, s19
2131 ; CHECK-NEXT: vcmp.f32 s18, s22
2132 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2133 ; CHECK-NEXT: vcmp.f32 s18, s20
2134 ; CHECK-NEXT: it lt
2135 ; CHECK-NEXT: movlt r2, #0
2136 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2137 ; CHECK-NEXT: vcmp.f32 s18, s18
2138 ; CHECK-NEXT: it gt
2139 ; CHECK-NEXT: movgt.w r2, #-1
2140 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2141 ; CHECK-NEXT: vcmp.f32 s18, s22
2142 ; CHECK-NEXT: it vs
2143 ; CHECK-NEXT: movvs r2, #0
2144 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2145 ; CHECK-NEXT: vcmp.f32 s18, s20
2146 ; CHECK-NEXT: str.w r2, [r9, #33]
2147 ; CHECK-NEXT: it lt
2148 ; CHECK-NEXT: movlt r1, #0
2149 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2150 ; CHECK-NEXT: vcmp.f32 s18, s18
2151 ; CHECK-NEXT: it gt
2152 ; CHECK-NEXT: movgt.w r1, #-1
2153 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2154 ; CHECK-NEXT: vcmp.f32 s18, s22
2155 ; CHECK-NEXT: it vs
2156 ; CHECK-NEXT: movvs r1, #0
2157 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2158 ; CHECK-NEXT: str.w r1, [r9, #29]
2159 ; CHECK-NEXT: it lt
2160 ; CHECK-NEXT: movlt r0, #0
2161 ; CHECK-NEXT: vcmp.f32 s18, s20
2162 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2163 ; CHECK-NEXT: it gt
2164 ; CHECK-NEXT: movgt.w r0, #-1
2165 ; CHECK-NEXT: vcmp.f32 s18, s18
2166 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2167 ; CHECK-NEXT: it vs
2168 ; CHECK-NEXT: movvs r0, #0
2169 ; CHECK-NEXT: str.w r0, [r9, #25]
2170 ; CHECK-NEXT: mov r0, r3
2171 ; CHECK-NEXT: bl __fixsfti
2172 ; CHECK-NEXT: vcmp.f32 s16, s22
2173 ; CHECK-NEXT: mov r11, r3
2174 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2175 ; CHECK-NEXT: vcmp.f32 s16, s20
2176 ; CHECK-NEXT: it lt
2177 ; CHECK-NEXT: movlt r2, #0
2178 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2179 ; CHECK-NEXT: vcmp.f32 s16, s16
2180 ; CHECK-NEXT: it gt
2181 ; CHECK-NEXT: movgt.w r2, #-1
2182 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2183 ; CHECK-NEXT: vcmp.f32 s16, s22
2184 ; CHECK-NEXT: it vs
2185 ; CHECK-NEXT: movvs r2, #0
2186 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2187 ; CHECK-NEXT: vcmp.f32 s16, s20
2188 ; CHECK-NEXT: str.w r2, [r9, #8]
2189 ; CHECK-NEXT: it lt
2190 ; CHECK-NEXT: movlt r1, #0
2191 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2192 ; CHECK-NEXT: vcmp.f32 s16, s16
2193 ; CHECK-NEXT: it gt
2194 ; CHECK-NEXT: movgt.w r1, #-1
2195 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2196 ; CHECK-NEXT: vcmp.f32 s16, s22
2197 ; CHECK-NEXT: it vs
2198 ; CHECK-NEXT: movvs r1, #0
2199 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2200 ; CHECK-NEXT: str.w r1, [r9, #4]
2201 ; CHECK-NEXT: it lt
2202 ; CHECK-NEXT: movlt r0, #0
2203 ; CHECK-NEXT: vcmp.f32 s16, s20
2204 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2205 ; CHECK-NEXT: it gt
2206 ; CHECK-NEXT: movgt.w r0, #-1
2207 ; CHECK-NEXT: vcmp.f32 s16, s16
2208 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2209 ; CHECK-NEXT: it vs
2210 ; CHECK-NEXT: movvs r0, #0
2211 ; CHECK-NEXT: str.w r0, [r9]
2212 ; CHECK-NEXT: mov r0, r4
2213 ; CHECK-NEXT: bl __fixsfti
2214 ; CHECK-NEXT: vcmp.f32 s19, s22
2215 ; CHECK-NEXT: mov r6, r0
2216 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2217 ; CHECK-NEXT: vcmp.f32 s19, s20
2218 ; CHECK-NEXT: it lt
2219 ; CHECK-NEXT: movlt r6, #0
2220 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2221 ; CHECK-NEXT: vcmp.f32 s19, s19
2222 ; CHECK-NEXT: it gt
2223 ; CHECK-NEXT: movgt.w r6, #-1
2224 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2225 ; CHECK-NEXT: vcmp.f32 s18, s22
2226 ; CHECK-NEXT: it vs
2227 ; CHECK-NEXT: movvs r6, #0
2228 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2229 ; CHECK-NEXT: it lt
2230 ; CHECK-NEXT: mvnlt r10, #7
2231 ; CHECK-NEXT: vcmp.f32 s18, s20
2232 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2233 ; CHECK-NEXT: it gt
2234 ; CHECK-NEXT: movgt.w r10, #7
2235 ; CHECK-NEXT: vcmp.f32 s18, s18
2236 ; CHECK-NEXT: mov r5, r1
2237 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2238 ; CHECK-NEXT: it vs
2239 ; CHECK-NEXT: movvs.w r10, #0
2240 ; CHECK-NEXT: and r0, r10, #15
2241 ; CHECK-NEXT: mov r4, r2
2242 ; CHECK-NEXT: orr.w r0, r0, r6, lsl #4
2243 ; CHECK-NEXT: str.w r0, [r9, #37]
2244 ; CHECK-NEXT: mov r0, r7
2245 ; CHECK-NEXT: mov r8, r3
2246 ; CHECK-NEXT: bl __fixsfti
2247 ; CHECK-NEXT: vcmp.f32 s17, s22
2248 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2249 ; CHECK-NEXT: vcmp.f32 s17, s20
2250 ; CHECK-NEXT: it lt
2251 ; CHECK-NEXT: movlt r0, #0
2252 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2253 ; CHECK-NEXT: vcmp.f32 s17, s17
2254 ; CHECK-NEXT: it gt
2255 ; CHECK-NEXT: movgt.w r0, #-1
2256 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2257 ; CHECK-NEXT: vcmp.f32 s16, s22
2258 ; CHECK-NEXT: it vs
2259 ; CHECK-NEXT: movvs r0, #0
2260 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2261 ; CHECK-NEXT: vcmp.f32 s16, s20
2262 ; CHECK-NEXT: it lt
2263 ; CHECK-NEXT: mvnlt r11, #7
2264 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2265 ; CHECK-NEXT: vcmp.f32 s16, s16
2266 ; CHECK-NEXT: it gt
2267 ; CHECK-NEXT: movgt.w r11, #7
2268 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2269 ; CHECK-NEXT: vcmp.f32 s19, s22
2270 ; CHECK-NEXT: it vs
2271 ; CHECK-NEXT: movvs.w r11, #0
2272 ; CHECK-NEXT: and r7, r11, #15
2273 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2274 ; CHECK-NEXT: vcmp.f32 s19, s20
2275 ; CHECK-NEXT: orr.w r7, r7, r0, lsl #4
2276 ; CHECK-NEXT: str.w r7, [r9, #12]
2277 ; CHECK-NEXT: it lt
2278 ; CHECK-NEXT: movlt r5, #0
2279 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2280 ; CHECK-NEXT: vcmp.f32 s19, s19
2281 ; CHECK-NEXT: it gt
2282 ; CHECK-NEXT: movgt.w r5, #-1
2283 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2284 ; CHECK-NEXT: vcmp.f32 s19, s22
2285 ; CHECK-NEXT: it vs
2286 ; CHECK-NEXT: movvs r5, #0
2287 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2288 ; CHECK-NEXT: vcmp.f32 s19, s20
2289 ; CHECK-NEXT: it lt
2290 ; CHECK-NEXT: movlt r4, #0
2291 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2292 ; CHECK-NEXT: vcmp.f32 s19, s19
2293 ; CHECK-NEXT: it gt
2294 ; CHECK-NEXT: movgt.w r4, #-1
2295 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2296 ; CHECK-NEXT: lsrl r6, r5, #28
2297 ; CHECK-NEXT: vcmp.f32 s19, s22
2298 ; CHECK-NEXT: it vs
2299 ; CHECK-NEXT: movvs r4, #0
2300 ; CHECK-NEXT: orr.w r7, r5, r4, lsl #4
2301 ; CHECK-NEXT: str.w r7, [r9, #45]
2302 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2303 ; CHECK-NEXT: str.w r6, [r9, #41]
2304 ; CHECK-NEXT: it lt
2305 ; CHECK-NEXT: mvnlt r8, #7
2306 ; CHECK-NEXT: vcmp.f32 s19, s20
2307 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2308 ; CHECK-NEXT: it gt
2309 ; CHECK-NEXT: movgt.w r8, #7
2310 ; CHECK-NEXT: vcmp.f32 s19, s19
2311 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2312 ; CHECK-NEXT: it vs
2313 ; CHECK-NEXT: movvs.w r8, #0
2314 ; CHECK-NEXT: and r5, r8, #15
2315 ; CHECK-NEXT: vcmp.f32 s17, s22
2316 ; CHECK-NEXT: lsrl r4, r5, #28
2317 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2318 ; CHECK-NEXT: vcmp.f32 s17, s20
2319 ; CHECK-NEXT: strb.w r4, [r9, #49]
2320 ; CHECK-NEXT: it lt
2321 ; CHECK-NEXT: mvnlt r3, #7
2322 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2323 ; CHECK-NEXT: vcmp.f32 s17, s17
2324 ; CHECK-NEXT: it gt
2325 ; CHECK-NEXT: movgt r3, #7
2326 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2327 ; CHECK-NEXT: vcmp.f32 s17, s22
2328 ; CHECK-NEXT: it vs
2329 ; CHECK-NEXT: movvs r3, #0
2330 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2331 ; CHECK-NEXT: it lt
2332 ; CHECK-NEXT: movlt r1, #0
2333 ; CHECK-NEXT: vcmp.f32 s17, s20
2334 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2335 ; CHECK-NEXT: it gt
2336 ; CHECK-NEXT: movgt.w r1, #-1
2337 ; CHECK-NEXT: vcmp.f32 s17, s17
2338 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2339 ; CHECK-NEXT: it vs
2340 ; CHECK-NEXT: movvs r1, #0
2341 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r3
2342 ; CHECK-NEXT: vcmp.f32 s17, s22
2343 ; CHECK-NEXT: vmov r1, s1
2344 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2345 ; CHECK-NEXT: it lt
2346 ; CHECK-NEXT: movlt r2, #0
2347 ; CHECK-NEXT: vcmp.f32 s17, s20
2348 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2349 ; CHECK-NEXT: lsrl r0, r1, #28
2350 ; CHECK-NEXT: it gt
2351 ; CHECK-NEXT: movgt.w r2, #-1
2352 ; CHECK-NEXT: vcmp.f32 s17, s17
2353 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2354 ; CHECK-NEXT: it vs
2355 ; CHECK-NEXT: movvs r2, #0
2356 ; CHECK-NEXT: orr.w r1, r1, r2, lsl #4
2357 ; CHECK-NEXT: strd r0, r1, [r9, #16]
2358 ; CHECK-NEXT: and r1, r3, #15
2359 ; CHECK-NEXT: lsrl r2, r1, #28
2360 ; CHECK-NEXT: strb.w r2, [r9, #24]
2361 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
2362 ; CHECK-NEXT: add sp, #4
2363 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
2364 ; CHECK-NEXT: .p2align 2
2365 ; CHECK-NEXT: @ %bb.1:
2366 ; CHECK-NEXT: .LCPI30_0:
2367 ; CHECK-NEXT: .long 0xf1000000 @ float -6.338253E+29
2368 ; CHECK-NEXT: .LCPI30_1:
2369 ; CHECK-NEXT: .long 0x70ffffff @ float 6.33825262E+29
2370 %x = call <4 x i100> @llvm.fptosi.sat.v4f32.v4i100(<4 x float> %f)
2371 ret <4 x i100> %x
2372 }
2374 define arm_aapcs_vfpcc <4 x i128> @test_signed_v4f32_v4i128(<4 x float> %f) {
2375 ; CHECK-LABEL: test_signed_v4f32_v4i128:
2376 ; CHECK: @ %bb.0:
2377 ; CHECK-NEXT: .save {r4, r5, r6, r7, lr}
2378 ; CHECK-NEXT: push {r4, r5, r6, r7, lr}
2379 ; CHECK-NEXT: .pad #4
2380 ; CHECK-NEXT: sub sp, #4
2381 ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
2382 ; CHECK-NEXT: vpush {d8, d9, d10, d11}
2383 ; CHECK-NEXT: vmov q4, q0
2384 ; CHECK-NEXT: mov r4, r0
2385 ; CHECK-NEXT: vmov r0, s19
2386 ; CHECK-NEXT: bl __fixsfti
2387 ; CHECK-NEXT: vmov r5, s18
2388 ; CHECK-NEXT: vldr s22, .LCPI31_0
2389 ; CHECK-NEXT: vldr s20, .LCPI31_1
2390 ; CHECK-NEXT: vmov r7, s16
2391 ; CHECK-NEXT: vcmp.f32 s19, s22
2392 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2393 ; CHECK-NEXT: vcmp.f32 s19, s20
2394 ; CHECK-NEXT: it lt
2395 ; CHECK-NEXT: movlt.w r3, #-2147483648
2396 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2397 ; CHECK-NEXT: vcmp.f32 s19, s19
2398 ; CHECK-NEXT: it gt
2399 ; CHECK-NEXT: mvngt r3, #-2147483648
2400 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2401 ; CHECK-NEXT: vcmp.f32 s19, s22
2402 ; CHECK-NEXT: it vs
2403 ; CHECK-NEXT: movvs r3, #0
2404 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2405 ; CHECK-NEXT: vcmp.f32 s19, s20
2406 ; CHECK-NEXT: str r3, [r4, #60]
2407 ; CHECK-NEXT: it lt
2408 ; CHECK-NEXT: movlt r2, #0
2409 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2410 ; CHECK-NEXT: vcmp.f32 s19, s19
2411 ; CHECK-NEXT: it gt
2412 ; CHECK-NEXT: movgt.w r2, #-1
2413 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2414 ; CHECK-NEXT: vcmp.f32 s19, s22
2415 ; CHECK-NEXT: it vs
2416 ; CHECK-NEXT: movvs r2, #0
2417 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2418 ; CHECK-NEXT: vcmp.f32 s19, s20
2419 ; CHECK-NEXT: str r2, [r4, #56]
2420 ; CHECK-NEXT: it lt
2421 ; CHECK-NEXT: movlt r1, #0
2422 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2423 ; CHECK-NEXT: vcmp.f32 s19, s19
2424 ; CHECK-NEXT: it gt
2425 ; CHECK-NEXT: movgt.w r1, #-1
2426 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2427 ; CHECK-NEXT: vcmp.f32 s19, s22
2428 ; CHECK-NEXT: it vs
2429 ; CHECK-NEXT: movvs r1, #0
2430 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2431 ; CHECK-NEXT: str r1, [r4, #52]
2432 ; CHECK-NEXT: it lt
2433 ; CHECK-NEXT: movlt r0, #0
2434 ; CHECK-NEXT: vcmp.f32 s19, s20
2435 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2436 ; CHECK-NEXT: it gt
2437 ; CHECK-NEXT: movgt.w r0, #-1
2438 ; CHECK-NEXT: vcmp.f32 s19, s19
2439 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2440 ; CHECK-NEXT: it vs
2441 ; CHECK-NEXT: movvs r0, #0
2442 ; CHECK-NEXT: str r0, [r4, #48]
2443 ; CHECK-NEXT: mov r0, r5
2444 ; CHECK-NEXT: vmov r6, s17
2445 ; CHECK-NEXT: bl __fixsfti
2446 ; CHECK-NEXT: vcmp.f32 s18, s22
2447 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2448 ; CHECK-NEXT: vcmp.f32 s18, s20
2449 ; CHECK-NEXT: it lt
2450 ; CHECK-NEXT: movlt.w r3, #-2147483648
2451 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2452 ; CHECK-NEXT: vcmp.f32 s18, s18
2453 ; CHECK-NEXT: it gt
2454 ; CHECK-NEXT: mvngt r3, #-2147483648
2455 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2456 ; CHECK-NEXT: vcmp.f32 s18, s22
2457 ; CHECK-NEXT: it vs
2458 ; CHECK-NEXT: movvs r3, #0
2459 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2460 ; CHECK-NEXT: vcmp.f32 s18, s20
2461 ; CHECK-NEXT: str r3, [r4, #44]
2462 ; CHECK-NEXT: it lt
2463 ; CHECK-NEXT: movlt r2, #0
2464 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2465 ; CHECK-NEXT: vcmp.f32 s18, s18
2466 ; CHECK-NEXT: it gt
2467 ; CHECK-NEXT: movgt.w r2, #-1
2468 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2469 ; CHECK-NEXT: vcmp.f32 s18, s22
2470 ; CHECK-NEXT: it vs
2471 ; CHECK-NEXT: movvs r2, #0
2472 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2473 ; CHECK-NEXT: vcmp.f32 s18, s20
2474 ; CHECK-NEXT: str r2, [r4, #40]
2475 ; CHECK-NEXT: it lt
2476 ; CHECK-NEXT: movlt r1, #0
2477 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2478 ; CHECK-NEXT: vcmp.f32 s18, s18
2479 ; CHECK-NEXT: it gt
2480 ; CHECK-NEXT: movgt.w r1, #-1
2481 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2482 ; CHECK-NEXT: vcmp.f32 s18, s22
2483 ; CHECK-NEXT: it vs
2484 ; CHECK-NEXT: movvs r1, #0
2485 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2486 ; CHECK-NEXT: str r1, [r4, #36]
2487 ; CHECK-NEXT: it lt
2488 ; CHECK-NEXT: movlt r0, #0
2489 ; CHECK-NEXT: vcmp.f32 s18, s20
2490 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2491 ; CHECK-NEXT: it gt
2492 ; CHECK-NEXT: movgt.w r0, #-1
2493 ; CHECK-NEXT: vcmp.f32 s18, s18
2494 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2495 ; CHECK-NEXT: it vs
2496 ; CHECK-NEXT: movvs r0, #0
2497 ; CHECK-NEXT: str r0, [r4, #32]
2498 ; CHECK-NEXT: mov r0, r6
2499 ; CHECK-NEXT: bl __fixsfti
2500 ; CHECK-NEXT: vcmp.f32 s17, s22
2501 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2502 ; CHECK-NEXT: vcmp.f32 s17, s20
2503 ; CHECK-NEXT: it lt
2504 ; CHECK-NEXT: movlt.w r3, #-2147483648
2505 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2506 ; CHECK-NEXT: vcmp.f32 s17, s17
2507 ; CHECK-NEXT: it gt
2508 ; CHECK-NEXT: mvngt r3, #-2147483648
2509 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2510 ; CHECK-NEXT: vcmp.f32 s17, s22
2511 ; CHECK-NEXT: it vs
2512 ; CHECK-NEXT: movvs r3, #0
2513 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2514 ; CHECK-NEXT: vcmp.f32 s17, s20
2515 ; CHECK-NEXT: str r3, [r4, #28]
2516 ; CHECK-NEXT: it lt
2517 ; CHECK-NEXT: movlt r2, #0
2518 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2519 ; CHECK-NEXT: vcmp.f32 s17, s17
2520 ; CHECK-NEXT: it gt
2521 ; CHECK-NEXT: movgt.w r2, #-1
2522 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2523 ; CHECK-NEXT: vcmp.f32 s17, s22
2524 ; CHECK-NEXT: it vs
2525 ; CHECK-NEXT: movvs r2, #0
2526 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2527 ; CHECK-NEXT: vcmp.f32 s17, s20
2528 ; CHECK-NEXT: str r2, [r4, #24]
2529 ; CHECK-NEXT: it lt
2530 ; CHECK-NEXT: movlt r1, #0
2531 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2532 ; CHECK-NEXT: vcmp.f32 s17, s17
2533 ; CHECK-NEXT: it gt
2534 ; CHECK-NEXT: movgt.w r1, #-1
2535 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2536 ; CHECK-NEXT: vcmp.f32 s17, s22
2537 ; CHECK-NEXT: it vs
2538 ; CHECK-NEXT: movvs r1, #0
2539 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2540 ; CHECK-NEXT: str r1, [r4, #20]
2541 ; CHECK-NEXT: it lt
2542 ; CHECK-NEXT: movlt r0, #0
2543 ; CHECK-NEXT: vcmp.f32 s17, s20
2544 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2545 ; CHECK-NEXT: it gt
2546 ; CHECK-NEXT: movgt.w r0, #-1
2547 ; CHECK-NEXT: vcmp.f32 s17, s17
2548 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2549 ; CHECK-NEXT: it vs
2550 ; CHECK-NEXT: movvs r0, #0
2551 ; CHECK-NEXT: str r0, [r4, #16]
2552 ; CHECK-NEXT: mov r0, r7
2553 ; CHECK-NEXT: bl __fixsfti
2554 ; CHECK-NEXT: vcmp.f32 s16, s22
2555 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2556 ; CHECK-NEXT: vcmp.f32 s16, s20
2557 ; CHECK-NEXT: it lt
2558 ; CHECK-NEXT: movlt.w r3, #-2147483648
2559 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2560 ; CHECK-NEXT: vcmp.f32 s16, s16
2561 ; CHECK-NEXT: it gt
2562 ; CHECK-NEXT: mvngt r3, #-2147483648
2563 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2564 ; CHECK-NEXT: vcmp.f32 s16, s22
2565 ; CHECK-NEXT: it vs
2566 ; CHECK-NEXT: movvs r3, #0
2567 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2568 ; CHECK-NEXT: vcmp.f32 s16, s20
2569 ; CHECK-NEXT: str r3, [r4, #12]
2570 ; CHECK-NEXT: it lt
2571 ; CHECK-NEXT: movlt r2, #0
2572 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2573 ; CHECK-NEXT: vcmp.f32 s16, s16
2574 ; CHECK-NEXT: it gt
2575 ; CHECK-NEXT: movgt.w r2, #-1
2576 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2577 ; CHECK-NEXT: vcmp.f32 s16, s22
2578 ; CHECK-NEXT: it vs
2579 ; CHECK-NEXT: movvs r2, #0
2580 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2581 ; CHECK-NEXT: vcmp.f32 s16, s20
2582 ; CHECK-NEXT: str r2, [r4, #8]
2583 ; CHECK-NEXT: it lt
2584 ; CHECK-NEXT: movlt r1, #0
2585 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2586 ; CHECK-NEXT: vcmp.f32 s16, s16
2587 ; CHECK-NEXT: it gt
2588 ; CHECK-NEXT: movgt.w r1, #-1
2589 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2590 ; CHECK-NEXT: vcmp.f32 s16, s22
2591 ; CHECK-NEXT: it vs
2592 ; CHECK-NEXT: movvs r1, #0
2593 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2594 ; CHECK-NEXT: str r1, [r4, #4]
2595 ; CHECK-NEXT: it lt
2596 ; CHECK-NEXT: movlt r0, #0
2597 ; CHECK-NEXT: vcmp.f32 s16, s20
2598 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2599 ; CHECK-NEXT: it gt
2600 ; CHECK-NEXT: movgt.w r0, #-1
2601 ; CHECK-NEXT: vcmp.f32 s16, s16
2602 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
2603 ; CHECK-NEXT: it vs
2604 ; CHECK-NEXT: movvs r0, #0
2605 ; CHECK-NEXT: str r0, [r4]
2606 ; CHECK-NEXT: vpop {d8, d9, d10, d11}
2607 ; CHECK-NEXT: add sp, #4
2608 ; CHECK-NEXT: pop {r4, r5, r6, r7, pc}
2609 ; CHECK-NEXT: .p2align 2
2610 ; CHECK-NEXT: @ %bb.1:
2611 ; CHECK-NEXT: .LCPI31_0:
2612 ; CHECK-NEXT: .long 0xff000000 @ float -1.70141183E+38
2613 ; CHECK-NEXT: .LCPI31_1:
2614 ; CHECK-NEXT: .long 0x7effffff @ float 1.70141173E+38
2615 %x = call <4 x i128> @llvm.fptosi.sat.v4f32.v4i128(<4 x float> %f)
2616 ret <4 x i128> %x
2617 }
2619 ;
2620 ; 2-Vector double to signed integer -- result size variation
2621 ;
2623 declare <2 x i1> @llvm.fptosi.sat.v2f64.v2i1 (<2 x double>)
2624 declare <2 x i8> @llvm.fptosi.sat.v2f64.v2i8 (<2 x double>)
2625 declare <2 x i13> @llvm.fptosi.sat.v2f64.v2i13 (<2 x double>)
2626 declare <2 x i16> @llvm.fptosi.sat.v2f64.v2i16 (<2 x double>)
2627 declare <2 x i19> @llvm.fptosi.sat.v2f64.v2i19 (<2 x double>)
2628 declare <2 x i50> @llvm.fptosi.sat.v2f64.v2i50 (<2 x double>)
2629 declare <2 x i64> @llvm.fptosi.sat.v2f64.v2i64 (<2 x double>)
2630 declare <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double>)
2631 declare <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double>)
2633 define arm_aapcs_vfpcc <2 x i1> @test_signed_v2f64_v2i1(<2 x double> %f) {
2634 ; CHECK-LABEL: test_signed_v2f64_v2i1:
2635 ; CHECK: @ %bb.0:
2636 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2637 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2638 ; CHECK-NEXT: .pad #4
2639 ; CHECK-NEXT: sub sp, #4
2640 ; CHECK-NEXT: .vsave {d8, d9}
2641 ; CHECK-NEXT: vpush {d8, d9}
2642 ; CHECK-NEXT: .pad #24
2643 ; CHECK-NEXT: sub sp, #24
2644 ; CHECK-NEXT: vmov q4, q0
2645 ; CHECK-NEXT: vldr d0, .LCPI32_0
2646 ; CHECK-NEXT: vmov r8, r7, d8
2647 ; CHECK-NEXT: str r0, [sp, #20] @ 4-byte Spill
2648 ; CHECK-NEXT: vmov r2, r3, d0
2649 ; CHECK-NEXT: mov r0, r8
2650 ; CHECK-NEXT: mov r1, r7
2651 ; CHECK-NEXT: strd r2, r3, [sp, #12] @ 8-byte Folded Spill
2652 ; CHECK-NEXT: bl __aeabi_dcmpgt
2653 ; CHECK-NEXT: vldr d0, .LCPI32_1
2654 ; CHECK-NEXT: mov r9, r0
2655 ; CHECK-NEXT: mov r0, r8
2656 ; CHECK-NEXT: mov r1, r7
2657 ; CHECK-NEXT: vmov r2, r3, d0
2658 ; CHECK-NEXT: strd r2, r3, [sp, #4] @ 8-byte Folded Spill
2659 ; CHECK-NEXT: bl __aeabi_dcmpge
2660 ; CHECK-NEXT: mov r10, r0
2661 ; CHECK-NEXT: mov r0, r8
2662 ; CHECK-NEXT: mov r1, r7
2663 ; CHECK-NEXT: bl __aeabi_d2iz
2664 ; CHECK-NEXT: mov r11, r0
2665 ; CHECK-NEXT: cmp.w r10, #0
2666 ; CHECK-NEXT: it eq
2667 ; CHECK-NEXT: moveq.w r11, #-1
2668 ; CHECK-NEXT: mov r0, r8
2669 ; CHECK-NEXT: mov r1, r7
2670 ; CHECK-NEXT: mov r2, r8
2671 ; CHECK-NEXT: mov r3, r7
2672 ; CHECK-NEXT: cmp.w r9, #0
2673 ; CHECK-NEXT: vmov r6, r5, d9
2674 ; CHECK-NEXT: it ne
2675 ; CHECK-NEXT: movne.w r11, #0
2676 ; CHECK-NEXT: bl __aeabi_dcmpun
2677 ; CHECK-NEXT: cmp r0, #0
2678 ; CHECK-NEXT: it ne
2679 ; CHECK-NEXT: movne.w r11, #0
2680 ; CHECK-NEXT: and r0, r11, #1
2681 ; CHECK-NEXT: ldrd r2, r3, [sp, #12] @ 8-byte Folded Reload
2682 ; CHECK-NEXT: rsbs r0, r0, #0
2683 ; CHECK-NEXT: movs r4, #0
2684 ; CHECK-NEXT: bfi r4, r0, #0, #1
2685 ; CHECK-NEXT: mov r0, r6
2686 ; CHECK-NEXT: mov r1, r5
2687 ; CHECK-NEXT: bl __aeabi_dcmpgt
2688 ; CHECK-NEXT: ldrd r2, r3, [sp, #4] @ 8-byte Folded Reload
2689 ; CHECK-NEXT: mov r8, r0
2690 ; CHECK-NEXT: mov r0, r6
2691 ; CHECK-NEXT: mov r1, r5
2692 ; CHECK-NEXT: bl __aeabi_dcmpge
2693 ; CHECK-NEXT: mov r9, r0
2694 ; CHECK-NEXT: mov r0, r6
2695 ; CHECK-NEXT: mov r1, r5
2696 ; CHECK-NEXT: bl __aeabi_d2iz
2697 ; CHECK-NEXT: mov r7, r0
2698 ; CHECK-NEXT: cmp.w r9, #0
2699 ; CHECK-NEXT: it eq
2700 ; CHECK-NEXT: moveq.w r7, #-1
2701 ; CHECK-NEXT: mov r0, r6
2702 ; CHECK-NEXT: mov r1, r5
2703 ; CHECK-NEXT: mov r2, r6
2704 ; CHECK-NEXT: mov r3, r5
2705 ; CHECK-NEXT: cmp.w r8, #0
2706 ; CHECK-NEXT: it ne
2707 ; CHECK-NEXT: movne r7, #0
2708 ; CHECK-NEXT: bl __aeabi_dcmpun
2709 ; CHECK-NEXT: cmp r0, #0
2710 ; CHECK-NEXT: it ne
2711 ; CHECK-NEXT: movne r7, #0
2712 ; CHECK-NEXT: and r0, r7, #1
2713 ; CHECK-NEXT: rsbs r0, r0, #0
2714 ; CHECK-NEXT: bfi r4, r0, #1, #1
2715 ; CHECK-NEXT: ldr r0, [sp, #20] @ 4-byte Reload
2716 ; CHECK-NEXT: strb r4, [r0]
2717 ; CHECK-NEXT: add sp, #24
2718 ; CHECK-NEXT: vpop {d8, d9}
2719 ; CHECK-NEXT: add sp, #4
2720 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
2721 ; CHECK-NEXT: .p2align 3
2722 ; CHECK-NEXT: @ %bb.1:
2723 ; CHECK-NEXT: .LCPI32_0:
2724 ; CHECK-NEXT: .long 0 @ double 0
2725 ; CHECK-NEXT: .long 0
2726 ; CHECK-NEXT: .LCPI32_1:
2727 ; CHECK-NEXT: .long 0 @ double -1
2728 ; CHECK-NEXT: .long 3220176896
2729 %x = call <2 x i1> @llvm.fptosi.sat.v2f64.v2i1(<2 x double> %f)
2730 ret <2 x i1> %x
2731 }
2733 define arm_aapcs_vfpcc <2 x i8> @test_signed_v2f64_v2i8(<2 x double> %f) {
2734 ; CHECK-LABEL: test_signed_v2f64_v2i8:
2735 ; CHECK: @ %bb.0:
2736 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2737 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2738 ; CHECK-NEXT: .pad #4
2739 ; CHECK-NEXT: sub sp, #4
2740 ; CHECK-NEXT: .vsave {d8, d9}
2741 ; CHECK-NEXT: vpush {d8, d9}
2742 ; CHECK-NEXT: .pad #24
2743 ; CHECK-NEXT: sub sp, #24
2744 ; CHECK-NEXT: vmov q4, q0
2745 ; CHECK-NEXT: vldr d0, .LCPI33_0
2746 ; CHECK-NEXT: vmov r8, r7, d9
2747 ; CHECK-NEXT: vmov r2, r3, d0
2748 ; CHECK-NEXT: mov r0, r8
2749 ; CHECK-NEXT: mov r1, r7
2750 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
2751 ; CHECK-NEXT: bl __aeabi_dcmpge
2752 ; CHECK-NEXT: clz r0, r0
2753 ; CHECK-NEXT: vldr d0, .LCPI33_1
2754 ; CHECK-NEXT: mov r1, r7
2755 ; CHECK-NEXT: lsrs r4, r0, #5
2756 ; CHECK-NEXT: mov r0, r8
2757 ; CHECK-NEXT: vmov r6, r5, d0
2758 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
2759 ; CHECK-NEXT: bl __aeabi_d2lz
2760 ; CHECK-NEXT: mov r11, r0
2761 ; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill
2762 ; CHECK-NEXT: mov r0, r8
2763 ; CHECK-NEXT: mov r1, r7
2764 ; CHECK-NEXT: mov r2, r6
2765 ; CHECK-NEXT: mov r3, r5
2766 ; CHECK-NEXT: cmp r4, #0
2767 ; CHECK-NEXT: it ne
2768 ; CHECK-NEXT: mvnne r11, #127
2769 ; CHECK-NEXT: bl __aeabi_dcmpgt
2770 ; CHECK-NEXT: cmp r0, #0
2771 ; CHECK-NEXT: it ne
2772 ; CHECK-NEXT: movne r0, #1
2773 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
2774 ; CHECK-NEXT: cmp r0, #0
2775 ; CHECK-NEXT: mov r0, r8
2776 ; CHECK-NEXT: mov r1, r7
2777 ; CHECK-NEXT: mov r2, r8
2778 ; CHECK-NEXT: mov r3, r7
2779 ; CHECK-NEXT: it ne
2780 ; CHECK-NEXT: movne.w r11, #127
2781 ; CHECK-NEXT: bl __aeabi_dcmpun
2782 ; CHECK-NEXT: vmov r10, r7, d8
2783 ; CHECK-NEXT: mov r8, r0
2784 ; CHECK-NEXT: cmp r0, #0
2785 ; CHECK-NEXT: mov r2, r6
2786 ; CHECK-NEXT: mov r3, r5
2787 ; CHECK-NEXT: it ne
2788 ; CHECK-NEXT: movne.w r8, #1
2789 ; CHECK-NEXT: cmp.w r8, #0
2790 ; CHECK-NEXT: it ne
2791 ; CHECK-NEXT: movne.w r11, #0
2792 ; CHECK-NEXT: mov r0, r10
2793 ; CHECK-NEXT: mov r1, r7
2794 ; CHECK-NEXT: bl __aeabi_dcmpgt
2795 ; CHECK-NEXT: mov r6, r0
2796 ; CHECK-NEXT: cmp r0, #0
2797 ; CHECK-NEXT: it ne
2798 ; CHECK-NEXT: movne r6, #1
2799 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
2800 ; CHECK-NEXT: mov r0, r10
2801 ; CHECK-NEXT: mov r1, r7
2802 ; CHECK-NEXT: bl __aeabi_dcmpge
2803 ; CHECK-NEXT: clz r0, r0
2804 ; CHECK-NEXT: mov r1, r7
2805 ; CHECK-NEXT: lsr.w r9, r0, #5
2806 ; CHECK-NEXT: mov r0, r10
2807 ; CHECK-NEXT: bl __aeabi_d2lz
2808 ; CHECK-NEXT: mov r5, r0
2809 ; CHECK-NEXT: mov r4, r1
2810 ; CHECK-NEXT: cmp.w r9, #0
2811 ; CHECK-NEXT: it ne
2812 ; CHECK-NEXT: mvnne r5, #127
2813 ; CHECK-NEXT: mov r0, r10
2814 ; CHECK-NEXT: mov r1, r7
2815 ; CHECK-NEXT: mov r2, r10
2816 ; CHECK-NEXT: mov r3, r7
2817 ; CHECK-NEXT: cmp r6, #0
2818 ; CHECK-NEXT: it ne
2819 ; CHECK-NEXT: movne r5, #127
2820 ; CHECK-NEXT: bl __aeabi_dcmpun
2821 ; CHECK-NEXT: cmp r0, #0
2822 ; CHECK-NEXT: it ne
2823 ; CHECK-NEXT: movne r0, #1
2824 ; CHECK-NEXT: cmp r0, #0
2825 ; CHECK-NEXT: it ne
2826 ; CHECK-NEXT: movne r5, #0
2827 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
2828 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
2829 ; CHECK-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
2830 ; CHECK-NEXT: cmp r1, #0
2831 ; CHECK-NEXT: it ne
2832 ; CHECK-NEXT: movne.w r2, #-1
2833 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
2834 ; CHECK-NEXT: cmp r1, #0
2835 ; CHECK-NEXT: it ne
2836 ; CHECK-NEXT: movne r2, #0
2837 ; CHECK-NEXT: cmp.w r8, #0
2838 ; CHECK-NEXT: it ne
2839 ; CHECK-NEXT: movne r2, #0
2840 ; CHECK-NEXT: cmp.w r9, #0
2841 ; CHECK-NEXT: it ne
2842 ; CHECK-NEXT: movne.w r4, #-1
2843 ; CHECK-NEXT: cmp r6, #0
2844 ; CHECK-NEXT: it ne
2845 ; CHECK-NEXT: movne r4, #0
2846 ; CHECK-NEXT: cmp r0, #0
2847 ; CHECK-NEXT: it ne
2848 ; CHECK-NEXT: movne r4, #0
2849 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r2
2850 ; CHECK-NEXT: add sp, #24
2851 ; CHECK-NEXT: vpop {d8, d9}
2852 ; CHECK-NEXT: add sp, #4
2853 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
2854 ; CHECK-NEXT: .p2align 3
2855 ; CHECK-NEXT: @ %bb.1:
2856 ; CHECK-NEXT: .LCPI33_0:
2857 ; CHECK-NEXT: .long 0 @ double -128
2858 ; CHECK-NEXT: .long 3227516928
2859 ; CHECK-NEXT: .LCPI33_1:
2860 ; CHECK-NEXT: .long 0 @ double 127
2861 ; CHECK-NEXT: .long 1080016896
2862 %x = call <2 x i8> @llvm.fptosi.sat.v2f64.v2i8(<2 x double> %f)
2863 ret <2 x i8> %x
2864 }
2866 define arm_aapcs_vfpcc <2 x i13> @test_signed_v2f64_v2i13(<2 x double> %f) {
2867 ; CHECK-LABEL: test_signed_v2f64_v2i13:
2868 ; CHECK: @ %bb.0:
2869 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2870 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
2871 ; CHECK-NEXT: .pad #4
2872 ; CHECK-NEXT: sub sp, #4
2873 ; CHECK-NEXT: .vsave {d8, d9}
2874 ; CHECK-NEXT: vpush {d8, d9}
2875 ; CHECK-NEXT: .pad #24
2876 ; CHECK-NEXT: sub sp, #24
2877 ; CHECK-NEXT: vmov q4, q0
2878 ; CHECK-NEXT: vldr d0, .LCPI34_0
2879 ; CHECK-NEXT: vmov r8, r7, d9
2880 ; CHECK-NEXT: vmov r2, r3, d0
2881 ; CHECK-NEXT: mov r0, r8
2882 ; CHECK-NEXT: mov r1, r7
2883 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
2884 ; CHECK-NEXT: bl __aeabi_dcmpge
2885 ; CHECK-NEXT: clz r0, r0
2886 ; CHECK-NEXT: vldr d0, .LCPI34_1
2887 ; CHECK-NEXT: mov r1, r7
2888 ; CHECK-NEXT: lsrs r4, r0, #5
2889 ; CHECK-NEXT: mov r0, r8
2890 ; CHECK-NEXT: vmov r6, r5, d0
2891 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
2892 ; CHECK-NEXT: bl __aeabi_d2lz
2893 ; CHECK-NEXT: cmp r4, #0
2894 ; CHECK-NEXT: it ne
2895 ; CHECK-NEXT: movne.w r1, #-1
2896 ; CHECK-NEXT: mov r11, r0
2897 ; CHECK-NEXT: mov r4, r1
2898 ; CHECK-NEXT: mov r0, r8
2899 ; CHECK-NEXT: mov r1, r7
2900 ; CHECK-NEXT: mov r2, r6
2901 ; CHECK-NEXT: mov r3, r5
2902 ; CHECK-NEXT: bl __aeabi_dcmpgt
2903 ; CHECK-NEXT: cmp r0, #0
2904 ; CHECK-NEXT: it ne
2905 ; CHECK-NEXT: movne r0, #1
2906 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
2907 ; CHECK-NEXT: cmp r0, #0
2908 ; CHECK-NEXT: mov r0, r8
2909 ; CHECK-NEXT: mov r1, r7
2910 ; CHECK-NEXT: mov r2, r8
2911 ; CHECK-NEXT: mov r3, r7
2912 ; CHECK-NEXT: it ne
2913 ; CHECK-NEXT: movne r4, #0
2914 ; CHECK-NEXT: bl __aeabi_dcmpun
2915 ; CHECK-NEXT: vmov r10, r7, d8
2916 ; CHECK-NEXT: mov r8, r0
2917 ; CHECK-NEXT: cmp r0, #0
2918 ; CHECK-NEXT: mov r2, r6
2919 ; CHECK-NEXT: mov r3, r5
2920 ; CHECK-NEXT: it ne
2921 ; CHECK-NEXT: movne.w r8, #1
2922 ; CHECK-NEXT: cmp.w r8, #0
2923 ; CHECK-NEXT: it ne
2924 ; CHECK-NEXT: movne r4, #0
2925 ; CHECK-NEXT: str r4, [sp, #4] @ 4-byte Spill
2926 ; CHECK-NEXT: mov r0, r10
2927 ; CHECK-NEXT: mov r1, r7
2928 ; CHECK-NEXT: bl __aeabi_dcmpgt
2929 ; CHECK-NEXT: mov r6, r0
2930 ; CHECK-NEXT: cmp r0, #0
2931 ; CHECK-NEXT: it ne
2932 ; CHECK-NEXT: movne r6, #1
2933 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
2934 ; CHECK-NEXT: mov r0, r10
2935 ; CHECK-NEXT: mov r1, r7
2936 ; CHECK-NEXT: bl __aeabi_dcmpge
2937 ; CHECK-NEXT: clz r0, r0
2938 ; CHECK-NEXT: mov r1, r7
2939 ; CHECK-NEXT: lsr.w r9, r0, #5
2940 ; CHECK-NEXT: mov r0, r10
2941 ; CHECK-NEXT: bl __aeabi_d2lz
2942 ; CHECK-NEXT: mov r4, r1
2943 ; CHECK-NEXT: mov r5, r0
2944 ; CHECK-NEXT: cmp.w r9, #0
2945 ; CHECK-NEXT: it ne
2946 ; CHECK-NEXT: movne.w r4, #-1
2947 ; CHECK-NEXT: mov r0, r10
2948 ; CHECK-NEXT: mov r1, r7
2949 ; CHECK-NEXT: mov r2, r10
2950 ; CHECK-NEXT: mov r3, r7
2951 ; CHECK-NEXT: cmp r6, #0
2952 ; CHECK-NEXT: it ne
2953 ; CHECK-NEXT: movne r4, #0
2954 ; CHECK-NEXT: bl __aeabi_dcmpun
2955 ; CHECK-NEXT: cmp r0, #0
2956 ; CHECK-NEXT: it ne
2957 ; CHECK-NEXT: movne r0, #1
2958 ; CHECK-NEXT: cmp r0, #0
2959 ; CHECK-NEXT: it ne
2960 ; CHECK-NEXT: movne r4, #0
2961 ; CHECK-NEXT: cmp.w r9, #0
2962 ; CHECK-NEXT: itt ne
2963 ; CHECK-NEXT: movwne r5, #61440
2964 ; CHECK-NEXT: movtne r5, #65535
2965 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
2966 ; CHECK-NEXT: cmp r1, #0
2967 ; CHECK-NEXT: itt ne
2968 ; CHECK-NEXT: movwne r11, #61440
2969 ; CHECK-NEXT: movtne r11, #65535
2970 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
2971 ; CHECK-NEXT: cmp r1, #0
2972 ; CHECK-NEXT: it ne
2973 ; CHECK-NEXT: movwne r11, #4095
2974 ; CHECK-NEXT: cmp.w r8, #0
2975 ; CHECK-NEXT: it ne
2976 ; CHECK-NEXT: movne.w r11, #0
2977 ; CHECK-NEXT: cmp r6, #0
2978 ; CHECK-NEXT: it ne
2979 ; CHECK-NEXT: movwne r5, #4095
2980 ; CHECK-NEXT: cmp r0, #0
2981 ; CHECK-NEXT: it ne
2982 ; CHECK-NEXT: movne r5, #0
2983 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
2984 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
2985 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r0
2986 ; CHECK-NEXT: add sp, #24
2987 ; CHECK-NEXT: vpop {d8, d9}
2988 ; CHECK-NEXT: add sp, #4
2989 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
2990 ; CHECK-NEXT: .p2align 3
2991 ; CHECK-NEXT: @ %bb.1:
2992 ; CHECK-NEXT: .LCPI34_0:
2993 ; CHECK-NEXT: .long 0 @ double -4096
2994 ; CHECK-NEXT: .long 3232759808
2995 ; CHECK-NEXT: .LCPI34_1:
2996 ; CHECK-NEXT: .long 0 @ double 4095
2997 ; CHECK-NEXT: .long 1085275648
2998 %x = call <2 x i13> @llvm.fptosi.sat.v2f64.v2i13(<2 x double> %f)
2999 ret <2 x i13> %x
3000 }
3002 define arm_aapcs_vfpcc <2 x i16> @test_signed_v2f64_v2i16(<2 x double> %f) {
3003 ; CHECK-LABEL: test_signed_v2f64_v2i16:
3004 ; CHECK: @ %bb.0:
3005 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3006 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3007 ; CHECK-NEXT: .pad #4
3008 ; CHECK-NEXT: sub sp, #4
3009 ; CHECK-NEXT: .vsave {d8, d9}
3010 ; CHECK-NEXT: vpush {d8, d9}
3011 ; CHECK-NEXT: .pad #24
3012 ; CHECK-NEXT: sub sp, #24
3013 ; CHECK-NEXT: vmov q4, q0
3014 ; CHECK-NEXT: vldr d0, .LCPI35_0
3015 ; CHECK-NEXT: vmov r8, r7, d9
3016 ; CHECK-NEXT: vmov r2, r3, d0
3017 ; CHECK-NEXT: mov r0, r8
3018 ; CHECK-NEXT: mov r1, r7
3019 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
3020 ; CHECK-NEXT: bl __aeabi_dcmpge
3021 ; CHECK-NEXT: clz r0, r0
3022 ; CHECK-NEXT: vldr d0, .LCPI35_1
3023 ; CHECK-NEXT: mov r1, r7
3024 ; CHECK-NEXT: lsrs r4, r0, #5
3025 ; CHECK-NEXT: mov r0, r8
3026 ; CHECK-NEXT: vmov r6, r5, d0
3027 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
3028 ; CHECK-NEXT: bl __aeabi_d2lz
3029 ; CHECK-NEXT: cmp r4, #0
3030 ; CHECK-NEXT: it ne
3031 ; CHECK-NEXT: movne.w r1, #-1
3032 ; CHECK-NEXT: mov r11, r0
3033 ; CHECK-NEXT: mov r4, r1
3034 ; CHECK-NEXT: mov r0, r8
3035 ; CHECK-NEXT: mov r1, r7
3036 ; CHECK-NEXT: mov r2, r6
3037 ; CHECK-NEXT: mov r3, r5
3038 ; CHECK-NEXT: bl __aeabi_dcmpgt
3039 ; CHECK-NEXT: cmp r0, #0
3040 ; CHECK-NEXT: it ne
3041 ; CHECK-NEXT: movne r0, #1
3042 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
3043 ; CHECK-NEXT: cmp r0, #0
3044 ; CHECK-NEXT: mov r0, r8
3045 ; CHECK-NEXT: mov r1, r7
3046 ; CHECK-NEXT: mov r2, r8
3047 ; CHECK-NEXT: mov r3, r7
3048 ; CHECK-NEXT: it ne
3049 ; CHECK-NEXT: movne r4, #0
3050 ; CHECK-NEXT: bl __aeabi_dcmpun
3051 ; CHECK-NEXT: vmov r10, r7, d8
3052 ; CHECK-NEXT: mov r8, r0
3053 ; CHECK-NEXT: cmp r0, #0
3054 ; CHECK-NEXT: mov r2, r6
3055 ; CHECK-NEXT: mov r3, r5
3056 ; CHECK-NEXT: it ne
3057 ; CHECK-NEXT: movne.w r8, #1
3058 ; CHECK-NEXT: cmp.w r8, #0
3059 ; CHECK-NEXT: it ne
3060 ; CHECK-NEXT: movne r4, #0
3061 ; CHECK-NEXT: str r4, [sp, #4] @ 4-byte Spill
3062 ; CHECK-NEXT: mov r0, r10
3063 ; CHECK-NEXT: mov r1, r7
3064 ; CHECK-NEXT: bl __aeabi_dcmpgt
3065 ; CHECK-NEXT: mov r6, r0
3066 ; CHECK-NEXT: cmp r0, #0
3067 ; CHECK-NEXT: it ne
3068 ; CHECK-NEXT: movne r6, #1
3069 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
3070 ; CHECK-NEXT: mov r0, r10
3071 ; CHECK-NEXT: mov r1, r7
3072 ; CHECK-NEXT: bl __aeabi_dcmpge
3073 ; CHECK-NEXT: clz r0, r0
3074 ; CHECK-NEXT: mov r1, r7
3075 ; CHECK-NEXT: lsr.w r9, r0, #5
3076 ; CHECK-NEXT: mov r0, r10
3077 ; CHECK-NEXT: bl __aeabi_d2lz
3078 ; CHECK-NEXT: mov r4, r1
3079 ; CHECK-NEXT: mov r5, r0
3080 ; CHECK-NEXT: cmp.w r9, #0
3081 ; CHECK-NEXT: it ne
3082 ; CHECK-NEXT: movne.w r4, #-1
3083 ; CHECK-NEXT: mov r0, r10
3084 ; CHECK-NEXT: mov r1, r7
3085 ; CHECK-NEXT: mov r2, r10
3086 ; CHECK-NEXT: mov r3, r7
3087 ; CHECK-NEXT: cmp r6, #0
3088 ; CHECK-NEXT: it ne
3089 ; CHECK-NEXT: movne r4, #0
3090 ; CHECK-NEXT: bl __aeabi_dcmpun
3091 ; CHECK-NEXT: cmp r0, #0
3092 ; CHECK-NEXT: it ne
3093 ; CHECK-NEXT: movne r0, #1
3094 ; CHECK-NEXT: cmp r0, #0
3095 ; CHECK-NEXT: it ne
3096 ; CHECK-NEXT: movne r4, #0
3097 ; CHECK-NEXT: cmp.w r9, #0
3098 ; CHECK-NEXT: itt ne
3099 ; CHECK-NEXT: movwne r5, #32768
3100 ; CHECK-NEXT: movtne r5, #65535
3101 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
3102 ; CHECK-NEXT: cmp r1, #0
3103 ; CHECK-NEXT: itt ne
3104 ; CHECK-NEXT: movwne r11, #32768
3105 ; CHECK-NEXT: movtne r11, #65535
3106 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
3107 ; CHECK-NEXT: cmp r1, #0
3108 ; CHECK-NEXT: it ne
3109 ; CHECK-NEXT: movwne r11, #32767
3110 ; CHECK-NEXT: cmp.w r8, #0
3111 ; CHECK-NEXT: it ne
3112 ; CHECK-NEXT: movne.w r11, #0
3113 ; CHECK-NEXT: cmp r6, #0
3114 ; CHECK-NEXT: it ne
3115 ; CHECK-NEXT: movwne r5, #32767
3116 ; CHECK-NEXT: cmp r0, #0
3117 ; CHECK-NEXT: it ne
3118 ; CHECK-NEXT: movne r5, #0
3119 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
3120 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
3121 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r0
3122 ; CHECK-NEXT: add sp, #24
3123 ; CHECK-NEXT: vpop {d8, d9}
3124 ; CHECK-NEXT: add sp, #4
3125 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3126 ; CHECK-NEXT: .p2align 3
3127 ; CHECK-NEXT: @ %bb.1:
3128 ; CHECK-NEXT: .LCPI35_0:
3129 ; CHECK-NEXT: .long 0 @ double -32768
3130 ; CHECK-NEXT: .long 3235905536
3131 ; CHECK-NEXT: .LCPI35_1:
3132 ; CHECK-NEXT: .long 0 @ double 32767
3133 ; CHECK-NEXT: .long 1088421824
3134 %x = call <2 x i16> @llvm.fptosi.sat.v2f64.v2i16(<2 x double> %f)
3135 ret <2 x i16> %x
3136 }
3138 define arm_aapcs_vfpcc <2 x i19> @test_signed_v2f64_v2i19(<2 x double> %f) {
3139 ; CHECK-LABEL: test_signed_v2f64_v2i19:
3140 ; CHECK: @ %bb.0:
3141 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3142 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3143 ; CHECK-NEXT: .pad #4
3144 ; CHECK-NEXT: sub sp, #4
3145 ; CHECK-NEXT: .vsave {d8, d9}
3146 ; CHECK-NEXT: vpush {d8, d9}
3147 ; CHECK-NEXT: .pad #16
3148 ; CHECK-NEXT: sub sp, #16
3149 ; CHECK-NEXT: vmov q4, q0
3150 ; CHECK-NEXT: vldr d0, .LCPI36_0
3151 ; CHECK-NEXT: vmov r7, r6, d9
3152 ; CHECK-NEXT: vmov r2, r3, d0
3153 ; CHECK-NEXT: mov r0, r7
3154 ; CHECK-NEXT: mov r1, r6
3155 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
3156 ; CHECK-NEXT: bl __aeabi_dcmpge
3157 ; CHECK-NEXT: mov r4, r0
3158 ; CHECK-NEXT: mov r0, r7
3159 ; CHECK-NEXT: mov r1, r6
3160 ; CHECK-NEXT: bl __aeabi_d2lz
3161 ; CHECK-NEXT: vldr d0, .LCPI36_1
3162 ; CHECK-NEXT: mov r9, r0
3163 ; CHECK-NEXT: vmov r8, r0, d8
3164 ; CHECK-NEXT: vmov r11, r10, d0
3165 ; CHECK-NEXT: str r0, [sp] @ 4-byte Spill
3166 ; CHECK-NEXT: clz r0, r4
3167 ; CHECK-NEXT: lsrs r0, r0, #5
3168 ; CHECK-NEXT: ittt ne
3169 ; CHECK-NEXT: movwne r9, #0
3170 ; CHECK-NEXT: movtne r9, #65532
3171 ; CHECK-NEXT: movne.w r1, #-1
3172 ; CHECK-NEXT: mov r5, r1
3173 ; CHECK-NEXT: mov r0, r7
3174 ; CHECK-NEXT: mov r1, r6
3175 ; CHECK-NEXT: mov r2, r11
3176 ; CHECK-NEXT: mov r3, r10
3177 ; CHECK-NEXT: bl __aeabi_dcmpgt
3178 ; CHECK-NEXT: mov r4, r0
3179 ; CHECK-NEXT: cmp r0, #0
3180 ; CHECK-NEXT: mov r0, r7
3181 ; CHECK-NEXT: mov r1, r6
3182 ; CHECK-NEXT: mov r2, r7
3183 ; CHECK-NEXT: mov r3, r6
3184 ; CHECK-NEXT: it ne
3185 ; CHECK-NEXT: movne r4, #1
3186 ; CHECK-NEXT: cmp r4, #0
3187 ; CHECK-NEXT: it ne
3188 ; CHECK-NEXT: movne r5, #0
3189 ; CHECK-NEXT: bl __aeabi_dcmpun
3190 ; CHECK-NEXT: mov r6, r0
3191 ; CHECK-NEXT: cmp r0, #0
3192 ; CHECK-NEXT: it ne
3193 ; CHECK-NEXT: movne r6, #1
3194 ; CHECK-NEXT: cmp r4, #0
3195 ; CHECK-NEXT: itt ne
3196 ; CHECK-NEXT: movwne r9, #65535
3197 ; CHECK-NEXT: movtne r9, #3
3198 ; CHECK-NEXT: cmp r6, #0
3199 ; CHECK-NEXT: it ne
3200 ; CHECK-NEXT: movne r5, #0
3201 ; CHECK-NEXT: ldr r4, [sp] @ 4-byte Reload
3202 ; CHECK-NEXT: mov r0, r8
3203 ; CHECK-NEXT: mov r2, r11
3204 ; CHECK-NEXT: mov r3, r10
3205 ; CHECK-NEXT: str r5, [sp, #4] @ 4-byte Spill
3206 ; CHECK-NEXT: mov r1, r4
3207 ; CHECK-NEXT: bl __aeabi_dcmpgt
3208 ; CHECK-NEXT: mov r5, r0
3209 ; CHECK-NEXT: cmp r0, #0
3210 ; CHECK-NEXT: it ne
3211 ; CHECK-NEXT: movne r5, #1
3212 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
3213 ; CHECK-NEXT: mov r0, r8
3214 ; CHECK-NEXT: mov r1, r4
3215 ; CHECK-NEXT: bl __aeabi_dcmpge
3216 ; CHECK-NEXT: clz r0, r0
3217 ; CHECK-NEXT: mov r1, r4
3218 ; CHECK-NEXT: mov r11, r4
3219 ; CHECK-NEXT: lsr.w r10, r0, #5
3220 ; CHECK-NEXT: mov r0, r8
3221 ; CHECK-NEXT: bl __aeabi_d2lz
3222 ; CHECK-NEXT: mov r4, r0
3223 ; CHECK-NEXT: cmp.w r10, #0
3224 ; CHECK-NEXT: mov r7, r1
3225 ; CHECK-NEXT: itt ne
3226 ; CHECK-NEXT: movne r4, #0
3227 ; CHECK-NEXT: movtne r4, #65532
3228 ; CHECK-NEXT: cmp r5, #0
3229 ; CHECK-NEXT: itt ne
3230 ; CHECK-NEXT: movwne r4, #65535
3231 ; CHECK-NEXT: movtne r4, #3
3232 ; CHECK-NEXT: cmp.w r10, #0
3233 ; CHECK-NEXT: it ne
3234 ; CHECK-NEXT: movne.w r7, #-1
3235 ; CHECK-NEXT: mov r0, r8
3236 ; CHECK-NEXT: mov r1, r11
3237 ; CHECK-NEXT: mov r2, r8
3238 ; CHECK-NEXT: mov r3, r11
3239 ; CHECK-NEXT: cmp r5, #0
3240 ; CHECK-NEXT: it ne
3241 ; CHECK-NEXT: movne r7, #0
3242 ; CHECK-NEXT: bl __aeabi_dcmpun
3243 ; CHECK-NEXT: cmp r0, #0
3244 ; CHECK-NEXT: it ne
3245 ; CHECK-NEXT: movne r0, #1
3246 ; CHECK-NEXT: cmp r0, #0
3247 ; CHECK-NEXT: it ne
3248 ; CHECK-NEXT: movne r7, #0
3249 ; CHECK-NEXT: cmp r6, #0
3250 ; CHECK-NEXT: it ne
3251 ; CHECK-NEXT: movne.w r9, #0
3252 ; CHECK-NEXT: cmp r0, #0
3253 ; CHECK-NEXT: it ne
3254 ; CHECK-NEXT: movne r4, #0
3255 ; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
3256 ; CHECK-NEXT: vmov q0[2], q0[0], r4, r9
3257 ; CHECK-NEXT: vmov q0[3], q0[1], r7, r0
3258 ; CHECK-NEXT: add sp, #16
3259 ; CHECK-NEXT: vpop {d8, d9}
3260 ; CHECK-NEXT: add sp, #4
3261 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3262 ; CHECK-NEXT: .p2align 3
3263 ; CHECK-NEXT: @ %bb.1:
3264 ; CHECK-NEXT: .LCPI36_0:
3265 ; CHECK-NEXT: .long 0 @ double -262144
3266 ; CHECK-NEXT: .long 3239051264
3267 ; CHECK-NEXT: .LCPI36_1:
3268 ; CHECK-NEXT: .long 0 @ double 262143
3269 ; CHECK-NEXT: .long 1091567608
3270 %x = call <2 x i19> @llvm.fptosi.sat.v2f64.v2i19(<2 x double> %f)
3271 ret <2 x i19> %x
3272 }
3274 define arm_aapcs_vfpcc <2 x i32> @test_signed_v2f64_v2i32_duplicate(<2 x double> %f) {
3275 ; CHECK-LABEL: test_signed_v2f64_v2i32_duplicate:
3276 ; CHECK: @ %bb.0:
3277 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3278 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3279 ; CHECK-NEXT: .pad #4
3280 ; CHECK-NEXT: sub sp, #4
3281 ; CHECK-NEXT: .vsave {d8, d9}
3282 ; CHECK-NEXT: vpush {d8, d9}
3283 ; CHECK-NEXT: .pad #24
3284 ; CHECK-NEXT: sub sp, #24
3285 ; CHECK-NEXT: vmov q4, q0
3286 ; CHECK-NEXT: vldr d0, .LCPI37_0
3287 ; CHECK-NEXT: vmov r8, r7, d9
3288 ; CHECK-NEXT: vmov r2, r3, d0
3289 ; CHECK-NEXT: mov r0, r8
3290 ; CHECK-NEXT: mov r1, r7
3291 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
3292 ; CHECK-NEXT: bl __aeabi_dcmpge
3293 ; CHECK-NEXT: clz r0, r0
3294 ; CHECK-NEXT: vldr d0, .LCPI37_1
3295 ; CHECK-NEXT: mov r1, r7
3296 ; CHECK-NEXT: lsrs r4, r0, #5
3297 ; CHECK-NEXT: mov r0, r8
3298 ; CHECK-NEXT: vmov r6, r5, d0
3299 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
3300 ; CHECK-NEXT: bl __aeabi_d2lz
3301 ; CHECK-NEXT: mov r11, r0
3302 ; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill
3303 ; CHECK-NEXT: mov r0, r8
3304 ; CHECK-NEXT: mov r1, r7
3305 ; CHECK-NEXT: mov r2, r6
3306 ; CHECK-NEXT: mov r3, r5
3307 ; CHECK-NEXT: cmp r4, #0
3308 ; CHECK-NEXT: it ne
3309 ; CHECK-NEXT: movne.w r11, #-2147483648
3310 ; CHECK-NEXT: bl __aeabi_dcmpgt
3311 ; CHECK-NEXT: cmp r0, #0
3312 ; CHECK-NEXT: it ne
3313 ; CHECK-NEXT: movne r0, #1
3314 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
3315 ; CHECK-NEXT: cmp r0, #0
3316 ; CHECK-NEXT: mov r0, r8
3317 ; CHECK-NEXT: mov r1, r7
3318 ; CHECK-NEXT: mov r2, r8
3319 ; CHECK-NEXT: mov r3, r7
3320 ; CHECK-NEXT: it ne
3321 ; CHECK-NEXT: mvnne r11, #-2147483648
3322 ; CHECK-NEXT: bl __aeabi_dcmpun
3323 ; CHECK-NEXT: vmov r10, r7, d8
3324 ; CHECK-NEXT: mov r8, r0
3325 ; CHECK-NEXT: cmp r0, #0
3326 ; CHECK-NEXT: mov r2, r6
3327 ; CHECK-NEXT: mov r3, r5
3328 ; CHECK-NEXT: it ne
3329 ; CHECK-NEXT: movne.w r8, #1
3330 ; CHECK-NEXT: cmp.w r8, #0
3331 ; CHECK-NEXT: it ne
3332 ; CHECK-NEXT: movne.w r11, #0
3333 ; CHECK-NEXT: mov r0, r10
3334 ; CHECK-NEXT: mov r1, r7
3335 ; CHECK-NEXT: bl __aeabi_dcmpgt
3336 ; CHECK-NEXT: mov r6, r0
3337 ; CHECK-NEXT: cmp r0, #0
3338 ; CHECK-NEXT: it ne
3339 ; CHECK-NEXT: movne r6, #1
3340 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
3341 ; CHECK-NEXT: mov r0, r10
3342 ; CHECK-NEXT: mov r1, r7
3343 ; CHECK-NEXT: bl __aeabi_dcmpge
3344 ; CHECK-NEXT: clz r0, r0
3345 ; CHECK-NEXT: mov r1, r7
3346 ; CHECK-NEXT: lsr.w r9, r0, #5
3347 ; CHECK-NEXT: mov r0, r10
3348 ; CHECK-NEXT: bl __aeabi_d2lz
3349 ; CHECK-NEXT: mov r5, r0
3350 ; CHECK-NEXT: mov r4, r1
3351 ; CHECK-NEXT: cmp.w r9, #0
3352 ; CHECK-NEXT: it ne
3353 ; CHECK-NEXT: movne.w r5, #-2147483648
3354 ; CHECK-NEXT: mov r0, r10
3355 ; CHECK-NEXT: mov r1, r7
3356 ; CHECK-NEXT: mov r2, r10
3357 ; CHECK-NEXT: mov r3, r7
3358 ; CHECK-NEXT: cmp r6, #0
3359 ; CHECK-NEXT: it ne
3360 ; CHECK-NEXT: mvnne r5, #-2147483648
3361 ; CHECK-NEXT: bl __aeabi_dcmpun
3362 ; CHECK-NEXT: cmp r0, #0
3363 ; CHECK-NEXT: it ne
3364 ; CHECK-NEXT: movne r0, #1
3365 ; CHECK-NEXT: cmp r0, #0
3366 ; CHECK-NEXT: it ne
3367 ; CHECK-NEXT: movne r5, #0
3368 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
3369 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
3370 ; CHECK-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3371 ; CHECK-NEXT: cmp r1, #0
3372 ; CHECK-NEXT: it ne
3373 ; CHECK-NEXT: movne.w r2, #-1
3374 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
3375 ; CHECK-NEXT: cmp r1, #0
3376 ; CHECK-NEXT: it ne
3377 ; CHECK-NEXT: movne r2, #0
3378 ; CHECK-NEXT: cmp.w r8, #0
3379 ; CHECK-NEXT: it ne
3380 ; CHECK-NEXT: movne r2, #0
3381 ; CHECK-NEXT: cmp.w r9, #0
3382 ; CHECK-NEXT: it ne
3383 ; CHECK-NEXT: movne.w r4, #-1
3384 ; CHECK-NEXT: cmp r6, #0
3385 ; CHECK-NEXT: it ne
3386 ; CHECK-NEXT: movne r4, #0
3387 ; CHECK-NEXT: cmp r0, #0
3388 ; CHECK-NEXT: it ne
3389 ; CHECK-NEXT: movne r4, #0
3390 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r2
3391 ; CHECK-NEXT: add sp, #24
3392 ; CHECK-NEXT: vpop {d8, d9}
3393 ; CHECK-NEXT: add sp, #4
3394 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3395 ; CHECK-NEXT: .p2align 3
3396 ; CHECK-NEXT: @ %bb.1:
3397 ; CHECK-NEXT: .LCPI37_0:
3398 ; CHECK-NEXT: .long 0 @ double -2147483648
3399 ; CHECK-NEXT: .long 3252682752
3400 ; CHECK-NEXT: .LCPI37_1:
3401 ; CHECK-NEXT: .long 4290772992 @ double 2147483647
3402 ; CHECK-NEXT: .long 1105199103
3403 %x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
3404 ret <2 x i32> %x
3405 }
3407 define arm_aapcs_vfpcc <2 x i50> @test_signed_v2f64_v2i50(<2 x double> %f) {
3408 ; CHECK-LABEL: test_signed_v2f64_v2i50:
3409 ; CHECK: @ %bb.0:
3410 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3411 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3412 ; CHECK-NEXT: .pad #4
3413 ; CHECK-NEXT: sub sp, #4
3414 ; CHECK-NEXT: .vsave {d8, d9}
3415 ; CHECK-NEXT: vpush {d8, d9}
3416 ; CHECK-NEXT: .pad #16
3417 ; CHECK-NEXT: sub sp, #16
3418 ; CHECK-NEXT: vmov q4, q0
3419 ; CHECK-NEXT: vldr d0, .LCPI38_0
3420 ; CHECK-NEXT: vmov r7, r6, d9
3421 ; CHECK-NEXT: vmov r2, r3, d0
3422 ; CHECK-NEXT: mov r0, r7
3423 ; CHECK-NEXT: mov r1, r6
3424 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
3425 ; CHECK-NEXT: bl __aeabi_dcmpge
3426 ; CHECK-NEXT: mov r4, r0
3427 ; CHECK-NEXT: mov r0, r7
3428 ; CHECK-NEXT: mov r1, r6
3429 ; CHECK-NEXT: bl __aeabi_d2lz
3430 ; CHECK-NEXT: vldr d0, .LCPI38_1
3431 ; CHECK-NEXT: mov r9, r0
3432 ; CHECK-NEXT: vmov r8, r0, d8
3433 ; CHECK-NEXT: vmov r11, r10, d0
3434 ; CHECK-NEXT: str r0, [sp] @ 4-byte Spill
3435 ; CHECK-NEXT: clz r0, r4
3436 ; CHECK-NEXT: lsrs r0, r0, #5
3437 ; CHECK-NEXT: itt ne
3438 ; CHECK-NEXT: movne r1, #0
3439 ; CHECK-NEXT: movtne r1, #65534
3440 ; CHECK-NEXT: mov r5, r1
3441 ; CHECK-NEXT: mov r0, r7
3442 ; CHECK-NEXT: mov r1, r6
3443 ; CHECK-NEXT: mov r2, r11
3444 ; CHECK-NEXT: mov r3, r10
3445 ; CHECK-NEXT: it ne
3446 ; CHECK-NEXT: movne.w r9, #0
3447 ; CHECK-NEXT: bl __aeabi_dcmpgt
3448 ; CHECK-NEXT: mov r4, r0
3449 ; CHECK-NEXT: cmp r0, #0
3450 ; CHECK-NEXT: mov r0, r7
3451 ; CHECK-NEXT: mov r1, r6
3452 ; CHECK-NEXT: mov r2, r7
3453 ; CHECK-NEXT: mov r3, r6
3454 ; CHECK-NEXT: it ne
3455 ; CHECK-NEXT: movne r4, #1
3456 ; CHECK-NEXT: cmp r4, #0
3457 ; CHECK-NEXT: it ne
3458 ; CHECK-NEXT: movne.w r9, #-1
3459 ; CHECK-NEXT: bl __aeabi_dcmpun
3460 ; CHECK-NEXT: mov r6, r0
3461 ; CHECK-NEXT: cmp r0, #0
3462 ; CHECK-NEXT: it ne
3463 ; CHECK-NEXT: movne r6, #1
3464 ; CHECK-NEXT: cmp r4, #0
3465 ; CHECK-NEXT: itt ne
3466 ; CHECK-NEXT: movwne r5, #65535
3467 ; CHECK-NEXT: movtne r5, #1
3468 ; CHECK-NEXT: str r5, [sp, #4] @ 4-byte Spill
3469 ; CHECK-NEXT: cmp r6, #0
3470 ; CHECK-NEXT: it ne
3471 ; CHECK-NEXT: movne.w r9, #0
3472 ; CHECK-NEXT: ldr r4, [sp] @ 4-byte Reload
3473 ; CHECK-NEXT: mov r0, r8
3474 ; CHECK-NEXT: mov r2, r11
3475 ; CHECK-NEXT: mov r3, r10
3476 ; CHECK-NEXT: mov r1, r4
3477 ; CHECK-NEXT: bl __aeabi_dcmpgt
3478 ; CHECK-NEXT: mov r5, r0
3479 ; CHECK-NEXT: cmp r0, #0
3480 ; CHECK-NEXT: it ne
3481 ; CHECK-NEXT: movne r5, #1
3482 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
3483 ; CHECK-NEXT: mov r0, r8
3484 ; CHECK-NEXT: mov r1, r4
3485 ; CHECK-NEXT: bl __aeabi_dcmpge
3486 ; CHECK-NEXT: clz r0, r0
3487 ; CHECK-NEXT: mov r1, r4
3488 ; CHECK-NEXT: mov r11, r4
3489 ; CHECK-NEXT: lsr.w r10, r0, #5
3490 ; CHECK-NEXT: mov r0, r8
3491 ; CHECK-NEXT: bl __aeabi_d2lz
3492 ; CHECK-NEXT: mov r7, r1
3493 ; CHECK-NEXT: cmp.w r10, #0
3494 ; CHECK-NEXT: mov r4, r0
3495 ; CHECK-NEXT: itt ne
3496 ; CHECK-NEXT: movne r7, #0
3497 ; CHECK-NEXT: movtne r7, #65534
3498 ; CHECK-NEXT: cmp r5, #0
3499 ; CHECK-NEXT: itt ne
3500 ; CHECK-NEXT: movwne r7, #65535
3501 ; CHECK-NEXT: movtne r7, #1
3502 ; CHECK-NEXT: cmp.w r10, #0
3503 ; CHECK-NEXT: it ne
3504 ; CHECK-NEXT: movne r4, #0
3505 ; CHECK-NEXT: mov r0, r8
3506 ; CHECK-NEXT: mov r1, r11
3507 ; CHECK-NEXT: mov r2, r8
3508 ; CHECK-NEXT: mov r3, r11
3509 ; CHECK-NEXT: cmp r5, #0
3510 ; CHECK-NEXT: it ne
3511 ; CHECK-NEXT: movne.w r4, #-1
3512 ; CHECK-NEXT: bl __aeabi_dcmpun
3513 ; CHECK-NEXT: cmp r0, #0
3514 ; CHECK-NEXT: it ne
3515 ; CHECK-NEXT: movne r0, #1
3516 ; CHECK-NEXT: cmp r0, #0
3517 ; CHECK-NEXT: it ne
3518 ; CHECK-NEXT: movne r4, #0
3519 ; CHECK-NEXT: cmp r6, #0
3520 ; CHECK-NEXT: ldr r1, [sp, #4] @ 4-byte Reload
3521 ; CHECK-NEXT: vmov q0[2], q0[0], r4, r9
3522 ; CHECK-NEXT: it ne
3523 ; CHECK-NEXT: movne r1, #0
3524 ; CHECK-NEXT: cmp r0, #0
3525 ; CHECK-NEXT: it ne
3526 ; CHECK-NEXT: movne r7, #0
3527 ; CHECK-NEXT: vmov q0[3], q0[1], r7, r1
3528 ; CHECK-NEXT: add sp, #16
3529 ; CHECK-NEXT: vpop {d8, d9}
3530 ; CHECK-NEXT: add sp, #4
3531 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3532 ; CHECK-NEXT: .p2align 3
3533 ; CHECK-NEXT: @ %bb.1:
3534 ; CHECK-NEXT: .LCPI38_0:
3535 ; CHECK-NEXT: .long 0 @ double -562949953421312
3536 ; CHECK-NEXT: .long 3271557120
3537 ; CHECK-NEXT: .LCPI38_1:
3538 ; CHECK-NEXT: .long 4294967280 @ double 562949953421311
3539 ; CHECK-NEXT: .long 1124073471
3540 %x = call <2 x i50> @llvm.fptosi.sat.v2f64.v2i50(<2 x double> %f)
3541 ret <2 x i50> %x
3542 }
3544 define arm_aapcs_vfpcc <2 x i64> @test_signed_v2f64_v2i64(<2 x double> %f) {
3545 ; CHECK-LABEL: test_signed_v2f64_v2i64:
3546 ; CHECK: @ %bb.0:
3547 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3548 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3549 ; CHECK-NEXT: .pad #4
3550 ; CHECK-NEXT: sub sp, #4
3551 ; CHECK-NEXT: .vsave {d8, d9}
3552 ; CHECK-NEXT: vpush {d8, d9}
3553 ; CHECK-NEXT: .pad #24
3554 ; CHECK-NEXT: sub sp, #24
3555 ; CHECK-NEXT: vmov q4, q0
3556 ; CHECK-NEXT: vldr d0, .LCPI39_0
3557 ; CHECK-NEXT: vmov r8, r7, d9
3558 ; CHECK-NEXT: vmov r2, r3, d0
3559 ; CHECK-NEXT: mov r0, r8
3560 ; CHECK-NEXT: mov r1, r7
3561 ; CHECK-NEXT: strd r2, r3, [sp, #8] @ 8-byte Folded Spill
3562 ; CHECK-NEXT: bl __aeabi_dcmpge
3563 ; CHECK-NEXT: clz r0, r0
3564 ; CHECK-NEXT: vldr d0, .LCPI39_1
3565 ; CHECK-NEXT: mov r1, r7
3566 ; CHECK-NEXT: lsrs r4, r0, #5
3567 ; CHECK-NEXT: mov r0, r8
3568 ; CHECK-NEXT: vmov r6, r5, d0
3569 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
3570 ; CHECK-NEXT: bl __aeabi_d2lz
3571 ; CHECK-NEXT: mov r11, r0
3572 ; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill
3573 ; CHECK-NEXT: mov r0, r8
3574 ; CHECK-NEXT: mov r1, r7
3575 ; CHECK-NEXT: mov r2, r6
3576 ; CHECK-NEXT: mov r3, r5
3577 ; CHECK-NEXT: cmp r4, #0
3578 ; CHECK-NEXT: it ne
3579 ; CHECK-NEXT: movne.w r11, #0
3580 ; CHECK-NEXT: bl __aeabi_dcmpgt
3581 ; CHECK-NEXT: cmp r0, #0
3582 ; CHECK-NEXT: it ne
3583 ; CHECK-NEXT: movne r0, #1
3584 ; CHECK-NEXT: str r0, [sp, #16] @ 4-byte Spill
3585 ; CHECK-NEXT: cmp r0, #0
3586 ; CHECK-NEXT: mov r0, r8
3587 ; CHECK-NEXT: mov r1, r7
3588 ; CHECK-NEXT: mov r2, r8
3589 ; CHECK-NEXT: mov r3, r7
3590 ; CHECK-NEXT: it ne
3591 ; CHECK-NEXT: movne.w r11, #-1
3592 ; CHECK-NEXT: bl __aeabi_dcmpun
3593 ; CHECK-NEXT: vmov r10, r7, d8
3594 ; CHECK-NEXT: mov r8, r0
3595 ; CHECK-NEXT: cmp r0, #0
3596 ; CHECK-NEXT: mov r2, r6
3597 ; CHECK-NEXT: mov r3, r5
3598 ; CHECK-NEXT: it ne
3599 ; CHECK-NEXT: movne.w r8, #1
3600 ; CHECK-NEXT: cmp.w r8, #0
3601 ; CHECK-NEXT: it ne
3602 ; CHECK-NEXT: movne.w r11, #0
3603 ; CHECK-NEXT: mov r0, r10
3604 ; CHECK-NEXT: mov r1, r7
3605 ; CHECK-NEXT: bl __aeabi_dcmpgt
3606 ; CHECK-NEXT: mov r6, r0
3607 ; CHECK-NEXT: cmp r0, #0
3608 ; CHECK-NEXT: it ne
3609 ; CHECK-NEXT: movne r6, #1
3610 ; CHECK-NEXT: ldrd r2, r3, [sp, #8] @ 8-byte Folded Reload
3611 ; CHECK-NEXT: mov r0, r10
3612 ; CHECK-NEXT: mov r1, r7
3613 ; CHECK-NEXT: bl __aeabi_dcmpge
3614 ; CHECK-NEXT: clz r0, r0
3615 ; CHECK-NEXT: mov r1, r7
3616 ; CHECK-NEXT: lsr.w r9, r0, #5
3617 ; CHECK-NEXT: mov r0, r10
3618 ; CHECK-NEXT: bl __aeabi_d2lz
3619 ; CHECK-NEXT: mov r5, r0
3620 ; CHECK-NEXT: mov r4, r1
3621 ; CHECK-NEXT: cmp.w r9, #0
3622 ; CHECK-NEXT: it ne
3623 ; CHECK-NEXT: movne r5, #0
3624 ; CHECK-NEXT: mov r0, r10
3625 ; CHECK-NEXT: mov r1, r7
3626 ; CHECK-NEXT: mov r2, r10
3627 ; CHECK-NEXT: mov r3, r7
3628 ; CHECK-NEXT: cmp r6, #0
3629 ; CHECK-NEXT: it ne
3630 ; CHECK-NEXT: movne.w r5, #-1
3631 ; CHECK-NEXT: bl __aeabi_dcmpun
3632 ; CHECK-NEXT: cmp r0, #0
3633 ; CHECK-NEXT: it ne
3634 ; CHECK-NEXT: movne r0, #1
3635 ; CHECK-NEXT: cmp r0, #0
3636 ; CHECK-NEXT: it ne
3637 ; CHECK-NEXT: movne r5, #0
3638 ; CHECK-NEXT: ldr r1, [sp, #20] @ 4-byte Reload
3639 ; CHECK-NEXT: vmov q0[2], q0[0], r5, r11
3640 ; CHECK-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3641 ; CHECK-NEXT: cmp r1, #0
3642 ; CHECK-NEXT: it ne
3643 ; CHECK-NEXT: movne.w r2, #-2147483648
3644 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
3645 ; CHECK-NEXT: cmp r1, #0
3646 ; CHECK-NEXT: it ne
3647 ; CHECK-NEXT: mvnne r2, #-2147483648
3648 ; CHECK-NEXT: cmp.w r8, #0
3649 ; CHECK-NEXT: it ne
3650 ; CHECK-NEXT: movne r2, #0
3651 ; CHECK-NEXT: cmp.w r9, #0
3652 ; CHECK-NEXT: it ne
3653 ; CHECK-NEXT: movne.w r4, #-2147483648
3654 ; CHECK-NEXT: cmp r6, #0
3655 ; CHECK-NEXT: it ne
3656 ; CHECK-NEXT: mvnne r4, #-2147483648
3657 ; CHECK-NEXT: cmp r0, #0
3658 ; CHECK-NEXT: it ne
3659 ; CHECK-NEXT: movne r4, #0
3660 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r2
3661 ; CHECK-NEXT: add sp, #24
3662 ; CHECK-NEXT: vpop {d8, d9}
3663 ; CHECK-NEXT: add sp, #4
3664 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3665 ; CHECK-NEXT: .p2align 3
3666 ; CHECK-NEXT: @ %bb.1:
3667 ; CHECK-NEXT: .LCPI39_0:
3668 ; CHECK-NEXT: .long 0 @ double -9.2233720368547758E+18
3669 ; CHECK-NEXT: .long 3286237184
3670 ; CHECK-NEXT: .LCPI39_1:
3671 ; CHECK-NEXT: .long 4294967295 @ double 9.2233720368547748E+18
3672 ; CHECK-NEXT: .long 1138753535
3673 %x = call <2 x i64> @llvm.fptosi.sat.v2f64.v2i64(<2 x double> %f)
3674 ret <2 x i64> %x
3675 }
3677 define arm_aapcs_vfpcc <2 x i100> @test_signed_v2f64_v2i100(<2 x double> %f) {
3678 ; CHECK-LABEL: test_signed_v2f64_v2i100:
3679 ; CHECK: @ %bb.0:
3680 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3681 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3682 ; CHECK-NEXT: .pad #4
3683 ; CHECK-NEXT: sub sp, #4
3684 ; CHECK-NEXT: .vsave {d8, d9}
3685 ; CHECK-NEXT: vpush {d8, d9}
3686 ; CHECK-NEXT: .pad #48
3687 ; CHECK-NEXT: sub sp, #48
3688 ; CHECK-NEXT: vmov q4, q0
3689 ; CHECK-NEXT: vldr d0, .LCPI40_0
3690 ; CHECK-NEXT: vmov r5, r7, d8
3691 ; CHECK-NEXT: mov r10, r0
3692 ; CHECK-NEXT: vmov r9, r3, d0
3693 ; CHECK-NEXT: str r0, [sp, #40] @ 4-byte Spill
3694 ; CHECK-NEXT: str r3, [sp, #32] @ 4-byte Spill
3695 ; CHECK-NEXT: mov r0, r5
3696 ; CHECK-NEXT: mov r1, r7
3697 ; CHECK-NEXT: mov r2, r9
3698 ; CHECK-NEXT: bl __aeabi_dcmpgt
3699 ; CHECK-NEXT: vldr d0, .LCPI40_1
3700 ; CHECK-NEXT: mov r6, r0
3701 ; CHECK-NEXT: mov r0, r5
3702 ; CHECK-NEXT: mov r1, r7
3703 ; CHECK-NEXT: vmov r8, r3, d0
3704 ; CHECK-NEXT: mov r2, r8
3705 ; CHECK-NEXT: mov r11, r3
3706 ; CHECK-NEXT: bl __aeabi_dcmpge
3707 ; CHECK-NEXT: mov r4, r0
3708 ; CHECK-NEXT: mov r0, r5
3709 ; CHECK-NEXT: mov r1, r7
3710 ; CHECK-NEXT: bl __fixdfti
3711 ; CHECK-NEXT: cmp r4, #0
3712 ; CHECK-NEXT: str r0, [sp, #36] @ 4-byte Spill
3713 ; CHECK-NEXT: csel r4, r2, r4, ne
3714 ; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill
3715 ; CHECK-NEXT: str r3, [sp, #24] @ 4-byte Spill
3716 ; CHECK-NEXT: mov r0, r5
3717 ; CHECK-NEXT: mov r1, r7
3718 ; CHECK-NEXT: mov r2, r5
3719 ; CHECK-NEXT: mov r3, r7
3720 ; CHECK-NEXT: cmp r6, #0
3721 ; CHECK-NEXT: it ne
3722 ; CHECK-NEXT: movne.w r4, #-1
3723 ; CHECK-NEXT: bl __aeabi_dcmpun
3724 ; CHECK-NEXT: cmp r0, #0
3725 ; CHECK-NEXT: it ne
3726 ; CHECK-NEXT: movne r4, #0
3727 ; CHECK-NEXT: str.w r4, [r10, #8]
3728 ; CHECK-NEXT: mov r0, r5
3729 ; CHECK-NEXT: ldr r4, [sp, #32] @ 4-byte Reload
3730 ; CHECK-NEXT: mov r1, r7
3731 ; CHECK-NEXT: mov r2, r9
3732 ; CHECK-NEXT: str.w r9, [sp, #44] @ 4-byte Spill
3733 ; CHECK-NEXT: mov r3, r4
3734 ; CHECK-NEXT: bl __aeabi_dcmpgt
3735 ; CHECK-NEXT: mov r10, r0
3736 ; CHECK-NEXT: mov r0, r5
3737 ; CHECK-NEXT: mov r1, r7
3738 ; CHECK-NEXT: mov r2, r8
3739 ; CHECK-NEXT: mov r3, r11
3740 ; CHECK-NEXT: bl __aeabi_dcmpge
3741 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
3742 ; CHECK-NEXT: cmp r0, #0
3743 ; CHECK-NEXT: mov r2, r5
3744 ; CHECK-NEXT: mov r3, r7
3745 ; CHECK-NEXT: csel r6, r1, r0, ne
3746 ; CHECK-NEXT: mov r0, r5
3747 ; CHECK-NEXT: mov r1, r7
3748 ; CHECK-NEXT: cmp.w r10, #0
3749 ; CHECK-NEXT: it ne
3750 ; CHECK-NEXT: movne.w r6, #-1
3751 ; CHECK-NEXT: bl __aeabi_dcmpun
3752 ; CHECK-NEXT: cmp r0, #0
3753 ; CHECK-NEXT: it ne
3754 ; CHECK-NEXT: movne r6, #0
3755 ; CHECK-NEXT: ldr r0, [sp, #40] @ 4-byte Reload
3756 ; CHECK-NEXT: mov r1, r7
3757 ; CHECK-NEXT: mov r2, r9
3758 ; CHECK-NEXT: mov r3, r4
3759 ; CHECK-NEXT: str r6, [r0, #4]
3760 ; CHECK-NEXT: mov r0, r5
3761 ; CHECK-NEXT: bl __aeabi_dcmpgt
3762 ; CHECK-NEXT: mov r4, r0
3763 ; CHECK-NEXT: mov r0, r5
3764 ; CHECK-NEXT: mov r1, r7
3765 ; CHECK-NEXT: mov r2, r8
3766 ; CHECK-NEXT: mov r3, r11
3767 ; CHECK-NEXT: mov r10, r8
3768 ; CHECK-NEXT: bl __aeabi_dcmpge
3769 ; CHECK-NEXT: ldr r1, [sp, #36] @ 4-byte Reload
3770 ; CHECK-NEXT: cmp r0, #0
3771 ; CHECK-NEXT: mov r2, r5
3772 ; CHECK-NEXT: mov r3, r7
3773 ; CHECK-NEXT: csel r6, r1, r0, ne
3774 ; CHECK-NEXT: mov r0, r5
3775 ; CHECK-NEXT: mov r1, r7
3776 ; CHECK-NEXT: cmp r4, #0
3777 ; CHECK-NEXT: it ne
3778 ; CHECK-NEXT: movne.w r6, #-1
3779 ; CHECK-NEXT: str r5, [sp, #12] @ 4-byte Spill
3780 ; CHECK-NEXT: str r7, [sp, #20] @ 4-byte Spill
3781 ; CHECK-NEXT: bl __aeabi_dcmpun
3782 ; CHECK-NEXT: vmov r9, r8, d9
3783 ; CHECK-NEXT: cmp r0, #0
3784 ; CHECK-NEXT: it ne
3785 ; CHECK-NEXT: movne r6, #0
3786 ; CHECK-NEXT: ldr r0, [sp, #40] @ 4-byte Reload
3787 ; CHECK-NEXT: str r6, [r0]
3788 ; CHECK-NEXT: ldr r6, [sp, #32] @ 4-byte Reload
3789 ; CHECK-NEXT: ldr r2, [sp, #44] @ 4-byte Reload
3790 ; CHECK-NEXT: mov r3, r6
3791 ; CHECK-NEXT: mov r0, r9
3792 ; CHECK-NEXT: mov r1, r8
3793 ; CHECK-NEXT: bl __aeabi_dcmpgt
3794 ; CHECK-NEXT: mov r7, r0
3795 ; CHECK-NEXT: mov r0, r9
3796 ; CHECK-NEXT: mov r1, r8
3797 ; CHECK-NEXT: mov r2, r10
3798 ; CHECK-NEXT: mov r3, r11
3799 ; CHECK-NEXT: mov r4, r10
3800 ; CHECK-NEXT: str.w r10, [sp, #28] @ 4-byte Spill
3801 ; CHECK-NEXT: mov r5, r11
3802 ; CHECK-NEXT: str.w r11, [sp, #4] @ 4-byte Spill
3803 ; CHECK-NEXT: bl __aeabi_dcmpge
3804 ; CHECK-NEXT: mov r11, r0
3805 ; CHECK-NEXT: mov r0, r9
3806 ; CHECK-NEXT: mov r1, r8
3807 ; CHECK-NEXT: bl __fixdfti
3808 ; CHECK-NEXT: mov r10, r3
3809 ; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
3810 ; CHECK-NEXT: str r1, [sp, #36] @ 4-byte Spill
3811 ; CHECK-NEXT: cmp.w r11, #0
3812 ; CHECK-NEXT: str r2, [sp, #16] @ 4-byte Spill
3813 ; CHECK-NEXT: it eq
3814 ; CHECK-NEXT: mvneq r10, #7
3815 ; CHECK-NEXT: mov r0, r9
3816 ; CHECK-NEXT: mov r1, r8
3817 ; CHECK-NEXT: mov r2, r9
3818 ; CHECK-NEXT: mov r3, r8
3819 ; CHECK-NEXT: cmp r7, #0
3820 ; CHECK-NEXT: it ne
3821 ; CHECK-NEXT: movne.w r10, #7
3822 ; CHECK-NEXT: bl __aeabi_dcmpun
3823 ; CHECK-NEXT: cmp r0, #0
3824 ; CHECK-NEXT: it ne
3825 ; CHECK-NEXT: movne.w r10, #0
3826 ; CHECK-NEXT: ldr r7, [sp, #44] @ 4-byte Reload
3827 ; CHECK-NEXT: mov r0, r9
3828 ; CHECK-NEXT: mov r1, r8
3829 ; CHECK-NEXT: mov r3, r6
3830 ; CHECK-NEXT: mov r2, r7
3831 ; CHECK-NEXT: bl __aeabi_dcmpgt
3832 ; CHECK-NEXT: mov r11, r0
3833 ; CHECK-NEXT: mov r0, r9
3834 ; CHECK-NEXT: mov r1, r8
3835 ; CHECK-NEXT: mov r2, r4
3836 ; CHECK-NEXT: mov r3, r5
3837 ; CHECK-NEXT: bl __aeabi_dcmpge
3838 ; CHECK-NEXT: ldr r1, [sp, #36] @ 4-byte Reload
3839 ; CHECK-NEXT: cmp r0, #0
3840 ; CHECK-NEXT: mov r2, r9
3841 ; CHECK-NEXT: mov r3, r8
3842 ; CHECK-NEXT: csel r4, r1, r0, ne
3843 ; CHECK-NEXT: mov r0, r9
3844 ; CHECK-NEXT: mov r1, r8
3845 ; CHECK-NEXT: cmp.w r11, #0
3846 ; CHECK-NEXT: it ne
3847 ; CHECK-NEXT: movne.w r4, #-1
3848 ; CHECK-NEXT: bl __aeabi_dcmpun
3849 ; CHECK-NEXT: cmp r0, #0
3850 ; CHECK-NEXT: it ne
3851 ; CHECK-NEXT: movne r4, #0
3852 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r10
3853 ; CHECK-NEXT: mov r1, r8
3854 ; CHECK-NEXT: vmov r0, s1
3855 ; CHECK-NEXT: mov r2, r7
3856 ; CHECK-NEXT: mov r3, r6
3857 ; CHECK-NEXT: mov r5, r6
3858 ; CHECK-NEXT: str r0, [sp, #36] @ 4-byte Spill
3859 ; CHECK-NEXT: mov r0, r9
3860 ; CHECK-NEXT: bl __aeabi_dcmpgt
3861 ; CHECK-NEXT: ldr r7, [sp, #28] @ 4-byte Reload
3862 ; CHECK-NEXT: mov r4, r0
3863 ; CHECK-NEXT: ldr r6, [sp, #4] @ 4-byte Reload
3864 ; CHECK-NEXT: mov r0, r9
3865 ; CHECK-NEXT: mov r1, r8
3866 ; CHECK-NEXT: mov r2, r7
3867 ; CHECK-NEXT: mov r3, r6
3868 ; CHECK-NEXT: bl __aeabi_dcmpge
3869 ; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
3870 ; CHECK-NEXT: cmp r0, #0
3871 ; CHECK-NEXT: mov r2, r9
3872 ; CHECK-NEXT: mov r3, r8
3873 ; CHECK-NEXT: csel r11, r1, r0, ne
3874 ; CHECK-NEXT: mov r0, r9
3875 ; CHECK-NEXT: mov r1, r8
3876 ; CHECK-NEXT: cmp r4, #0
3877 ; CHECK-NEXT: it ne
3878 ; CHECK-NEXT: movne.w r11, #-1
3879 ; CHECK-NEXT: bl __aeabi_dcmpun
3880 ; CHECK-NEXT: cmp r0, #0
3881 ; CHECK-NEXT: it ne
3882 ; CHECK-NEXT: movne.w r11, #0
3883 ; CHECK-NEXT: ldr r1, [sp, #36] @ 4-byte Reload
3884 ; CHECK-NEXT: mov r4, r11
3885 ; CHECK-NEXT: ldr r2, [sp, #44] @ 4-byte Reload
3886 ; CHECK-NEXT: mov r0, r9
3887 ; CHECK-NEXT: lsrl r4, r1, #28
3888 ; CHECK-NEXT: mov r3, r5
3889 ; CHECK-NEXT: str r1, [sp, #36] @ 4-byte Spill
3890 ; CHECK-NEXT: mov r1, r8
3891 ; CHECK-NEXT: bl __aeabi_dcmpgt
3892 ; CHECK-NEXT: mov r5, r0
3893 ; CHECK-NEXT: mov r2, r7
3894 ; CHECK-NEXT: mov r0, r9
3895 ; CHECK-NEXT: mov r1, r8
3896 ; CHECK-NEXT: mov r3, r6
3897 ; CHECK-NEXT: mov r7, r6
3898 ; CHECK-NEXT: bl __aeabi_dcmpge
3899 ; CHECK-NEXT: ldr r1, [sp, #16] @ 4-byte Reload
3900 ; CHECK-NEXT: cmp r0, #0
3901 ; CHECK-NEXT: mov r2, r9
3902 ; CHECK-NEXT: mov r3, r8
3903 ; CHECK-NEXT: csel r6, r1, r0, ne
3904 ; CHECK-NEXT: mov r0, r9
3905 ; CHECK-NEXT: mov r1, r8
3906 ; CHECK-NEXT: cmp r5, #0
3907 ; CHECK-NEXT: it ne
3908 ; CHECK-NEXT: movne.w r6, #-1
3909 ; CHECK-NEXT: bl __aeabi_dcmpun
3910 ; CHECK-NEXT: cmp r0, #0
3911 ; CHECK-NEXT: it ne
3912 ; CHECK-NEXT: movne r6, #0
3913 ; CHECK-NEXT: ldr r0, [sp, #36] @ 4-byte Reload
3914 ; CHECK-NEXT: and r1, r10, #15
3915 ; CHECK-NEXT: ldr r2, [sp, #40] @ 4-byte Reload
3916 ; CHECK-NEXT: orr.w r0, r0, r6, lsl #4
3917 ; CHECK-NEXT: lsrl r6, r1, #28
3918 ; CHECK-NEXT: strd r4, r0, [r2, #16]
3919 ; CHECK-NEXT: mov r8, r2
3920 ; CHECK-NEXT: strb r6, [r2, #24]
3921 ; CHECK-NEXT: ldr r5, [sp, #12] @ 4-byte Reload
3922 ; CHECK-NEXT: ldr r6, [sp, #20] @ 4-byte Reload
3923 ; CHECK-NEXT: ldr r2, [sp, #44] @ 4-byte Reload
3924 ; CHECK-NEXT: ldr r3, [sp, #32] @ 4-byte Reload
3925 ; CHECK-NEXT: mov r0, r5
3926 ; CHECK-NEXT: mov r1, r6
3927 ; CHECK-NEXT: bl __aeabi_dcmpgt
3928 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
3929 ; CHECK-NEXT: mov r4, r0
3930 ; CHECK-NEXT: mov r0, r5
3931 ; CHECK-NEXT: mov r1, r6
3932 ; CHECK-NEXT: mov r3, r7
3933 ; CHECK-NEXT: bl __aeabi_dcmpge
3934 ; CHECK-NEXT: cmp r0, #0
3935 ; CHECK-NEXT: ldr r0, [sp, #24] @ 4-byte Reload
3936 ; CHECK-NEXT: it eq
3937 ; CHECK-NEXT: mvneq r0, #7
3938 ; CHECK-NEXT: cmp r4, #0
3939 ; CHECK-NEXT: it ne
3940 ; CHECK-NEXT: movne r0, #7
3941 ; CHECK-NEXT: mov r4, r0
3942 ; CHECK-NEXT: mov r0, r5
3943 ; CHECK-NEXT: mov r1, r6
3944 ; CHECK-NEXT: mov r2, r5
3945 ; CHECK-NEXT: mov r3, r6
3946 ; CHECK-NEXT: bl __aeabi_dcmpun
3947 ; CHECK-NEXT: cmp r0, #0
3948 ; CHECK-NEXT: it ne
3949 ; CHECK-NEXT: movne r4, #0
3950 ; CHECK-NEXT: and r0, r4, #15
3951 ; CHECK-NEXT: orr.w r0, r0, r11, lsl #4
3952 ; CHECK-NEXT: str.w r0, [r8, #12]
3953 ; CHECK-NEXT: add sp, #48
3954 ; CHECK-NEXT: vpop {d8, d9}
3955 ; CHECK-NEXT: add sp, #4
3956 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
3957 ; CHECK-NEXT: .p2align 3
3958 ; CHECK-NEXT: @ %bb.1:
3959 ; CHECK-NEXT: .LCPI40_0:
3960 ; CHECK-NEXT: .long 4294967295 @ double 6.3382530011411463E+29
3961 ; CHECK-NEXT: .long 1176502271
3962 ; CHECK-NEXT: .LCPI40_1:
3963 ; CHECK-NEXT: .long 0 @ double -6.338253001141147E+29
3964 ; CHECK-NEXT: .long 3323985920
3965 %x = call <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double> %f)
3966 ret <2 x i100> %x
3967 }
3969 define arm_aapcs_vfpcc <2 x i128> @test_signed_v2f64_v2i128(<2 x double> %f) {
3970 ; CHECK-LABEL: test_signed_v2f64_v2i128:
3971 ; CHECK: @ %bb.0:
3972 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3973 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
3974 ; CHECK-NEXT: .pad #4
3975 ; CHECK-NEXT: sub sp, #4
3976 ; CHECK-NEXT: .vsave {d8, d9}
3977 ; CHECK-NEXT: vpush {d8, d9}
3978 ; CHECK-NEXT: .pad #32
3979 ; CHECK-NEXT: sub sp, #32
3980 ; CHECK-NEXT: vmov q4, q0
3981 ; CHECK-NEXT: vldr d0, .LCPI41_0
3982 ; CHECK-NEXT: vmov r8, r7, d9
3983 ; CHECK-NEXT: mov r6, r0
3984 ; CHECK-NEXT: vmov r2, r3, d0
3985 ; CHECK-NEXT: str r0, [sp, #12] @ 4-byte Spill
3986 ; CHECK-NEXT: str r2, [sp, #28] @ 4-byte Spill
3987 ; CHECK-NEXT: mov r0, r8
3988 ; CHECK-NEXT: mov r1, r7
3989 ; CHECK-NEXT: mov r11, r3
3990 ; CHECK-NEXT: bl __aeabi_dcmpgt
3991 ; CHECK-NEXT: vldr d0, .LCPI41_1
3992 ; CHECK-NEXT: mov r5, r0
3993 ; CHECK-NEXT: mov r0, r8
3994 ; CHECK-NEXT: mov r1, r7
3995 ; CHECK-NEXT: vmov r4, r3, d0
3996 ; CHECK-NEXT: str r3, [sp, #24] @ 4-byte Spill
3997 ; CHECK-NEXT: mov r2, r4
3998 ; CHECK-NEXT: bl __aeabi_dcmpge
3999 ; CHECK-NEXT: mov r9, r0
4000 ; CHECK-NEXT: mov r0, r8
4001 ; CHECK-NEXT: mov r1, r7
4002 ; CHECK-NEXT: bl __fixdfti
4003 ; CHECK-NEXT: mov r10, r3
4004 ; CHECK-NEXT: strd r2, r1, [sp] @ 8-byte Folded Spill
4005 ; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
4006 ; CHECK-NEXT: cmp.w r9, #0
4007 ; CHECK-NEXT: it eq
4008 ; CHECK-NEXT: moveq.w r10, #-2147483648
4009 ; CHECK-NEXT: mov r0, r8
4010 ; CHECK-NEXT: mov r1, r7
4011 ; CHECK-NEXT: mov r2, r8
4012 ; CHECK-NEXT: mov r3, r7
4013 ; CHECK-NEXT: cmp r5, #0
4014 ; CHECK-NEXT: it ne
4015 ; CHECK-NEXT: mvnne r10, #-2147483648
4016 ; CHECK-NEXT: bl __aeabi_dcmpun
4017 ; CHECK-NEXT: cmp r0, #0
4018 ; CHECK-NEXT: it ne
4019 ; CHECK-NEXT: movne.w r10, #0
4020 ; CHECK-NEXT: str.w r10, [r6, #28]
4021 ; CHECK-NEXT: mov r0, r8
4022 ; CHECK-NEXT: ldr.w r9, [sp, #28] @ 4-byte Reload
4023 ; CHECK-NEXT: mov r1, r7
4024 ; CHECK-NEXT: mov r3, r11
4025 ; CHECK-NEXT: mov r5, r11
4026 ; CHECK-NEXT: str.w r11, [sp, #16] @ 4-byte Spill
4027 ; CHECK-NEXT: mov r2, r9
4028 ; CHECK-NEXT: bl __aeabi_dcmpgt
4029 ; CHECK-NEXT: ldr.w r10, [sp, #24] @ 4-byte Reload
4030 ; CHECK-NEXT: mov r6, r0
4031 ; CHECK-NEXT: mov r0, r8
4032 ; CHECK-NEXT: mov r1, r7
4033 ; CHECK-NEXT: mov r2, r4
4034 ; CHECK-NEXT: mov r11, r4
4035 ; CHECK-NEXT: mov r3, r10
4036 ; CHECK-NEXT: str r4, [sp, #20] @ 4-byte Spill
4037 ; CHECK-NEXT: bl __aeabi_dcmpge
4038 ; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload
4039 ; CHECK-NEXT: cmp r0, #0
4040 ; CHECK-NEXT: mov r2, r8
4041 ; CHECK-NEXT: mov r3, r7
4042 ; CHECK-NEXT: csel r4, r1, r0, ne
4043 ; CHECK-NEXT: mov r0, r8
4044 ; CHECK-NEXT: mov r1, r7
4045 ; CHECK-NEXT: cmp r6, #0
4046 ; CHECK-NEXT: it ne
4047 ; CHECK-NEXT: movne.w r4, #-1
4048 ; CHECK-NEXT: bl __aeabi_dcmpun
4049 ; CHECK-NEXT: cmp r0, #0
4050 ; CHECK-NEXT: it ne
4051 ; CHECK-NEXT: movne r4, #0
4052 ; CHECK-NEXT: ldr r6, [sp, #12] @ 4-byte Reload
4053 ; CHECK-NEXT: mov r0, r8
4054 ; CHECK-NEXT: mov r1, r7
4055 ; CHECK-NEXT: mov r2, r9
4056 ; CHECK-NEXT: mov r3, r5
4057 ; CHECK-NEXT: str r4, [r6, #24]
4058 ; CHECK-NEXT: bl __aeabi_dcmpgt
4059 ; CHECK-NEXT: mov r5, r0
4060 ; CHECK-NEXT: mov r0, r8
4061 ; CHECK-NEXT: mov r1, r7
4062 ; CHECK-NEXT: mov r2, r11
4063 ; CHECK-NEXT: mov r3, r10
4064 ; CHECK-NEXT: bl __aeabi_dcmpge
4065 ; CHECK-NEXT: ldr r1, [sp, #4] @ 4-byte Reload
4066 ; CHECK-NEXT: cmp r0, #0
4067 ; CHECK-NEXT: mov r2, r8
4068 ; CHECK-NEXT: mov r3, r7
4069 ; CHECK-NEXT: csel r4, r1, r0, ne
4070 ; CHECK-NEXT: mov r0, r8
4071 ; CHECK-NEXT: mov r1, r7
4072 ; CHECK-NEXT: cmp r5, #0
4073 ; CHECK-NEXT: it ne
4074 ; CHECK-NEXT: movne.w r4, #-1
4075 ; CHECK-NEXT: bl __aeabi_dcmpun
4076 ; CHECK-NEXT: cmp r0, #0
4077 ; CHECK-NEXT: it ne
4078 ; CHECK-NEXT: movne r4, #0
4079 ; CHECK-NEXT: str r4, [r6, #20]
4080 ; CHECK-NEXT: mov r0, r8
4081 ; CHECK-NEXT: ldr.w r10, [sp, #16] @ 4-byte Reload
4082 ; CHECK-NEXT: mov r1, r7
4083 ; CHECK-NEXT: mov r2, r9
4084 ; CHECK-NEXT: mov r11, r6
4085 ; CHECK-NEXT: mov r3, r10
4086 ; CHECK-NEXT: bl __aeabi_dcmpgt
4087 ; CHECK-NEXT: ldrd r2, r3, [sp, #20] @ 8-byte Folded Reload
4088 ; CHECK-NEXT: mov r9, r0
4089 ; CHECK-NEXT: mov r0, r8
4090 ; CHECK-NEXT: mov r1, r7
4091 ; CHECK-NEXT: bl __aeabi_dcmpge
4092 ; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
4093 ; CHECK-NEXT: cmp r0, #0
4094 ; CHECK-NEXT: mov r2, r8
4095 ; CHECK-NEXT: mov r3, r7
4096 ; CHECK-NEXT: csel r4, r1, r0, ne
4097 ; CHECK-NEXT: mov r0, r8
4098 ; CHECK-NEXT: mov r1, r7
4099 ; CHECK-NEXT: cmp.w r9, #0
4100 ; CHECK-NEXT: vmov r6, r5, d8
4101 ; CHECK-NEXT: it ne
4102 ; CHECK-NEXT: movne.w r4, #-1
4103 ; CHECK-NEXT: bl __aeabi_dcmpun
4104 ; CHECK-NEXT: cmp r0, #0
4105 ; CHECK-NEXT: it ne
4106 ; CHECK-NEXT: movne r4, #0
4107 ; CHECK-NEXT: str.w r4, [r11, #16]
4108 ; CHECK-NEXT: mov r0, r6
4109 ; CHECK-NEXT: ldr r7, [sp, #28] @ 4-byte Reload
4110 ; CHECK-NEXT: mov r1, r5
4111 ; CHECK-NEXT: mov r3, r10
4112 ; CHECK-NEXT: mov r2, r7
4113 ; CHECK-NEXT: bl __aeabi_dcmpgt
4114 ; CHECK-NEXT: ldr.w r9, [sp, #20] @ 4-byte Reload
4115 ; CHECK-NEXT: mov r10, r0
4116 ; CHECK-NEXT: ldr.w r8, [sp, #24] @ 4-byte Reload
4117 ; CHECK-NEXT: mov r0, r6
4118 ; CHECK-NEXT: mov r1, r5
4119 ; CHECK-NEXT: mov r2, r9
4120 ; CHECK-NEXT: mov r3, r8
4121 ; CHECK-NEXT: bl __aeabi_dcmpge
4122 ; CHECK-NEXT: mov r11, r0
4123 ; CHECK-NEXT: mov r0, r6
4124 ; CHECK-NEXT: mov r1, r5
4125 ; CHECK-NEXT: bl __fixdfti
4126 ; CHECK-NEXT: mov r4, r3
4127 ; CHECK-NEXT: strd r2, r1, [sp] @ 8-byte Folded Spill
4128 ; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
4129 ; CHECK-NEXT: cmp.w r11, #0
4130 ; CHECK-NEXT: it eq
4131 ; CHECK-NEXT: moveq.w r4, #-2147483648
4132 ; CHECK-NEXT: mov r0, r6
4133 ; CHECK-NEXT: mov r1, r5
4134 ; CHECK-NEXT: mov r2, r6
4135 ; CHECK-NEXT: mov r3, r5
4136 ; CHECK-NEXT: cmp.w r10, #0
4137 ; CHECK-NEXT: it ne
4138 ; CHECK-NEXT: mvnne r4, #-2147483648
4139 ; CHECK-NEXT: bl __aeabi_dcmpun
4140 ; CHECK-NEXT: cmp r0, #0
4141 ; CHECK-NEXT: it ne
4142 ; CHECK-NEXT: movne r4, #0
4143 ; CHECK-NEXT: ldr.w r10, [sp, #12] @ 4-byte Reload
4144 ; CHECK-NEXT: mov r0, r6
4145 ; CHECK-NEXT: mov r1, r5
4146 ; CHECK-NEXT: mov r2, r7
4147 ; CHECK-NEXT: str.w r4, [r10, #12]
4148 ; CHECK-NEXT: ldr.w r11, [sp, #16] @ 4-byte Reload
4149 ; CHECK-NEXT: mov r3, r11
4150 ; CHECK-NEXT: bl __aeabi_dcmpgt
4151 ; CHECK-NEXT: mov r4, r0
4152 ; CHECK-NEXT: mov r0, r6
4153 ; CHECK-NEXT: mov r1, r5
4154 ; CHECK-NEXT: mov r2, r9
4155 ; CHECK-NEXT: mov r3, r8
4156 ; CHECK-NEXT: bl __aeabi_dcmpge
4157 ; CHECK-NEXT: ldr r1, [sp] @ 4-byte Reload
4158 ; CHECK-NEXT: cmp r0, #0
4159 ; CHECK-NEXT: mov r2, r6
4160 ; CHECK-NEXT: mov r3, r5
4161 ; CHECK-NEXT: csel r7, r1, r0, ne
4162 ; CHECK-NEXT: mov r0, r6
4163 ; CHECK-NEXT: mov r1, r5
4164 ; CHECK-NEXT: cmp r4, #0
4165 ; CHECK-NEXT: it ne
4166 ; CHECK-NEXT: movne.w r7, #-1
4167 ; CHECK-NEXT: bl __aeabi_dcmpun
4168 ; CHECK-NEXT: cmp r0, #0
4169 ; CHECK-NEXT: it ne
4170 ; CHECK-NEXT: movne r7, #0
4171 ; CHECK-NEXT: str.w r7, [r10, #8]
4172 ; CHECK-NEXT: mov r0, r6
4173 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
4174 ; CHECK-NEXT: mov r1, r5
4175 ; CHECK-NEXT: mov r3, r11
4176 ; CHECK-NEXT: bl __aeabi_dcmpgt
4177 ; CHECK-NEXT: mov r4, r0
4178 ; CHECK-NEXT: mov r0, r6
4179 ; CHECK-NEXT: mov r1, r5
4180 ; CHECK-NEXT: mov r2, r9
4181 ; CHECK-NEXT: mov r3, r8
4182 ; CHECK-NEXT: bl __aeabi_dcmpge
4183 ; CHECK-NEXT: ldr r1, [sp, #4] @ 4-byte Reload
4184 ; CHECK-NEXT: cmp r0, #0
4185 ; CHECK-NEXT: mov r2, r6
4186 ; CHECK-NEXT: mov r3, r5
4187 ; CHECK-NEXT: csel r7, r1, r0, ne
4188 ; CHECK-NEXT: mov r0, r6
4189 ; CHECK-NEXT: mov r1, r5
4190 ; CHECK-NEXT: cmp r4, #0
4191 ; CHECK-NEXT: it ne
4192 ; CHECK-NEXT: movne.w r7, #-1
4193 ; CHECK-NEXT: bl __aeabi_dcmpun
4194 ; CHECK-NEXT: cmp r0, #0
4195 ; CHECK-NEXT: it ne
4196 ; CHECK-NEXT: movne r7, #0
4197 ; CHECK-NEXT: str.w r7, [r10, #4]
4198 ; CHECK-NEXT: mov r0, r6
4199 ; CHECK-NEXT: ldr r2, [sp, #28] @ 4-byte Reload
4200 ; CHECK-NEXT: mov r1, r5
4201 ; CHECK-NEXT: mov r3, r11
4202 ; CHECK-NEXT: bl __aeabi_dcmpgt
4203 ; CHECK-NEXT: mov r4, r0
4204 ; CHECK-NEXT: mov r0, r6
4205 ; CHECK-NEXT: mov r1, r5
4206 ; CHECK-NEXT: mov r2, r9
4207 ; CHECK-NEXT: mov r3, r8
4208 ; CHECK-NEXT: bl __aeabi_dcmpge
4209 ; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
4210 ; CHECK-NEXT: cmp r0, #0
4211 ; CHECK-NEXT: mov r2, r6
4212 ; CHECK-NEXT: mov r3, r5
4213 ; CHECK-NEXT: csel r7, r1, r0, ne
4214 ; CHECK-NEXT: mov r0, r6
4215 ; CHECK-NEXT: mov r1, r5
4216 ; CHECK-NEXT: cmp r4, #0
4217 ; CHECK-NEXT: it ne
4218 ; CHECK-NEXT: movne.w r7, #-1
4219 ; CHECK-NEXT: bl __aeabi_dcmpun
4220 ; CHECK-NEXT: cmp r0, #0
4221 ; CHECK-NEXT: it ne
4222 ; CHECK-NEXT: movne r7, #0
4223 ; CHECK-NEXT: str.w r7, [r10]
4224 ; CHECK-NEXT: add sp, #32
4225 ; CHECK-NEXT: vpop {d8, d9}
4226 ; CHECK-NEXT: add sp, #4
4227 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
4228 ; CHECK-NEXT: .p2align 3
4229 ; CHECK-NEXT: @ %bb.1:
4230 ; CHECK-NEXT: .LCPI41_0:
4231 ; CHECK-NEXT: .long 4294967295 @ double 1.7014118346046921E+38
4232 ; CHECK-NEXT: .long 1205862399
4233 ; CHECK-NEXT: .LCPI41_1:
4234 ; CHECK-NEXT: .long 0 @ double -1.7014118346046923E+38
4235 ; CHECK-NEXT: .long 3353346048
4236 %x = call <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double> %f)
4237 ret <2 x i128> %x
4238 }
4240 ;
4241 ; 4-Vector half to signed integer -- result size variation
4242 ;
4244 declare <8 x i1> @llvm.fptosi.sat.v8f16.v8i1 (<8 x half>)
4245 declare <8 x i8> @llvm.fptosi.sat.v8f16.v8i8 (<8 x half>)
4246 declare <8 x i13> @llvm.fptosi.sat.v8f16.v8i13 (<8 x half>)
4247 declare <8 x i16> @llvm.fptosi.sat.v8f16.v8i16 (<8 x half>)
4248 declare <8 x i19> @llvm.fptosi.sat.v8f16.v8i19 (<8 x half>)
4249 declare <8 x i50> @llvm.fptosi.sat.v8f16.v8i50 (<8 x half>)
4250 declare <8 x i64> @llvm.fptosi.sat.v8f16.v8i64 (<8 x half>)
4251 declare <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half>)
4252 declare <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half>)
4254 define arm_aapcs_vfpcc <8 x i1> @test_signed_v8f16_v8i1(<8 x half> %f) {
4255 ; CHECK-LABEL: test_signed_v8f16_v8i1:
4256 ; CHECK: @ %bb.0:
4257 ; CHECK-NEXT: .vsave {d8}
4258 ; CHECK-NEXT: vpush {d8}
4259 ; CHECK-NEXT: vcvtb.f32.f16 s15, s0
4260 ; CHECK-NEXT: vmov.f32 s5, #-1.000000e+00
4261 ; CHECK-NEXT: vldr s7, .LCPI42_0
4262 ; CHECK-NEXT: vmaxnm.f32 s16, s15, s5
4263 ; CHECK-NEXT: vcvtt.f32.f16 s12, s2
4264 ; CHECK-NEXT: vcvtt.f32.f16 s9, s1
4265 ; CHECK-NEXT: vminnm.f32 s16, s16, s7
4266 ; CHECK-NEXT: vcvtt.f32.f16 s4, s3
4267 ; CHECK-NEXT: vcvt.s32.f32 s16, s16
4268 ; CHECK-NEXT: vcvtb.f32.f16 s8, s3
4269 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
4270 ; CHECK-NEXT: vcvtb.f32.f16 s1, s1
4271 ; CHECK-NEXT: vcvtt.f32.f16 s0, s0
4272 ; CHECK-NEXT: vmaxnm.f32 s6, s4, s5
4273 ; CHECK-NEXT: vmaxnm.f32 s10, s8, s5
4274 ; CHECK-NEXT: vmaxnm.f32 s14, s12, s5
4275 ; CHECK-NEXT: vmaxnm.f32 s3, s2, s5
4276 ; CHECK-NEXT: vmaxnm.f32 s11, s9, s5
4277 ; CHECK-NEXT: vmaxnm.f32 s13, s1, s5
4278 ; CHECK-NEXT: vmaxnm.f32 s5, s0, s5
4279 ; CHECK-NEXT: vminnm.f32 s5, s5, s7
4280 ; CHECK-NEXT: vminnm.f32 s13, s13, s7
4281 ; CHECK-NEXT: vcvt.s32.f32 s5, s5
4282 ; CHECK-NEXT: movs r1, #0
4283 ; CHECK-NEXT: vcmp.f32 s15, s15
4284 ; CHECK-NEXT: vminnm.f32 s11, s11, s7
4285 ; CHECK-NEXT: vmov r2, s16
4286 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4287 ; CHECK-NEXT: it vs
4288 ; CHECK-NEXT: movvs r2, #0
4289 ; CHECK-NEXT: vcvt.s32.f32 s13, s13
4290 ; CHECK-NEXT: and r2, r2, #1
4291 ; CHECK-NEXT: vcmp.f32 s0, s0
4292 ; CHECK-NEXT: rsbs r2, r2, #0
4293 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4294 ; CHECK-NEXT: bfi r1, r2, #0, #1
4295 ; CHECK-NEXT: vcvt.s32.f32 s11, s11
4296 ; CHECK-NEXT: vmov r2, s5
4297 ; CHECK-NEXT: vminnm.f32 s3, s3, s7
4298 ; CHECK-NEXT: it vs
4299 ; CHECK-NEXT: movvs r2, #0
4300 ; CHECK-NEXT: vcmp.f32 s1, s1
4301 ; CHECK-NEXT: and r2, r2, #1
4302 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4303 ; CHECK-NEXT: rsb.w r2, r2, #0
4304 ; CHECK-NEXT: vcvt.s32.f32 s3, s3
4305 ; CHECK-NEXT: bfi r1, r2, #1, #1
4306 ; CHECK-NEXT: vmov r2, s13
4307 ; CHECK-NEXT: it vs
4308 ; CHECK-NEXT: movvs r2, #0
4309 ; CHECK-NEXT: vminnm.f32 s14, s14, s7
4310 ; CHECK-NEXT: and r2, r2, #1
4311 ; CHECK-NEXT: vcmp.f32 s9, s9
4312 ; CHECK-NEXT: rsbs r2, r2, #0
4313 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4314 ; CHECK-NEXT: bfi r1, r2, #2, #1
4315 ; CHECK-NEXT: vmov r2, s11
4316 ; CHECK-NEXT: it vs
4317 ; CHECK-NEXT: movvs r2, #0
4318 ; CHECK-NEXT: vcvt.s32.f32 s14, s14
4319 ; CHECK-NEXT: and r2, r2, #1
4320 ; CHECK-NEXT: vminnm.f32 s10, s10, s7
4321 ; CHECK-NEXT: rsbs r2, r2, #0
4322 ; CHECK-NEXT: vcmp.f32 s2, s2
4323 ; CHECK-NEXT: bfi r1, r2, #3, #1
4324 ; CHECK-NEXT: vmov r2, s3
4325 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4326 ; CHECK-NEXT: it vs
4327 ; CHECK-NEXT: movvs r2, #0
4328 ; CHECK-NEXT: vcvt.s32.f32 s10, s10
4329 ; CHECK-NEXT: and r2, r2, #1
4330 ; CHECK-NEXT: rsbs r2, r2, #0
4331 ; CHECK-NEXT: vminnm.f32 s6, s6, s7
4332 ; CHECK-NEXT: bfi r1, r2, #4, #1
4333 ; CHECK-NEXT: vcmp.f32 s12, s12
4334 ; CHECK-NEXT: vmov r2, s14
4335 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4336 ; CHECK-NEXT: it vs
4337 ; CHECK-NEXT: movvs r2, #0
4338 ; CHECK-NEXT: vcvt.s32.f32 s6, s6
4339 ; CHECK-NEXT: and r2, r2, #1
4340 ; CHECK-NEXT: vcmp.f32 s8, s8
4341 ; CHECK-NEXT: rsbs r2, r2, #0
4342 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4343 ; CHECK-NEXT: bfi r1, r2, #5, #1
4344 ; CHECK-NEXT: vmov r2, s10
4345 ; CHECK-NEXT: it vs
4346 ; CHECK-NEXT: movvs r2, #0
4347 ; CHECK-NEXT: vcmp.f32 s4, s4
4348 ; CHECK-NEXT: and r2, r2, #1
4349 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4350 ; CHECK-NEXT: rsb.w r2, r2, #0
4351 ; CHECK-NEXT: bfi r1, r2, #6, #1
4352 ; CHECK-NEXT: vmov r2, s6
4353 ; CHECK-NEXT: it vs
4354 ; CHECK-NEXT: movvs r2, #0
4355 ; CHECK-NEXT: and r2, r2, #1
4356 ; CHECK-NEXT: rsbs r2, r2, #0
4357 ; CHECK-NEXT: bfi r1, r2, #7, #1
4358 ; CHECK-NEXT: strb r1, [r0]
4359 ; CHECK-NEXT: vpop {d8}
4360 ; CHECK-NEXT: bx lr
4361 ; CHECK-NEXT: .p2align 2
4362 ; CHECK-NEXT: @ %bb.1:
4363 ; CHECK-NEXT: .LCPI42_0:
4364 ; CHECK-NEXT: .long 0x00000000 @ float 0
4365 %x = call <8 x i1> @llvm.fptosi.sat.v8f16.v8i1(<8 x half> %f)
4366 ret <8 x i1> %x
4367 }
4369 define arm_aapcs_vfpcc <8 x i8> @test_signed_v8f16_v8i8(<8 x half> %f) {
4370 ; CHECK-MVE-LABEL: test_signed_v8f16_v8i8:
4371 ; CHECK-MVE: @ %bb.0:
4372 ; CHECK-MVE-NEXT: .save {r4, r5, r7, lr}
4373 ; CHECK-MVE-NEXT: push {r4, r5, r7, lr}
4374 ; CHECK-MVE-NEXT: .vsave {d8}
4375 ; CHECK-MVE-NEXT: vpush {d8}
4376 ; CHECK-MVE-NEXT: vldr s8, .LCPI43_1
4377 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s13, s3
4378 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s3, s3
4379 ; CHECK-MVE-NEXT: vldr s6, .LCPI43_0
4380 ; CHECK-MVE-NEXT: vmaxnm.f32 s16, s3, s8
4381 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s4, s0
4382 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s12, s1
4383 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s7, s2
4384 ; CHECK-MVE-NEXT: vmaxnm.f32 s15, s13, s8
4385 ; CHECK-MVE-NEXT: vminnm.f32 s16, s16, s6
4386 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s0
4387 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s1, s1
4388 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s2
4389 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s4, s8
4390 ; CHECK-MVE-NEXT: vmaxnm.f32 s14, s12, s8
4391 ; CHECK-MVE-NEXT: vmaxnm.f32 s5, s0, s8
4392 ; CHECK-MVE-NEXT: vmaxnm.f32 s9, s7, s8
4393 ; CHECK-MVE-NEXT: vmaxnm.f32 s11, s1, s8
4394 ; CHECK-MVE-NEXT: vminnm.f32 s15, s15, s6
4395 ; CHECK-MVE-NEXT: vcvt.s32.f32 s16, s16
4396 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s2, s8
4397 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
4398 ; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s6
4399 ; CHECK-MVE-NEXT: vminnm.f32 s5, s5, s6
4400 ; CHECK-MVE-NEXT: vminnm.f32 s9, s9, s6
4401 ; CHECK-MVE-NEXT: vminnm.f32 s11, s11, s6
4402 ; CHECK-MVE-NEXT: vminnm.f32 s6, s8, s6
4403 ; CHECK-MVE-NEXT: vcvt.s32.f32 s15, s15
4404 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s6
4405 ; CHECK-MVE-NEXT: vcvt.s32.f32 s9, s9
4406 ; CHECK-MVE-NEXT: vcvt.s32.f32 s11, s11
4407 ; CHECK-MVE-NEXT: vcvt.s32.f32 s14, s14
4408 ; CHECK-MVE-NEXT: vcvt.s32.f32 s5, s5
4409 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
4410 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
4411 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4412 ; CHECK-MVE-NEXT: vmov r12, s16
4413 ; CHECK-MVE-NEXT: vcmp.f32 s13, s13
4414 ; CHECK-MVE-NEXT: it vs
4415 ; CHECK-MVE-NEXT: movvs.w r12, #0
4416 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4417 ; CHECK-MVE-NEXT: vmov lr, s15
4418 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
4419 ; CHECK-MVE-NEXT: it vs
4420 ; CHECK-MVE-NEXT: movvs.w lr, #0
4421 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4422 ; CHECK-MVE-NEXT: vmov r2, s6
4423 ; CHECK-MVE-NEXT: vcmp.f32 s7, s7
4424 ; CHECK-MVE-NEXT: it vs
4425 ; CHECK-MVE-NEXT: movvs r2, #0
4426 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4427 ; CHECK-MVE-NEXT: vmov r3, s9
4428 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
4429 ; CHECK-MVE-NEXT: it vs
4430 ; CHECK-MVE-NEXT: movvs r3, #0
4431 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4432 ; CHECK-MVE-NEXT: vmov r0, s11
4433 ; CHECK-MVE-NEXT: vcmp.f32 s12, s12
4434 ; CHECK-MVE-NEXT: it vs
4435 ; CHECK-MVE-NEXT: movvs r0, #0
4436 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4437 ; CHECK-MVE-NEXT: vmov r1, s14
4438 ; CHECK-MVE-NEXT: vmov r4, s5
4439 ; CHECK-MVE-NEXT: it vs
4440 ; CHECK-MVE-NEXT: movvs r1, #0
4441 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
4442 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4443 ; CHECK-MVE-NEXT: it vs
4444 ; CHECK-MVE-NEXT: movvs r4, #0
4445 ; CHECK-MVE-NEXT: vcmp.f32 s4, s4
4446 ; CHECK-MVE-NEXT: vmov.16 q0[0], r4
4447 ; CHECK-MVE-NEXT: vmov r5, s10
4448 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4449 ; CHECK-MVE-NEXT: it vs
4450 ; CHECK-MVE-NEXT: movvs r5, #0
4451 ; CHECK-MVE-NEXT: vmov.16 q0[1], r5
4452 ; CHECK-MVE-NEXT: vmov.16 q0[2], r0
4453 ; CHECK-MVE-NEXT: vmov.16 q0[3], r1
4454 ; CHECK-MVE-NEXT: vmov.16 q0[4], r2
4455 ; CHECK-MVE-NEXT: vmov.16 q0[5], r3
4456 ; CHECK-MVE-NEXT: vmov.16 q0[6], r12
4457 ; CHECK-MVE-NEXT: vmov.16 q0[7], lr
4458 ; CHECK-MVE-NEXT: vpop {d8}
4459 ; CHECK-MVE-NEXT: pop {r4, r5, r7, pc}
4460 ; CHECK-MVE-NEXT: .p2align 2
4461 ; CHECK-MVE-NEXT: @ %bb.1:
4462 ; CHECK-MVE-NEXT: .LCPI43_0:
4463 ; CHECK-MVE-NEXT: .long 0x42fe0000 @ float 127
4464 ; CHECK-MVE-NEXT: .LCPI43_1:
4465 ; CHECK-MVE-NEXT: .long 0xc3000000 @ float -128
4466 ;
4467 ; CHECK-MVEFP-LABEL: test_signed_v8f16_v8i8:
4468 ; CHECK-MVEFP: @ %bb.0:
4469 ; CHECK-MVEFP-NEXT: vcvt.s16.f16 q0, q0
4470 ; CHECK-MVEFP-NEXT: vqmovnb.s16 q0, q0
4471 ; CHECK-MVEFP-NEXT: vmovlb.s8 q0, q0
4472 ; CHECK-MVEFP-NEXT: bx lr
4473 %x = call <8 x i8> @llvm.fptosi.sat.v8f16.v8i8(<8 x half> %f)
4474 ret <8 x i8> %x
4475 }
4477 define arm_aapcs_vfpcc <8 x i13> @test_signed_v8f16_v8i13(<8 x half> %f) {
4478 ; CHECK-MVE-LABEL: test_signed_v8f16_v8i13:
4479 ; CHECK-MVE: @ %bb.0:
4480 ; CHECK-MVE-NEXT: .save {r4, r5, r7, lr}
4481 ; CHECK-MVE-NEXT: push {r4, r5, r7, lr}
4482 ; CHECK-MVE-NEXT: .vsave {d8}
4483 ; CHECK-MVE-NEXT: vpush {d8}
4484 ; CHECK-MVE-NEXT: vldr s8, .LCPI44_1
4485 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s13, s3
4486 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s3, s3
4487 ; CHECK-MVE-NEXT: vldr s6, .LCPI44_0
4488 ; CHECK-MVE-NEXT: vmaxnm.f32 s16, s3, s8
4489 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s4, s0
4490 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s12, s1
4491 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s7, s2
4492 ; CHECK-MVE-NEXT: vmaxnm.f32 s15, s13, s8
4493 ; CHECK-MVE-NEXT: vminnm.f32 s16, s16, s6
4494 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s0
4495 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s1, s1
4496 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s2
4497 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s4, s8
4498 ; CHECK-MVE-NEXT: vmaxnm.f32 s14, s12, s8
4499 ; CHECK-MVE-NEXT: vmaxnm.f32 s5, s0, s8
4500 ; CHECK-MVE-NEXT: vmaxnm.f32 s9, s7, s8
4501 ; CHECK-MVE-NEXT: vmaxnm.f32 s11, s1, s8
4502 ; CHECK-MVE-NEXT: vminnm.f32 s15, s15, s6
4503 ; CHECK-MVE-NEXT: vcvt.s32.f32 s16, s16
4504 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s2, s8
4505 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
4506 ; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s6
4507 ; CHECK-MVE-NEXT: vminnm.f32 s5, s5, s6
4508 ; CHECK-MVE-NEXT: vminnm.f32 s9, s9, s6
4509 ; CHECK-MVE-NEXT: vminnm.f32 s11, s11, s6
4510 ; CHECK-MVE-NEXT: vminnm.f32 s6, s8, s6
4511 ; CHECK-MVE-NEXT: vcvt.s32.f32 s15, s15
4512 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s6
4513 ; CHECK-MVE-NEXT: vcvt.s32.f32 s9, s9
4514 ; CHECK-MVE-NEXT: vcvt.s32.f32 s11, s11
4515 ; CHECK-MVE-NEXT: vcvt.s32.f32 s14, s14
4516 ; CHECK-MVE-NEXT: vcvt.s32.f32 s5, s5
4517 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
4518 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
4519 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4520 ; CHECK-MVE-NEXT: vmov r12, s16
4521 ; CHECK-MVE-NEXT: vcmp.f32 s13, s13
4522 ; CHECK-MVE-NEXT: it vs
4523 ; CHECK-MVE-NEXT: movvs.w r12, #0
4524 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4525 ; CHECK-MVE-NEXT: vmov lr, s15
4526 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
4527 ; CHECK-MVE-NEXT: it vs
4528 ; CHECK-MVE-NEXT: movvs.w lr, #0
4529 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4530 ; CHECK-MVE-NEXT: vmov r2, s6
4531 ; CHECK-MVE-NEXT: vcmp.f32 s7, s7
4532 ; CHECK-MVE-NEXT: it vs
4533 ; CHECK-MVE-NEXT: movvs r2, #0
4534 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4535 ; CHECK-MVE-NEXT: vmov r3, s9
4536 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
4537 ; CHECK-MVE-NEXT: it vs
4538 ; CHECK-MVE-NEXT: movvs r3, #0
4539 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4540 ; CHECK-MVE-NEXT: vmov r0, s11
4541 ; CHECK-MVE-NEXT: vcmp.f32 s12, s12
4542 ; CHECK-MVE-NEXT: it vs
4543 ; CHECK-MVE-NEXT: movvs r0, #0
4544 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4545 ; CHECK-MVE-NEXT: vmov r1, s14
4546 ; CHECK-MVE-NEXT: vmov r4, s5
4547 ; CHECK-MVE-NEXT: it vs
4548 ; CHECK-MVE-NEXT: movvs r1, #0
4549 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
4550 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4551 ; CHECK-MVE-NEXT: it vs
4552 ; CHECK-MVE-NEXT: movvs r4, #0
4553 ; CHECK-MVE-NEXT: vcmp.f32 s4, s4
4554 ; CHECK-MVE-NEXT: vmov.16 q0[0], r4
4555 ; CHECK-MVE-NEXT: vmov r5, s10
4556 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4557 ; CHECK-MVE-NEXT: it vs
4558 ; CHECK-MVE-NEXT: movvs r5, #0
4559 ; CHECK-MVE-NEXT: vmov.16 q0[1], r5
4560 ; CHECK-MVE-NEXT: vmov.16 q0[2], r0
4561 ; CHECK-MVE-NEXT: vmov.16 q0[3], r1
4562 ; CHECK-MVE-NEXT: vmov.16 q0[4], r2
4563 ; CHECK-MVE-NEXT: vmov.16 q0[5], r3
4564 ; CHECK-MVE-NEXT: vmov.16 q0[6], r12
4565 ; CHECK-MVE-NEXT: vmov.16 q0[7], lr
4566 ; CHECK-MVE-NEXT: vpop {d8}
4567 ; CHECK-MVE-NEXT: pop {r4, r5, r7, pc}
4568 ; CHECK-MVE-NEXT: .p2align 2
4569 ; CHECK-MVE-NEXT: @ %bb.1:
4570 ; CHECK-MVE-NEXT: .LCPI44_0:
4571 ; CHECK-MVE-NEXT: .long 0x457ff000 @ float 4095
4572 ; CHECK-MVE-NEXT: .LCPI44_1:
4573 ; CHECK-MVE-NEXT: .long 0xc5800000 @ float -4096
4574 ;
4575 ; CHECK-MVEFP-LABEL: test_signed_v8f16_v8i13:
4576 ; CHECK-MVEFP: @ %bb.0:
4577 ; CHECK-MVEFP-NEXT: vmvn.i16 q1, #0xf000
4578 ; CHECK-MVEFP-NEXT: vcvt.s16.f16 q0, q0
4579 ; CHECK-MVEFP-NEXT: vmov.i16 q2, #0xf000
4580 ; CHECK-MVEFP-NEXT: vmin.s16 q0, q0, q1
4581 ; CHECK-MVEFP-NEXT: vmax.s16 q0, q0, q2
4582 ; CHECK-MVEFP-NEXT: bx lr
4583 %x = call <8 x i13> @llvm.fptosi.sat.v8f16.v8i13(<8 x half> %f)
4584 ret <8 x i13> %x
4585 }
4587 define arm_aapcs_vfpcc <8 x i16> @test_signed_v8f16_v8i16(<8 x half> %f) {
4588 ; CHECK-MVE-LABEL: test_signed_v8f16_v8i16:
4589 ; CHECK-MVE: @ %bb.0:
4590 ; CHECK-MVE-NEXT: .save {r4, r5, r7, lr}
4591 ; CHECK-MVE-NEXT: push {r4, r5, r7, lr}
4592 ; CHECK-MVE-NEXT: .vsave {d8}
4593 ; CHECK-MVE-NEXT: vpush {d8}
4594 ; CHECK-MVE-NEXT: vldr s8, .LCPI45_1
4595 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s13, s3
4596 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s3, s3
4597 ; CHECK-MVE-NEXT: vldr s6, .LCPI45_0
4598 ; CHECK-MVE-NEXT: vmaxnm.f32 s16, s3, s8
4599 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s4, s0
4600 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s12, s1
4601 ; CHECK-MVE-NEXT: vcvtt.f32.f16 s7, s2
4602 ; CHECK-MVE-NEXT: vmaxnm.f32 s15, s13, s8
4603 ; CHECK-MVE-NEXT: vminnm.f32 s16, s16, s6
4604 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s0, s0
4605 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s1, s1
4606 ; CHECK-MVE-NEXT: vcvtb.f32.f16 s2, s2
4607 ; CHECK-MVE-NEXT: vmaxnm.f32 s10, s4, s8
4608 ; CHECK-MVE-NEXT: vmaxnm.f32 s14, s12, s8
4609 ; CHECK-MVE-NEXT: vmaxnm.f32 s5, s0, s8
4610 ; CHECK-MVE-NEXT: vmaxnm.f32 s9, s7, s8
4611 ; CHECK-MVE-NEXT: vmaxnm.f32 s11, s1, s8
4612 ; CHECK-MVE-NEXT: vminnm.f32 s15, s15, s6
4613 ; CHECK-MVE-NEXT: vcvt.s32.f32 s16, s16
4614 ; CHECK-MVE-NEXT: vmaxnm.f32 s8, s2, s8
4615 ; CHECK-MVE-NEXT: vminnm.f32 s10, s10, s6
4616 ; CHECK-MVE-NEXT: vminnm.f32 s14, s14, s6
4617 ; CHECK-MVE-NEXT: vminnm.f32 s5, s5, s6
4618 ; CHECK-MVE-NEXT: vminnm.f32 s9, s9, s6
4619 ; CHECK-MVE-NEXT: vminnm.f32 s11, s11, s6
4620 ; CHECK-MVE-NEXT: vminnm.f32 s6, s8, s6
4621 ; CHECK-MVE-NEXT: vcvt.s32.f32 s15, s15
4622 ; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s6
4623 ; CHECK-MVE-NEXT: vcvt.s32.f32 s9, s9
4624 ; CHECK-MVE-NEXT: vcvt.s32.f32 s11, s11
4625 ; CHECK-MVE-NEXT: vcvt.s32.f32 s14, s14
4626 ; CHECK-MVE-NEXT: vcvt.s32.f32 s5, s5
4627 ; CHECK-MVE-NEXT: vcvt.s32.f32 s10, s10
4628 ; CHECK-MVE-NEXT: vcmp.f32 s3, s3
4629 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4630 ; CHECK-MVE-NEXT: vmov r12, s16
4631 ; CHECK-MVE-NEXT: vcmp.f32 s13, s13
4632 ; CHECK-MVE-NEXT: it vs
4633 ; CHECK-MVE-NEXT: movvs.w r12, #0
4634 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4635 ; CHECK-MVE-NEXT: vmov lr, s15
4636 ; CHECK-MVE-NEXT: vcmp.f32 s2, s2
4637 ; CHECK-MVE-NEXT: it vs
4638 ; CHECK-MVE-NEXT: movvs.w lr, #0
4639 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4640 ; CHECK-MVE-NEXT: vmov r2, s6
4641 ; CHECK-MVE-NEXT: vcmp.f32 s7, s7
4642 ; CHECK-MVE-NEXT: it vs
4643 ; CHECK-MVE-NEXT: movvs r2, #0
4644 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4645 ; CHECK-MVE-NEXT: vmov r3, s9
4646 ; CHECK-MVE-NEXT: vcmp.f32 s1, s1
4647 ; CHECK-MVE-NEXT: it vs
4648 ; CHECK-MVE-NEXT: movvs r3, #0
4649 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4650 ; CHECK-MVE-NEXT: vmov r0, s11
4651 ; CHECK-MVE-NEXT: vcmp.f32 s12, s12
4652 ; CHECK-MVE-NEXT: it vs
4653 ; CHECK-MVE-NEXT: movvs r0, #0
4654 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4655 ; CHECK-MVE-NEXT: vmov r1, s14
4656 ; CHECK-MVE-NEXT: vmov r4, s5
4657 ; CHECK-MVE-NEXT: it vs
4658 ; CHECK-MVE-NEXT: movvs r1, #0
4659 ; CHECK-MVE-NEXT: vcmp.f32 s0, s0
4660 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4661 ; CHECK-MVE-NEXT: it vs
4662 ; CHECK-MVE-NEXT: movvs r4, #0
4663 ; CHECK-MVE-NEXT: vcmp.f32 s4, s4
4664 ; CHECK-MVE-NEXT: vmov.16 q0[0], r4
4665 ; CHECK-MVE-NEXT: vmov r5, s10
4666 ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
4667 ; CHECK-MVE-NEXT: it vs
4668 ; CHECK-MVE-NEXT: movvs r5, #0
4669 ; CHECK-MVE-NEXT: vmov.16 q0[1], r5
4670 ; CHECK-MVE-NEXT: vmov.16 q0[2], r0
4671 ; CHECK-MVE-NEXT: vmov.16 q0[3], r1
4672 ; CHECK-MVE-NEXT: vmov.16 q0[4], r2
4673 ; CHECK-MVE-NEXT: vmov.16 q0[5], r3
4674 ; CHECK-MVE-NEXT: vmov.16 q0[6], r12
4675 ; CHECK-MVE-NEXT: vmov.16 q0[7], lr
4676 ; CHECK-MVE-NEXT: vpop {d8}
4677 ; CHECK-MVE-NEXT: pop {r4, r5, r7, pc}
4678 ; CHECK-MVE-NEXT: .p2align 2
4679 ; CHECK-MVE-NEXT: @ %bb.1:
4680 ; CHECK-MVE-NEXT: .LCPI45_0:
4681 ; CHECK-MVE-NEXT: .long 0x46fffe00 @ float 32767
4682 ; CHECK-MVE-NEXT: .LCPI45_1:
4683 ; CHECK-MVE-NEXT: .long 0xc7000000 @ float -32768
4684 ;
4685 ; CHECK-MVEFP-LABEL: test_signed_v8f16_v8i16:
4686 ; CHECK-MVEFP: @ %bb.0:
4687 ; CHECK-MVEFP-NEXT: vcvt.s16.f16 q0, q0
4688 ; CHECK-MVEFP-NEXT: bx lr
4689 %x = call <8 x i16> @llvm.fptosi.sat.v8f16.v8i16(<8 x half> %f)
4690 ret <8 x i16> %x
4691 }
4693 define arm_aapcs_vfpcc <8 x i19> @test_signed_v8f16_v8i19(<8 x half> %f) {
4694 ; CHECK-LABEL: test_signed_v8f16_v8i19:
4695 ; CHECK: @ %bb.0:
4696 ; CHECK-NEXT: .save {r4, r5, r7, r9, r11, lr}
4697 ; CHECK-NEXT: push.w {r4, r5, r7, r9, r11, lr}
4698 ; CHECK-NEXT: vldr s4, .LCPI46_0
4699 ; CHECK-NEXT: vcvtb.f32.f16 s8, s1
4700 ; CHECK-NEXT: vcvtt.f32.f16 s12, s1
4701 ; CHECK-NEXT: vcvtt.f32.f16 s1, s0
4702 ; CHECK-NEXT: vldr s6, .LCPI46_1
4703 ; CHECK-NEXT: vmaxnm.f32 s5, s1, s4
4704 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
4705 ; CHECK-NEXT: vmaxnm.f32 s14, s12, s4
4706 ; CHECK-NEXT: vminnm.f32 s5, s5, s6
4707 ; CHECK-NEXT: vmaxnm.f32 s7, s0, s4
4708 ; CHECK-NEXT: vminnm.f32 s7, s7, s6
4709 ; CHECK-NEXT: vcvt.s32.f32 s5, s5
4710 ; CHECK-NEXT: vcvt.s32.f32 s7, s7
4711 ; CHECK-NEXT: vminnm.f32 s14, s14, s6
4712 ; CHECK-NEXT: vcvt.s32.f32 s14, s14
4713 ; CHECK-NEXT: vmaxnm.f32 s10, s8, s4
4714 ; CHECK-NEXT: vminnm.f32 s10, s10, s6
4715 ; CHECK-NEXT: vcmp.f32 s1, s1
4716 ; CHECK-NEXT: vcvt.s32.f32 s10, s10
4717 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4718 ; CHECK-NEXT: vcmp.f32 s0, s0
4719 ; CHECK-NEXT: mov.w r7, #0
4720 ; CHECK-NEXT: vcvtb.f32.f16 s0, s2
4721 ; CHECK-NEXT: mov.w r9, #0
4722 ; CHECK-NEXT: vmov r2, s5
4723 ; CHECK-NEXT: mov.w r5, #0
4724 ; CHECK-NEXT: it vs
4725 ; CHECK-NEXT: movvs r2, #0
4726 ; CHECK-NEXT: vmov r1, s7
4727 ; CHECK-NEXT: bfc r2, #19, #13
4728 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4729 ; CHECK-NEXT: it vs
4730 ; CHECK-NEXT: movvs r1, #0
4731 ; CHECK-NEXT: vcmp.f32 s12, s12
4732 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4733 ; CHECK-NEXT: vcmp.f32 s8, s8
4734 ; CHECK-NEXT: lsll r2, r7, #19
4735 ; CHECK-NEXT: bfc r1, #19, #13
4736 ; CHECK-NEXT: vmov r12, s14
4737 ; CHECK-NEXT: vmaxnm.f32 s8, s0, s4
4738 ; CHECK-NEXT: orr.w r1, r1, r2
4739 ; CHECK-NEXT: str r1, [r0]
4740 ; CHECK-NEXT: it vs
4741 ; CHECK-NEXT: movvs.w r12, #0
4742 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4743 ; CHECK-NEXT: vcmp.f32 s0, s0
4744 ; CHECK-NEXT: vcvtt.f32.f16 s0, s2
4745 ; CHECK-NEXT: vmaxnm.f32 s2, s0, s4
4746 ; CHECK-NEXT: vminnm.f32 s8, s8, s6
4747 ; CHECK-NEXT: vminnm.f32 s2, s2, s6
4748 ; CHECK-NEXT: vmov r3, s10
4749 ; CHECK-NEXT: vcvt.s32.f32 s2, s2
4750 ; CHECK-NEXT: it vs
4751 ; CHECK-NEXT: movvs r3, #0
4752 ; CHECK-NEXT: vcvt.s32.f32 s8, s8
4753 ; CHECK-NEXT: bfc r3, #19, #13
4754 ; CHECK-NEXT: mov r2, r12
4755 ; CHECK-NEXT: movs r1, #0
4756 ; CHECK-NEXT: bfc r2, #19, #13
4757 ; CHECK-NEXT: mov r4, r3
4758 ; CHECK-NEXT: lsrl r2, r1, #7
4759 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4760 ; CHECK-NEXT: vcmp.f32 s0, s0
4761 ; CHECK-NEXT: lsrl r4, r9, #26
4762 ; CHECK-NEXT: vcvtt.f32.f16 s0, s3
4763 ; CHECK-NEXT: mov lr, r1
4764 ; CHECK-NEXT: orr.w r1, r4, r2
4765 ; CHECK-NEXT: vmov r4, s2
4766 ; CHECK-NEXT: vmaxnm.f32 s2, s0, s4
4767 ; CHECK-NEXT: vmov r2, s8
4768 ; CHECK-NEXT: vminnm.f32 s2, s2, s6
4769 ; CHECK-NEXT: it vs
4770 ; CHECK-NEXT: movvs r2, #0
4771 ; CHECK-NEXT: vcvt.s32.f32 s2, s2
4772 ; CHECK-NEXT: bfc r2, #19, #13
4773 ; CHECK-NEXT: lsll r2, r5, #12
4774 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4775 ; CHECK-NEXT: it vs
4776 ; CHECK-NEXT: movvs r4, #0
4777 ; CHECK-NEXT: orrs r2, r1
4778 ; CHECK-NEXT: bfc r4, #19, #13
4779 ; CHECK-NEXT: movs r1, #0
4780 ; CHECK-NEXT: lsll r4, r1, #31
4781 ; CHECK-NEXT: vcmp.f32 s0, s0
4782 ; CHECK-NEXT: orrs r2, r4
4783 ; CHECK-NEXT: str r2, [r0, #8]
4784 ; CHECK-NEXT: orr.w r2, r7, r3, lsl #6
4785 ; CHECK-NEXT: vcvtb.f32.f16 s0, s3
4786 ; CHECK-NEXT: orr.w r3, r2, r12, lsl #25
4787 ; CHECK-NEXT: vmov r2, s2
4788 ; CHECK-NEXT: vmaxnm.f32 s2, s0, s4
4789 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4790 ; CHECK-NEXT: vminnm.f32 s2, s2, s6
4791 ; CHECK-NEXT: it vs
4792 ; CHECK-NEXT: movvs r2, #0
4793 ; CHECK-NEXT: vcvt.s32.f32 s2, s2
4794 ; CHECK-NEXT: bfc r2, #19, #13
4795 ; CHECK-NEXT: movs r7, #0
4796 ; CHECK-NEXT: vcmp.f32 s0, s0
4797 ; CHECK-NEXT: lsll r2, r7, #5
4798 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4799 ; CHECK-NEXT: mov.w r11, #0
4800 ; CHECK-NEXT: vmov r7, s2
4801 ; CHECK-NEXT: it vs
4802 ; CHECK-NEXT: movvs r7, #0
4803 ; CHECK-NEXT: mov r4, r7
4804 ; CHECK-NEXT: bfc r4, #19, #13
4805 ; CHECK-NEXT: lsrl r4, r11, #14
4806 ; CHECK-NEXT: orrs r2, r4
4807 ; CHECK-NEXT: strh r2, [r0, #16]
4808 ; CHECK-NEXT: str r3, [r0, #4]
4809 ; CHECK-NEXT: lsrs r2, r2, #16
4810 ; CHECK-NEXT: strb r2, [r0, #18]
4811 ; CHECK-NEXT: orr.w r2, r9, lr
4812 ; CHECK-NEXT: orrs r2, r5
4813 ; CHECK-NEXT: orrs r1, r2
4814 ; CHECK-NEXT: orr.w r1, r1, r7, lsl #18
4815 ; CHECK-NEXT: str r1, [r0, #12]
4816 ; CHECK-NEXT: pop.w {r4, r5, r7, r9, r11, pc}
4817 ; CHECK-NEXT: .p2align 2
4818 ; CHECK-NEXT: @ %bb.1:
4819 ; CHECK-NEXT: .LCPI46_0:
4820 ; CHECK-NEXT: .long 0xc8800000 @ float -262144
4821 ; CHECK-NEXT: .LCPI46_1:
4822 ; CHECK-NEXT: .long 0x487fffc0 @ float 262143
4823 %x = call <8 x i19> @llvm.fptosi.sat.v8f16.v8i19(<8 x half> %f)
4824 ret <8 x i19> %x
4825 }
4827 define arm_aapcs_vfpcc <8 x i32> @test_signed_v8f16_v8i32_duplicate(<8 x half> %f) {
4828 ; CHECK-LABEL: test_signed_v8f16_v8i32_duplicate:
4829 ; CHECK: @ %bb.0:
4830 ; CHECK-NEXT: vmovx.f16 s4, s3
4831 ; CHECK-NEXT: vmovx.f16 s6, s0
4832 ; CHECK-NEXT: vcvt.s32.f16 s8, s4
4833 ; CHECK-NEXT: vmovx.f16 s4, s2
4834 ; CHECK-NEXT: vcvt.s32.f16 s10, s4
4835 ; CHECK-NEXT: vmovx.f16 s4, s1
4836 ; CHECK-NEXT: vcvt.s32.f16 s14, s2
4837 ; CHECK-NEXT: vcvt.s32.f16 s2, s1
4838 ; CHECK-NEXT: vcvt.s32.f16 s0, s0
4839 ; CHECK-NEXT: vcvt.s32.f16 s4, s4
4840 ; CHECK-NEXT: vcvt.s32.f16 s6, s6
4841 ; CHECK-NEXT: vmov r0, s2
4842 ; CHECK-NEXT: vmov r1, s0
4843 ; CHECK-NEXT: vcvt.s32.f16 s12, s3
4844 ; CHECK-NEXT: vmov q0[2], q0[0], r1, r0
4845 ; CHECK-NEXT: vmov r0, s4
4846 ; CHECK-NEXT: vmov r1, s6
4847 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r0
4848 ; CHECK-NEXT: vmov r0, s12
4849 ; CHECK-NEXT: vmov r1, s14
4850 ; CHECK-NEXT: vmov q1[2], q1[0], r1, r0
4851 ; CHECK-NEXT: vmov r0, s8
4852 ; CHECK-NEXT: vmov r1, s10
4853 ; CHECK-NEXT: vmov q1[3], q1[1], r1, r0
4854 ; CHECK-NEXT: bx lr
4855 %x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f)
4856 ret <8 x i32> %x
4857 }
4859 define arm_aapcs_vfpcc <8 x i50> @test_signed_v8f16_v8i50(<8 x half> %f) {
4860 ; CHECK-LABEL: test_signed_v8f16_v8i50:
4861 ; CHECK: @ %bb.0:
4862 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
4863 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
4864 ; CHECK-NEXT: .pad #4
4865 ; CHECK-NEXT: sub sp, #4
4866 ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}
4867 ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}
4868 ; CHECK-NEXT: vmov q4, q0
4869 ; CHECK-NEXT: mov r9, r0
4870 ; CHECK-NEXT: vcvtt.f32.f16 s30, s19
4871 ; CHECK-NEXT: vmov r0, s30
4872 ; CHECK-NEXT: bl __aeabi_f2lz
4873 ; CHECK-NEXT: vcvtb.f32.f16 s26, s18
4874 ; CHECK-NEXT: mov r4, r0
4875 ; CHECK-NEXT: vmov r0, s26
4876 ; CHECK-NEXT: vldr s24, .LCPI48_1
4877 ; CHECK-NEXT: vcvtb.f32.f16 s20, s16
4878 ; CHECK-NEXT: vcvtb.f32.f16 s28, s19
4879 ; CHECK-NEXT: vcmp.f32 s30, s24
4880 ; CHECK-NEXT: mov r5, r1
4881 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4882 ; CHECK-NEXT: vmov r7, s20
4883 ; CHECK-NEXT: vldr s22, .LCPI48_0
4884 ; CHECK-NEXT: vmov r6, s28
4885 ; CHECK-NEXT: itt lt
4886 ; CHECK-NEXT: movlt r5, #0
4887 ; CHECK-NEXT: movtlt r5, #65534
4888 ; CHECK-NEXT: bl __aeabi_f2lz
4889 ; CHECK-NEXT: vcmp.f32 s26, s24
4890 ; CHECK-NEXT: mov r10, r1
4891 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4892 ; CHECK-NEXT: vcmp.f32 s30, s22
4893 ; CHECK-NEXT: it lt
4894 ; CHECK-NEXT: movlt r0, #0
4895 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4896 ; CHECK-NEXT: vcmp.f32 s26, s22
4897 ; CHECK-NEXT: itt gt
4898 ; CHECK-NEXT: movwgt r5, #65535
4899 ; CHECK-NEXT: movtgt r5, #1
4900 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4901 ; CHECK-NEXT: it gt
4902 ; CHECK-NEXT: movgt.w r0, #-1
4903 ; CHECK-NEXT: vcmp.f32 s26, s26
4904 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4905 ; CHECK-NEXT: it vs
4906 ; CHECK-NEXT: movvs r0, #0
4907 ; CHECK-NEXT: str.w r0, [r9, #25]
4908 ; CHECK-NEXT: mov r0, r7
4909 ; CHECK-NEXT: bl __aeabi_f2lz
4910 ; CHECK-NEXT: vcmp.f32 s20, s24
4911 ; CHECK-NEXT: mov r8, r1
4912 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4913 ; CHECK-NEXT: vcmp.f32 s20, s22
4914 ; CHECK-NEXT: it lt
4915 ; CHECK-NEXT: movlt r0, #0
4916 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4917 ; CHECK-NEXT: vcmp.f32 s20, s20
4918 ; CHECK-NEXT: it gt
4919 ; CHECK-NEXT: movgt.w r0, #-1
4920 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4921 ; CHECK-NEXT: vcmp.f32 s30, s24
4922 ; CHECK-NEXT: it vs
4923 ; CHECK-NEXT: movvs r0, #0
4924 ; CHECK-NEXT: str.w r0, [r9]
4925 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4926 ; CHECK-NEXT: it lt
4927 ; CHECK-NEXT: movlt r4, #0
4928 ; CHECK-NEXT: vcmp.f32 s30, s22
4929 ; CHECK-NEXT: mov r0, r6
4930 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4931 ; CHECK-NEXT: it gt
4932 ; CHECK-NEXT: movgt.w r4, #-1
4933 ; CHECK-NEXT: vcmp.f32 s30, s30
4934 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4935 ; CHECK-NEXT: itt vs
4936 ; CHECK-NEXT: movvs r4, #0
4937 ; CHECK-NEXT: movvs r5, #0
4938 ; CHECK-NEXT: mov r7, r5
4939 ; CHECK-NEXT: bfc r7, #18, #14
4940 ; CHECK-NEXT: lsll r4, r7, #22
4941 ; CHECK-NEXT: bl __aeabi_f2lz
4942 ; CHECK-NEXT: vcmp.f32 s28, s24
4943 ; CHECK-NEXT: mov r6, r0
4944 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4945 ; CHECK-NEXT: vcmp.f32 s28, s22
4946 ; CHECK-NEXT: it lt
4947 ; CHECK-NEXT: movlt r6, #0
4948 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4949 ; CHECK-NEXT: vcmp.f32 s28, s28
4950 ; CHECK-NEXT: it gt
4951 ; CHECK-NEXT: movgt.w r6, #-1
4952 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4953 ; CHECK-NEXT: vcmp.f32 s28, s24
4954 ; CHECK-NEXT: it vs
4955 ; CHECK-NEXT: movvs r6, #0
4956 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4957 ; CHECK-NEXT: itt lt
4958 ; CHECK-NEXT: movlt r1, #0
4959 ; CHECK-NEXT: movtlt r1, #65534
4960 ; CHECK-NEXT: vcmp.f32 s28, s22
4961 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4962 ; CHECK-NEXT: vcmp.f32 s28, s28
4963 ; CHECK-NEXT: itt gt
4964 ; CHECK-NEXT: movwgt r1, #65535
4965 ; CHECK-NEXT: movtgt r1, #1
4966 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4967 ; CHECK-NEXT: it vs
4968 ; CHECK-NEXT: movvs r1, #0
4969 ; CHECK-NEXT: mov r2, r6
4970 ; CHECK-NEXT: bfc r1, #18, #14
4971 ; CHECK-NEXT: vcvtt.f32.f16 s28, s18
4972 ; CHECK-NEXT: lsrl r2, r1, #28
4973 ; CHECK-NEXT: orr.w r0, r1, r7
4974 ; CHECK-NEXT: str.w r0, [r9, #45]
4975 ; CHECK-NEXT: vmov r0, s28
4976 ; CHECK-NEXT: orrs r4, r2
4977 ; CHECK-NEXT: bl __aeabi_f2lz
4978 ; CHECK-NEXT: vcmp.f32 s28, s24
4979 ; CHECK-NEXT: mov r7, r0
4980 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4981 ; CHECK-NEXT: itt lt
4982 ; CHECK-NEXT: movlt r1, #0
4983 ; CHECK-NEXT: movtlt r1, #65534
4984 ; CHECK-NEXT: vcmp.f32 s28, s22
4985 ; CHECK-NEXT: vcvtb.f32.f16 s18, s17
4986 ; CHECK-NEXT: lsrs r0, r5, #10
4987 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4988 ; CHECK-NEXT: itt gt
4989 ; CHECK-NEXT: movwgt r1, #65535
4990 ; CHECK-NEXT: movtgt r1, #1
4991 ; CHECK-NEXT: str.w r4, [r9, #41]
4992 ; CHECK-NEXT: strb.w r0, [r9, #49]
4993 ; CHECK-NEXT: vmov r0, s18
4994 ; CHECK-NEXT: vcmp.f32 s28, s24
4995 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
4996 ; CHECK-NEXT: it lt
4997 ; CHECK-NEXT: movlt r7, #0
4998 ; CHECK-NEXT: vcmp.f32 s28, s22
4999 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5000 ; CHECK-NEXT: it gt
5001 ; CHECK-NEXT: movgt.w r7, #-1
5002 ; CHECK-NEXT: vcmp.f32 s28, s28
5003 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5004 ; CHECK-NEXT: itt vs
5005 ; CHECK-NEXT: movvs r7, #0
5006 ; CHECK-NEXT: movvs r1, #0
5007 ; CHECK-NEXT: bfc r1, #18, #14
5008 ; CHECK-NEXT: mov r4, r7
5009 ; CHECK-NEXT: lsrl r4, r1, #14
5010 ; CHECK-NEXT: orr.w r6, r1, r6, lsl #4
5011 ; CHECK-NEXT: bl __aeabi_f2lz
5012 ; CHECK-NEXT: vcvtt.f32.f16 s28, s17
5013 ; CHECK-NEXT: mov r11, r0
5014 ; CHECK-NEXT: vmov r0, s28
5015 ; CHECK-NEXT: mov r5, r1
5016 ; CHECK-NEXT: vcmp.f32 s18, s24
5017 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5018 ; CHECK-NEXT: itt lt
5019 ; CHECK-NEXT: movlt r5, #0
5020 ; CHECK-NEXT: movtlt r5, #65534
5021 ; CHECK-NEXT: vcmp.f32 s18, s22
5022 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5023 ; CHECK-NEXT: itt gt
5024 ; CHECK-NEXT: movwgt r5, #65535
5025 ; CHECK-NEXT: movtgt r5, #1
5026 ; CHECK-NEXT: str.w r6, [r9, #37]
5027 ; CHECK-NEXT: str.w r4, [r9, #33]
5028 ; CHECK-NEXT: bl __aeabi_f2lz
5029 ; CHECK-NEXT: vcmp.f32 s28, s24
5030 ; CHECK-NEXT: mov r4, r1
5031 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5032 ; CHECK-NEXT: vcmp.f32 s28, s22
5033 ; CHECK-NEXT: itt lt
5034 ; CHECK-NEXT: movlt r4, #0
5035 ; CHECK-NEXT: movtlt r4, #65534
5036 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5037 ; CHECK-NEXT: vcmp.f32 s26, s24
5038 ; CHECK-NEXT: itt gt
5039 ; CHECK-NEXT: movwgt r4, #65535
5040 ; CHECK-NEXT: movtgt r4, #1
5041 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5042 ; CHECK-NEXT: itt lt
5043 ; CHECK-NEXT: movwlt r10, #0
5044 ; CHECK-NEXT: movtlt r10, #65534
5045 ; CHECK-NEXT: vcmp.f32 s26, s22
5046 ; CHECK-NEXT: mov r6, r0
5047 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5048 ; CHECK-NEXT: itt gt
5049 ; CHECK-NEXT: movwgt r10, #65535
5050 ; CHECK-NEXT: movtgt r10, #1
5051 ; CHECK-NEXT: vcmp.f32 s26, s26
5052 ; CHECK-NEXT: vcvtt.f32.f16 s16, s16
5053 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5054 ; CHECK-NEXT: it vs
5055 ; CHECK-NEXT: movvs.w r10, #0
5056 ; CHECK-NEXT: bfc r10, #18, #14
5057 ; CHECK-NEXT: vcmp.f32 s28, s24
5058 ; CHECK-NEXT: orr.w r0, r10, r7, lsl #18
5059 ; CHECK-NEXT: str.w r0, [r9, #29]
5060 ; CHECK-NEXT: vmov r0, s16
5061 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5062 ; CHECK-NEXT: vcmp.f32 s28, s22
5063 ; CHECK-NEXT: it lt
5064 ; CHECK-NEXT: movlt r6, #0
5065 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5066 ; CHECK-NEXT: vcmp.f32 s28, s28
5067 ; CHECK-NEXT: it gt
5068 ; CHECK-NEXT: movgt.w r6, #-1
5069 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5070 ; CHECK-NEXT: vcmp.f32 s18, s24
5071 ; CHECK-NEXT: itt vs
5072 ; CHECK-NEXT: movvs r6, #0
5073 ; CHECK-NEXT: movvs r4, #0
5074 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5075 ; CHECK-NEXT: it lt
5076 ; CHECK-NEXT: movlt.w r11, #0
5077 ; CHECK-NEXT: vcmp.f32 s18, s22
5078 ; CHECK-NEXT: mov r1, r4
5079 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5080 ; CHECK-NEXT: it gt
5081 ; CHECK-NEXT: movgt.w r11, #-1
5082 ; CHECK-NEXT: vcmp.f32 s18, s18
5083 ; CHECK-NEXT: bfc r1, #18, #14
5084 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5085 ; CHECK-NEXT: itt vs
5086 ; CHECK-NEXT: movvs.w r11, #0
5087 ; CHECK-NEXT: movvs r5, #0
5088 ; CHECK-NEXT: vcmp.f32 s20, s24
5089 ; CHECK-NEXT: bfc r5, #18, #14
5090 ; CHECK-NEXT: mov r10, r11
5091 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5092 ; CHECK-NEXT: lsll r6, r1, #22
5093 ; CHECK-NEXT: lsrl r10, r5, #28
5094 ; CHECK-NEXT: itt lt
5095 ; CHECK-NEXT: movwlt r8, #0
5096 ; CHECK-NEXT: movtlt r8, #65534
5097 ; CHECK-NEXT: vcmp.f32 s20, s22
5098 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5099 ; CHECK-NEXT: itt gt
5100 ; CHECK-NEXT: movwgt r8, #65535
5101 ; CHECK-NEXT: movtgt r8, #1
5102 ; CHECK-NEXT: orrs r1, r5
5103 ; CHECK-NEXT: str.w r1, [r9, #20]
5104 ; CHECK-NEXT: bl __aeabi_f2lz
5105 ; CHECK-NEXT: vcmp.f32 s16, s24
5106 ; CHECK-NEXT: orr.w r2, r10, r6
5107 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5108 ; CHECK-NEXT: itt lt
5109 ; CHECK-NEXT: movlt r1, #0
5110 ; CHECK-NEXT: movtlt r1, #65534
5111 ; CHECK-NEXT: vcmp.f32 s16, s22
5112 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5113 ; CHECK-NEXT: itt gt
5114 ; CHECK-NEXT: movwgt r1, #65535
5115 ; CHECK-NEXT: movtgt r1, #1
5116 ; CHECK-NEXT: str.w r2, [r9, #16]
5117 ; CHECK-NEXT: lsrs r2, r4, #10
5118 ; CHECK-NEXT: vcmp.f32 s16, s24
5119 ; CHECK-NEXT: strb.w r2, [r9, #24]
5120 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5121 ; CHECK-NEXT: it lt
5122 ; CHECK-NEXT: movlt r0, #0
5123 ; CHECK-NEXT: vcmp.f32 s16, s22
5124 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5125 ; CHECK-NEXT: it gt
5126 ; CHECK-NEXT: movgt.w r0, #-1
5127 ; CHECK-NEXT: vcmp.f32 s16, s16
5128 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5129 ; CHECK-NEXT: itt vs
5130 ; CHECK-NEXT: movvs r0, #0
5131 ; CHECK-NEXT: movvs r1, #0
5132 ; CHECK-NEXT: bfc r1, #18, #14
5133 ; CHECK-NEXT: mov r2, r0
5134 ; CHECK-NEXT: lsrl r2, r1, #14
5135 ; CHECK-NEXT: vcmp.f32 s20, s20
5136 ; CHECK-NEXT: orr.w r1, r1, r11, lsl #4
5137 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5138 ; CHECK-NEXT: strd r2, r1, [r9, #8]
5139 ; CHECK-NEXT: it vs
5140 ; CHECK-NEXT: movvs.w r8, #0
5141 ; CHECK-NEXT: bfc r8, #18, #14
5142 ; CHECK-NEXT: orr.w r0, r8, r0, lsl #18
5143 ; CHECK-NEXT: str.w r0, [r9, #4]
5144 ; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}
5145 ; CHECK-NEXT: add sp, #4
5146 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
5147 ; CHECK-NEXT: .p2align 2
5148 ; CHECK-NEXT: @ %bb.1:
5149 ; CHECK-NEXT: .LCPI48_0:
5150 ; CHECK-NEXT: .long 0x57ffffff @ float 5.6294992E+14
5151 ; CHECK-NEXT: .LCPI48_1:
5152 ; CHECK-NEXT: .long 0xd8000000 @ float -5.62949953E+14
5153 %x = call <8 x i50> @llvm.fptosi.sat.v8f16.v8i50(<8 x half> %f)
5154 ret <8 x i50> %x
5155 }
5157 define arm_aapcs_vfpcc <8 x i64> @test_signed_v8f16_v8i64(<8 x half> %f) {
5158 ; CHECK-LABEL: test_signed_v8f16_v8i64:
5159 ; CHECK: @ %bb.0:
5160 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
5161 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
5162 ; CHECK-NEXT: .pad #4
5163 ; CHECK-NEXT: sub sp, #4
5164 ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}
5165 ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}
5166 ; CHECK-NEXT: vmov q4, q0
5167 ; CHECK-NEXT: vcvtt.f32.f16 s20, s19
5168 ; CHECK-NEXT: vmov r0, s20
5169 ; CHECK-NEXT: bl __aeabi_f2lz
5170 ; CHECK-NEXT: vcvtb.f32.f16 s22, s19
5171 ; CHECK-NEXT: mov r9, r0
5172 ; CHECK-NEXT: vmov r0, s22
5173 ; CHECK-NEXT: vldr s30, .LCPI49_1
5174 ; CHECK-NEXT: vldr s28, .LCPI49_0
5175 ; CHECK-NEXT: vcvtb.f32.f16 s24, s16
5176 ; CHECK-NEXT: vcmp.f32 s20, s30
5177 ; CHECK-NEXT: vcvtt.f32.f16 s16, s16
5178 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5179 ; CHECK-NEXT: it lt
5180 ; CHECK-NEXT: movlt.w r9, #0
5181 ; CHECK-NEXT: vcmp.f32 s20, s28
5182 ; CHECK-NEXT: mov r8, r1
5183 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5184 ; CHECK-NEXT: it gt
5185 ; CHECK-NEXT: movgt.w r9, #-1
5186 ; CHECK-NEXT: vcmp.f32 s20, s20
5187 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5188 ; CHECK-NEXT: vmov r4, s24
5189 ; CHECK-NEXT: vmov r5, s16
5190 ; CHECK-NEXT: it vs
5191 ; CHECK-NEXT: movvs.w r9, #0
5192 ; CHECK-NEXT: bl __aeabi_f2lz
5193 ; CHECK-NEXT: vcmp.f32 s22, s30
5194 ; CHECK-NEXT: mov r11, r0
5195 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5196 ; CHECK-NEXT: vcmp.f32 s22, s28
5197 ; CHECK-NEXT: it lt
5198 ; CHECK-NEXT: movlt.w r11, #0
5199 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5200 ; CHECK-NEXT: vcmp.f32 s22, s22
5201 ; CHECK-NEXT: it gt
5202 ; CHECK-NEXT: movgt.w r11, #-1
5203 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5204 ; CHECK-NEXT: vcmp.f32 s20, s30
5205 ; CHECK-NEXT: it vs
5206 ; CHECK-NEXT: movvs.w r11, #0
5207 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5208 ; CHECK-NEXT: vcmp.f32 s20, s28
5209 ; CHECK-NEXT: it lt
5210 ; CHECK-NEXT: movlt.w r8, #-2147483648
5211 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5212 ; CHECK-NEXT: vcmp.f32 s20, s20
5213 ; CHECK-NEXT: it gt
5214 ; CHECK-NEXT: mvngt r8, #-2147483648
5215 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5216 ; CHECK-NEXT: mov r10, r1
5217 ; CHECK-NEXT: vcmp.f32 s22, s30
5218 ; CHECK-NEXT: it vs
5219 ; CHECK-NEXT: movvs.w r8, #0
5220 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5221 ; CHECK-NEXT: it lt
5222 ; CHECK-NEXT: movlt.w r10, #-2147483648
5223 ; CHECK-NEXT: vcmp.f32 s22, s28
5224 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5225 ; CHECK-NEXT: mov r0, r5
5226 ; CHECK-NEXT: it gt
5227 ; CHECK-NEXT: mvngt r10, #-2147483648
5228 ; CHECK-NEXT: vcmp.f32 s22, s22
5229 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5230 ; CHECK-NEXT: it vs
5231 ; CHECK-NEXT: movvs.w r10, #0
5232 ; CHECK-NEXT: bl __aeabi_f2lz
5233 ; CHECK-NEXT: mov r6, r0
5234 ; CHECK-NEXT: vcmp.f32 s16, s30
5235 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5236 ; CHECK-NEXT: it lt
5237 ; CHECK-NEXT: movlt r6, #0
5238 ; CHECK-NEXT: vcmp.f32 s16, s28
5239 ; CHECK-NEXT: mov r0, r4
5240 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5241 ; CHECK-NEXT: it gt
5242 ; CHECK-NEXT: movgt.w r6, #-1
5243 ; CHECK-NEXT: vcmp.f32 s16, s16
5244 ; CHECK-NEXT: mov r5, r1
5245 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5246 ; CHECK-NEXT: it vs
5247 ; CHECK-NEXT: movvs r6, #0
5248 ; CHECK-NEXT: bl __aeabi_f2lz
5249 ; CHECK-NEXT: vcvtt.f32.f16 s19, s17
5250 ; CHECK-NEXT: mov r7, r1
5251 ; CHECK-NEXT: vmov r1, s19
5252 ; CHECK-NEXT: vcmp.f32 s24, s30
5253 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5254 ; CHECK-NEXT: it lt
5255 ; CHECK-NEXT: movlt r0, #0
5256 ; CHECK-NEXT: vcmp.f32 s24, s28
5257 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5258 ; CHECK-NEXT: it gt
5259 ; CHECK-NEXT: movgt.w r0, #-1
5260 ; CHECK-NEXT: vcmp.f32 s24, s24
5261 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5262 ; CHECK-NEXT: it vs
5263 ; CHECK-NEXT: movvs r0, #0
5264 ; CHECK-NEXT: vmov q5[2], q5[0], r0, r6
5265 ; CHECK-NEXT: mov r0, r1
5266 ; CHECK-NEXT: bl __aeabi_f2lz
5267 ; CHECK-NEXT: vcvtb.f32.f16 s17, s17
5268 ; CHECK-NEXT: mov r6, r0
5269 ; CHECK-NEXT: vmov r0, s17
5270 ; CHECK-NEXT: mov r4, r1
5271 ; CHECK-NEXT: vcmp.f32 s19, s30
5272 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5273 ; CHECK-NEXT: vcmp.f32 s19, s28
5274 ; CHECK-NEXT: it lt
5275 ; CHECK-NEXT: movlt r6, #0
5276 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5277 ; CHECK-NEXT: vcmp.f32 s19, s19
5278 ; CHECK-NEXT: it gt
5279 ; CHECK-NEXT: movgt.w r6, #-1
5280 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5281 ; CHECK-NEXT: vcmp.f32 s16, s30
5282 ; CHECK-NEXT: it vs
5283 ; CHECK-NEXT: movvs r6, #0
5284 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5285 ; CHECK-NEXT: vcmp.f32 s16, s28
5286 ; CHECK-NEXT: it lt
5287 ; CHECK-NEXT: movlt.w r5, #-2147483648
5288 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5289 ; CHECK-NEXT: vcmp.f32 s16, s16
5290 ; CHECK-NEXT: it gt
5291 ; CHECK-NEXT: mvngt r5, #-2147483648
5292 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5293 ; CHECK-NEXT: vcmp.f32 s24, s30
5294 ; CHECK-NEXT: it vs
5295 ; CHECK-NEXT: movvs r5, #0
5296 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5297 ; CHECK-NEXT: it lt
5298 ; CHECK-NEXT: movlt.w r7, #-2147483648
5299 ; CHECK-NEXT: vcmp.f32 s24, s28
5300 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5301 ; CHECK-NEXT: it gt
5302 ; CHECK-NEXT: mvngt r7, #-2147483648
5303 ; CHECK-NEXT: vcmp.f32 s24, s24
5304 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5305 ; CHECK-NEXT: it vs
5306 ; CHECK-NEXT: movvs r7, #0
5307 ; CHECK-NEXT: vmov q5[3], q5[1], r7, r5
5308 ; CHECK-NEXT: bl __aeabi_f2lz
5309 ; CHECK-NEXT: vcvtt.f32.f16 s16, s18
5310 ; CHECK-NEXT: mov r7, r1
5311 ; CHECK-NEXT: vmov r1, s16
5312 ; CHECK-NEXT: vcmp.f32 s17, s30
5313 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5314 ; CHECK-NEXT: it lt
5315 ; CHECK-NEXT: movlt r0, #0
5316 ; CHECK-NEXT: vcmp.f32 s17, s28
5317 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5318 ; CHECK-NEXT: it gt
5319 ; CHECK-NEXT: movgt.w r0, #-1
5320 ; CHECK-NEXT: vcmp.f32 s17, s17
5321 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5322 ; CHECK-NEXT: it vs
5323 ; CHECK-NEXT: movvs r0, #0
5324 ; CHECK-NEXT: vmov q6[2], q6[0], r0, r6
5325 ; CHECK-NEXT: mov r0, r1
5326 ; CHECK-NEXT: bl __aeabi_f2lz
5327 ; CHECK-NEXT: vcvtb.f32.f16 s18, s18
5328 ; CHECK-NEXT: mov r6, r0
5329 ; CHECK-NEXT: vmov r0, s18
5330 ; CHECK-NEXT: mov r5, r1
5331 ; CHECK-NEXT: vcmp.f32 s16, s30
5332 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5333 ; CHECK-NEXT: vcmp.f32 s16, s28
5334 ; CHECK-NEXT: it lt
5335 ; CHECK-NEXT: movlt r6, #0
5336 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5337 ; CHECK-NEXT: vcmp.f32 s16, s16
5338 ; CHECK-NEXT: it gt
5339 ; CHECK-NEXT: movgt.w r6, #-1
5340 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5341 ; CHECK-NEXT: vcmp.f32 s19, s30
5342 ; CHECK-NEXT: it vs
5343 ; CHECK-NEXT: movvs r6, #0
5344 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5345 ; CHECK-NEXT: vcmp.f32 s19, s28
5346 ; CHECK-NEXT: it lt
5347 ; CHECK-NEXT: movlt.w r4, #-2147483648
5348 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5349 ; CHECK-NEXT: vcmp.f32 s19, s19
5350 ; CHECK-NEXT: it gt
5351 ; CHECK-NEXT: mvngt r4, #-2147483648
5352 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5353 ; CHECK-NEXT: vcmp.f32 s17, s30
5354 ; CHECK-NEXT: it vs
5355 ; CHECK-NEXT: movvs r4, #0
5356 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5357 ; CHECK-NEXT: it lt
5358 ; CHECK-NEXT: movlt.w r7, #-2147483648
5359 ; CHECK-NEXT: vcmp.f32 s17, s28
5360 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5361 ; CHECK-NEXT: it gt
5362 ; CHECK-NEXT: mvngt r7, #-2147483648
5363 ; CHECK-NEXT: vcmp.f32 s17, s17
5364 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5365 ; CHECK-NEXT: it vs
5366 ; CHECK-NEXT: movvs r7, #0
5367 ; CHECK-NEXT: vmov q6[3], q6[1], r7, r4
5368 ; CHECK-NEXT: bl __aeabi_f2lz
5369 ; CHECK-NEXT: vcmp.f32 s18, s30
5370 ; CHECK-NEXT: vmov q3[2], q3[0], r11, r9
5371 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5372 ; CHECK-NEXT: vcmp.f32 s18, s28
5373 ; CHECK-NEXT: it lt
5374 ; CHECK-NEXT: movlt r0, #0
5375 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5376 ; CHECK-NEXT: vcmp.f32 s18, s18
5377 ; CHECK-NEXT: it gt
5378 ; CHECK-NEXT: movgt.w r0, #-1
5379 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5380 ; CHECK-NEXT: vcmp.f32 s16, s30
5381 ; CHECK-NEXT: it vs
5382 ; CHECK-NEXT: movvs r0, #0
5383 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5384 ; CHECK-NEXT: vcmp.f32 s16, s28
5385 ; CHECK-NEXT: it lt
5386 ; CHECK-NEXT: movlt.w r5, #-2147483648
5387 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5388 ; CHECK-NEXT: vcmp.f32 s16, s16
5389 ; CHECK-NEXT: it gt
5390 ; CHECK-NEXT: mvngt r5, #-2147483648
5391 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5392 ; CHECK-NEXT: vcmp.f32 s18, s30
5393 ; CHECK-NEXT: it vs
5394 ; CHECK-NEXT: movvs r5, #0
5395 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5396 ; CHECK-NEXT: it lt
5397 ; CHECK-NEXT: movlt.w r1, #-2147483648
5398 ; CHECK-NEXT: vcmp.f32 s18, s28
5399 ; CHECK-NEXT: vmov q2[2], q2[0], r0, r6
5400 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5401 ; CHECK-NEXT: it gt
5402 ; CHECK-NEXT: mvngt r1, #-2147483648
5403 ; CHECK-NEXT: vcmp.f32 s18, s18
5404 ; CHECK-NEXT: vmov q3[3], q3[1], r10, r8
5405 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5406 ; CHECK-NEXT: it vs
5407 ; CHECK-NEXT: movvs r1, #0
5408 ; CHECK-NEXT: vmov q2[3], q2[1], r1, r5
5409 ; CHECK-NEXT: vmov q0, q5
5410 ; CHECK-NEXT: vmov q1, q6
5411 ; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}
5412 ; CHECK-NEXT: add sp, #4
5413 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
5414 ; CHECK-NEXT: .p2align 2
5415 ; CHECK-NEXT: @ %bb.1:
5416 ; CHECK-NEXT: .LCPI49_0:
5417 ; CHECK-NEXT: .long 0x5effffff @ float 9.22337149E+18
5418 ; CHECK-NEXT: .LCPI49_1:
5419 ; CHECK-NEXT: .long 0xdf000000 @ float -9.22337203E+18
5420 %x = call <8 x i64> @llvm.fptosi.sat.v8f16.v8i64(<8 x half> %f)
5421 ret <8 x i64> %x
5422 }
5424 define arm_aapcs_vfpcc <8 x i100> @test_signed_v8f16_v8i100(<8 x half> %f) {
5425 ; CHECK-LABEL: test_signed_v8f16_v8i100:
5426 ; CHECK: @ %bb.0:
5427 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
5428 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
5429 ; CHECK-NEXT: .pad #4
5430 ; CHECK-NEXT: sub sp, #4
5431 ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}
5432 ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}
5433 ; CHECK-NEXT: .pad #32
5434 ; CHECK-NEXT: sub sp, #32
5435 ; CHECK-NEXT: vmov q4, q0
5436 ; CHECK-NEXT: mov r9, r0
5437 ; CHECK-NEXT: vcvtb.f32.f16 s21, s19
5438 ; CHECK-NEXT: vcvtt.f32.f16 s24, s19
5439 ; CHECK-NEXT: vmov r0, s21
5440 ; CHECK-NEXT: vcvtb.f32.f16 s26, s16
5441 ; CHECK-NEXT: vcvtb.f32.f16 s28, s17
5442 ; CHECK-NEXT: vcvtb.f32.f16 s30, s18
5443 ; CHECK-NEXT: vldr s20, .LCPI50_2
5444 ; CHECK-NEXT: vmov r8, s24
5445 ; CHECK-NEXT: vmov r4, s26
5446 ; CHECK-NEXT: vcvtt.f32.f16 s22, s18
5447 ; CHECK-NEXT: vmov r6, s28
5448 ; CHECK-NEXT: vmov r5, s30
5449 ; CHECK-NEXT: bl __fixsfti
5450 ; CHECK-NEXT: vldr s18, .LCPI50_3
5451 ; CHECK-NEXT: mov r7, r3
5452 ; CHECK-NEXT: vcmp.f32 s21, s18
5453 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5454 ; CHECK-NEXT: vcmp.f32 s21, s20
5455 ; CHECK-NEXT: it lt
5456 ; CHECK-NEXT: movlt r2, #0
5457 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5458 ; CHECK-NEXT: vcmp.f32 s21, s21
5459 ; CHECK-NEXT: it gt
5460 ; CHECK-NEXT: movgt.w r2, #-1
5461 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5462 ; CHECK-NEXT: vcmp.f32 s21, s18
5463 ; CHECK-NEXT: it vs
5464 ; CHECK-NEXT: movvs r2, #0
5465 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5466 ; CHECK-NEXT: vcmp.f32 s21, s20
5467 ; CHECK-NEXT: str.w r2, [r9, #83]
5468 ; CHECK-NEXT: it lt
5469 ; CHECK-NEXT: movlt r1, #0
5470 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5471 ; CHECK-NEXT: vcmp.f32 s21, s21
5472 ; CHECK-NEXT: it gt
5473 ; CHECK-NEXT: movgt.w r1, #-1
5474 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5475 ; CHECK-NEXT: vcmp.f32 s21, s18
5476 ; CHECK-NEXT: it vs
5477 ; CHECK-NEXT: movvs r1, #0
5478 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5479 ; CHECK-NEXT: str.w r1, [r9, #79]
5480 ; CHECK-NEXT: it lt
5481 ; CHECK-NEXT: movlt r0, #0
5482 ; CHECK-NEXT: vcmp.f32 s21, s20
5483 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5484 ; CHECK-NEXT: it gt
5485 ; CHECK-NEXT: movgt.w r0, #-1
5486 ; CHECK-NEXT: vcmp.f32 s21, s21
5487 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5488 ; CHECK-NEXT: it vs
5489 ; CHECK-NEXT: movvs r0, #0
5490 ; CHECK-NEXT: str.w r0, [r9, #75]
5491 ; CHECK-NEXT: mov r0, r5
5492 ; CHECK-NEXT: bl __fixsfti
5493 ; CHECK-NEXT: vcmp.f32 s30, s18
5494 ; CHECK-NEXT: mov r5, r3
5495 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5496 ; CHECK-NEXT: vcmp.f32 s30, s20
5497 ; CHECK-NEXT: it lt
5498 ; CHECK-NEXT: movlt r2, #0
5499 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5500 ; CHECK-NEXT: vcmp.f32 s30, s30
5501 ; CHECK-NEXT: it gt
5502 ; CHECK-NEXT: movgt.w r2, #-1
5503 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5504 ; CHECK-NEXT: vcmp.f32 s30, s18
5505 ; CHECK-NEXT: it vs
5506 ; CHECK-NEXT: movvs r2, #0
5507 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5508 ; CHECK-NEXT: vcmp.f32 s30, s20
5509 ; CHECK-NEXT: str.w r2, [r9, #58]
5510 ; CHECK-NEXT: it lt
5511 ; CHECK-NEXT: movlt r1, #0
5512 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5513 ; CHECK-NEXT: vcmp.f32 s30, s30
5514 ; CHECK-NEXT: it gt
5515 ; CHECK-NEXT: movgt.w r1, #-1
5516 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5517 ; CHECK-NEXT: vcmp.f32 s30, s18
5518 ; CHECK-NEXT: it vs
5519 ; CHECK-NEXT: movvs r1, #0
5520 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5521 ; CHECK-NEXT: str.w r1, [r9, #54]
5522 ; CHECK-NEXT: it lt
5523 ; CHECK-NEXT: movlt r0, #0
5524 ; CHECK-NEXT: vcmp.f32 s30, s20
5525 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5526 ; CHECK-NEXT: it gt
5527 ; CHECK-NEXT: movgt.w r0, #-1
5528 ; CHECK-NEXT: vcmp.f32 s30, s30
5529 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5530 ; CHECK-NEXT: it vs
5531 ; CHECK-NEXT: movvs r0, #0
5532 ; CHECK-NEXT: str.w r0, [r9, #50]
5533 ; CHECK-NEXT: mov r0, r6
5534 ; CHECK-NEXT: bl __fixsfti
5535 ; CHECK-NEXT: vcmp.f32 s28, s18
5536 ; CHECK-NEXT: str r3, [sp, #24] @ 4-byte Spill
5537 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5538 ; CHECK-NEXT: vcmp.f32 s28, s20
5539 ; CHECK-NEXT: it lt
5540 ; CHECK-NEXT: movlt r2, #0
5541 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5542 ; CHECK-NEXT: vcmp.f32 s28, s28
5543 ; CHECK-NEXT: it gt
5544 ; CHECK-NEXT: movgt.w r2, #-1
5545 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5546 ; CHECK-NEXT: vcmp.f32 s28, s18
5547 ; CHECK-NEXT: it vs
5548 ; CHECK-NEXT: movvs r2, #0
5549 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5550 ; CHECK-NEXT: vcmp.f32 s28, s20
5551 ; CHECK-NEXT: str.w r2, [r9, #33]
5552 ; CHECK-NEXT: it lt
5553 ; CHECK-NEXT: movlt r1, #0
5554 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5555 ; CHECK-NEXT: vcmp.f32 s28, s28
5556 ; CHECK-NEXT: it gt
5557 ; CHECK-NEXT: movgt.w r1, #-1
5558 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5559 ; CHECK-NEXT: vcmp.f32 s28, s18
5560 ; CHECK-NEXT: it vs
5561 ; CHECK-NEXT: movvs r1, #0
5562 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5563 ; CHECK-NEXT: str.w r1, [r9, #29]
5564 ; CHECK-NEXT: it lt
5565 ; CHECK-NEXT: movlt r0, #0
5566 ; CHECK-NEXT: vcmp.f32 s28, s20
5567 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5568 ; CHECK-NEXT: it gt
5569 ; CHECK-NEXT: movgt.w r0, #-1
5570 ; CHECK-NEXT: vcmp.f32 s28, s28
5571 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5572 ; CHECK-NEXT: it vs
5573 ; CHECK-NEXT: movvs r0, #0
5574 ; CHECK-NEXT: str.w r0, [r9, #25]
5575 ; CHECK-NEXT: mov r0, r4
5576 ; CHECK-NEXT: bl __fixsfti
5577 ; CHECK-NEXT: vcmp.f32 s26, s18
5578 ; CHECK-NEXT: str r3, [sp, #12] @ 4-byte Spill
5579 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5580 ; CHECK-NEXT: vcmp.f32 s26, s20
5581 ; CHECK-NEXT: it lt
5582 ; CHECK-NEXT: movlt r2, #0
5583 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5584 ; CHECK-NEXT: vcmp.f32 s26, s26
5585 ; CHECK-NEXT: it gt
5586 ; CHECK-NEXT: movgt.w r2, #-1
5587 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5588 ; CHECK-NEXT: vcmp.f32 s26, s18
5589 ; CHECK-NEXT: it vs
5590 ; CHECK-NEXT: movvs r2, #0
5591 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5592 ; CHECK-NEXT: vcmp.f32 s26, s20
5593 ; CHECK-NEXT: str.w r2, [r9, #8]
5594 ; CHECK-NEXT: it lt
5595 ; CHECK-NEXT: movlt r1, #0
5596 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5597 ; CHECK-NEXT: vcmp.f32 s26, s26
5598 ; CHECK-NEXT: it gt
5599 ; CHECK-NEXT: movgt.w r1, #-1
5600 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5601 ; CHECK-NEXT: vcmp.f32 s26, s18
5602 ; CHECK-NEXT: it vs
5603 ; CHECK-NEXT: movvs r1, #0
5604 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5605 ; CHECK-NEXT: str.w r1, [r9, #4]
5606 ; CHECK-NEXT: it lt
5607 ; CHECK-NEXT: movlt r0, #0
5608 ; CHECK-NEXT: vcmp.f32 s26, s20
5609 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5610 ; CHECK-NEXT: it gt
5611 ; CHECK-NEXT: movgt.w r0, #-1
5612 ; CHECK-NEXT: vcmp.f32 s26, s26
5613 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5614 ; CHECK-NEXT: it vs
5615 ; CHECK-NEXT: movvs r0, #0
5616 ; CHECK-NEXT: str.w r0, [r9]
5617 ; CHECK-NEXT: mov r0, r8
5618 ; CHECK-NEXT: bl __fixsfti
5619 ; CHECK-NEXT: vcmp.f32 s24, s18
5620 ; CHECK-NEXT: mov r6, r0
5621 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5622 ; CHECK-NEXT: vcmp.f32 s24, s20
5623 ; CHECK-NEXT: str r3, [sp, #8] @ 4-byte Spill
5624 ; CHECK-NEXT: it lt
5625 ; CHECK-NEXT: movlt r6, #0
5626 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5627 ; CHECK-NEXT: vcmp.f32 s24, s24
5628 ; CHECK-NEXT: it gt
5629 ; CHECK-NEXT: movgt.w r6, #-1
5630 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5631 ; CHECK-NEXT: vcmp.f32 s21, s18
5632 ; CHECK-NEXT: it vs
5633 ; CHECK-NEXT: movvs r6, #0
5634 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5635 ; CHECK-NEXT: it lt
5636 ; CHECK-NEXT: mvnlt r7, #7
5637 ; CHECK-NEXT: vcmp.f32 s21, s20
5638 ; CHECK-NEXT: mov r11, r1
5639 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5640 ; CHECK-NEXT: it gt
5641 ; CHECK-NEXT: movgt r7, #7
5642 ; CHECK-NEXT: vcmp.f32 s21, s21
5643 ; CHECK-NEXT: mov r10, r2
5644 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5645 ; CHECK-NEXT: it vs
5646 ; CHECK-NEXT: movvs r7, #0
5647 ; CHECK-NEXT: and r0, r7, #15
5648 ; CHECK-NEXT: orr.w r1, r0, r6, lsl #4
5649 ; CHECK-NEXT: vmov r0, s22
5650 ; CHECK-NEXT: str.w r1, [r9, #87]
5651 ; CHECK-NEXT: bl __fixsfti
5652 ; CHECK-NEXT: vcmp.f32 s22, s18
5653 ; CHECK-NEXT: mov r8, r0
5654 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5655 ; CHECK-NEXT: vcmp.f32 s22, s20
5656 ; CHECK-NEXT: str r2, [sp, #20] @ 4-byte Spill
5657 ; CHECK-NEXT: it lt
5658 ; CHECK-NEXT: movlt.w r8, #0
5659 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5660 ; CHECK-NEXT: vcmp.f32 s22, s22
5661 ; CHECK-NEXT: it gt
5662 ; CHECK-NEXT: movgt.w r8, #-1
5663 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5664 ; CHECK-NEXT: vcmp.f32 s30, s18
5665 ; CHECK-NEXT: it vs
5666 ; CHECK-NEXT: movvs.w r8, #0
5667 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5668 ; CHECK-NEXT: it lt
5669 ; CHECK-NEXT: mvnlt r5, #7
5670 ; CHECK-NEXT: vcmp.f32 s30, s20
5671 ; CHECK-NEXT: mov r4, r1
5672 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5673 ; CHECK-NEXT: vcmp.f32 s30, s30
5674 ; CHECK-NEXT: it gt
5675 ; CHECK-NEXT: movgt r5, #7
5676 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5677 ; CHECK-NEXT: it vs
5678 ; CHECK-NEXT: movvs r5, #0
5679 ; CHECK-NEXT: and r0, r5, #15
5680 ; CHECK-NEXT: orr.w r0, r0, r8, lsl #4
5681 ; CHECK-NEXT: vcvtt.f32.f16 s30, s17
5682 ; CHECK-NEXT: str.w r0, [r9, #62]
5683 ; CHECK-NEXT: vmov r0, s30
5684 ; CHECK-NEXT: mov r7, r3
5685 ; CHECK-NEXT: bl __fixsfti
5686 ; CHECK-NEXT: vcmp.f32 s30, s18
5687 ; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill
5688 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5689 ; CHECK-NEXT: str r2, [sp, #28] @ 4-byte Spill
5690 ; CHECK-NEXT: str r3, [sp, #4] @ 4-byte Spill
5691 ; CHECK-NEXT: it lt
5692 ; CHECK-NEXT: movlt r0, #0
5693 ; CHECK-NEXT: vcmp.f32 s30, s20
5694 ; CHECK-NEXT: vcvtt.f32.f16 s16, s16
5695 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5696 ; CHECK-NEXT: it gt
5697 ; CHECK-NEXT: movgt.w r0, #-1
5698 ; CHECK-NEXT: vcmp.f32 s30, s30
5699 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5700 ; CHECK-NEXT: it vs
5701 ; CHECK-NEXT: movvs r0, #0
5702 ; CHECK-NEXT: vcmp.f32 s28, s18
5703 ; CHECK-NEXT: mov r1, r0
5704 ; CHECK-NEXT: str r0, [sp] @ 4-byte Spill
5705 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5706 ; CHECK-NEXT: ldr r0, [sp, #24] @ 4-byte Reload
5707 ; CHECK-NEXT: vcmp.f32 s28, s20
5708 ; CHECK-NEXT: it lt
5709 ; CHECK-NEXT: mvnlt r0, #7
5710 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5711 ; CHECK-NEXT: it gt
5712 ; CHECK-NEXT: movgt r0, #7
5713 ; CHECK-NEXT: vcmp.f32 s28, s28
5714 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5715 ; CHECK-NEXT: it vs
5716 ; CHECK-NEXT: movvs r0, #0
5717 ; CHECK-NEXT: and r0, r0, #15
5718 ; CHECK-NEXT: orr.w r0, r0, r1, lsl #4
5719 ; CHECK-NEXT: str.w r0, [r9, #37]
5720 ; CHECK-NEXT: vmov r0, s16
5721 ; CHECK-NEXT: bl __fixsfti
5722 ; CHECK-NEXT: vcmp.f32 s16, s18
5723 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5724 ; CHECK-NEXT: it lt
5725 ; CHECK-NEXT: movlt r0, #0
5726 ; CHECK-NEXT: vcmp.f32 s16, s20
5727 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5728 ; CHECK-NEXT: it gt
5729 ; CHECK-NEXT: movgt.w r0, #-1
5730 ; CHECK-NEXT: vcmp.f32 s16, s16
5731 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5732 ; CHECK-NEXT: it vs
5733 ; CHECK-NEXT: movvs r0, #0
5734 ; CHECK-NEXT: vcmp.f32 s26, s18
5735 ; CHECK-NEXT: ldr r5, [sp, #12] @ 4-byte Reload
5736 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5737 ; CHECK-NEXT: it lt
5738 ; CHECK-NEXT: mvnlt r5, #7
5739 ; CHECK-NEXT: vcmp.f32 s26, s20
5740 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5741 ; CHECK-NEXT: it gt
5742 ; CHECK-NEXT: movgt r5, #7
5743 ; CHECK-NEXT: vcmp.f32 s26, s26
5744 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5745 ; CHECK-NEXT: it vs
5746 ; CHECK-NEXT: movvs r5, #0
5747 ; CHECK-NEXT: vcmp.f32 s24, s18
5748 ; CHECK-NEXT: and r5, r5, #15
5749 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5750 ; CHECK-NEXT: vcmp.f32 s24, s20
5751 ; CHECK-NEXT: orr.w r5, r5, r0, lsl #4
5752 ; CHECK-NEXT: str.w r5, [r9, #12]
5753 ; CHECK-NEXT: it lt
5754 ; CHECK-NEXT: movlt.w r11, #0
5755 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5756 ; CHECK-NEXT: b.w .LBB50_3
5757 ; CHECK-NEXT: .p2align 2
5758 ; CHECK-NEXT: @ %bb.1:
5759 ; CHECK-NEXT: .LCPI50_2:
5760 ; CHECK-NEXT: .long 0x70ffffff @ float 6.33825262E+29
5761 ; CHECK-NEXT: .p2align 2
5762 ; CHECK-NEXT: @ %bb.2:
5763 ; CHECK-NEXT: .LCPI50_3:
5764 ; CHECK-NEXT: .long 0xf1000000 @ float -6.338253E+29
5765 ; CHECK-NEXT: .p2align 1
5766 ; CHECK-NEXT: .LBB50_3:
5767 ; CHECK-NEXT: vcmp.f32 s24, s24
5768 ; CHECK-NEXT: it gt
5769 ; CHECK-NEXT: movgt.w r11, #-1
5770 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5771 ; CHECK-NEXT: vcmp.f32 s24, s18
5772 ; CHECK-NEXT: it vs
5773 ; CHECK-NEXT: movvs.w r11, #0
5774 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5775 ; CHECK-NEXT: it lt
5776 ; CHECK-NEXT: movlt.w r10, #0
5777 ; CHECK-NEXT: vcmp.f32 s24, s20
5778 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5779 ; CHECK-NEXT: lsrl r6, r11, #28
5780 ; CHECK-NEXT: it gt
5781 ; CHECK-NEXT: movgt.w r10, #-1
5782 ; CHECK-NEXT: vcmp.f32 s24, s24
5783 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5784 ; CHECK-NEXT: it vs
5785 ; CHECK-NEXT: movvs.w r10, #0
5786 ; CHECK-NEXT: orr.w r5, r11, r10, lsl #4
5787 ; CHECK-NEXT: str.w r5, [r9, #95]
5788 ; CHECK-NEXT: str.w r6, [r9, #91]
5789 ; CHECK-NEXT: vcmp.f32 s24, s18
5790 ; CHECK-NEXT: ldr r6, [sp, #8] @ 4-byte Reload
5791 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5792 ; CHECK-NEXT: it lt
5793 ; CHECK-NEXT: mvnlt r6, #7
5794 ; CHECK-NEXT: vcmp.f32 s24, s20
5795 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5796 ; CHECK-NEXT: it gt
5797 ; CHECK-NEXT: movgt r6, #7
5798 ; CHECK-NEXT: vcmp.f32 s24, s24
5799 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5800 ; CHECK-NEXT: it vs
5801 ; CHECK-NEXT: movvs r6, #0
5802 ; CHECK-NEXT: and r5, r6, #15
5803 ; CHECK-NEXT: vcmp.f32 s22, s18
5804 ; CHECK-NEXT: lsrl r10, r5, #28
5805 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5806 ; CHECK-NEXT: vcmp.f32 s22, s20
5807 ; CHECK-NEXT: strb.w r10, [r9, #99]
5808 ; CHECK-NEXT: it lt
5809 ; CHECK-NEXT: mvnlt r7, #7
5810 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5811 ; CHECK-NEXT: vcmp.f32 s22, s22
5812 ; CHECK-NEXT: it gt
5813 ; CHECK-NEXT: movgt r7, #7
5814 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5815 ; CHECK-NEXT: vcmp.f32 s22, s18
5816 ; CHECK-NEXT: it vs
5817 ; CHECK-NEXT: movvs r7, #0
5818 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5819 ; CHECK-NEXT: it lt
5820 ; CHECK-NEXT: movlt r4, #0
5821 ; CHECK-NEXT: vcmp.f32 s22, s20
5822 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5823 ; CHECK-NEXT: it gt
5824 ; CHECK-NEXT: movgt.w r4, #-1
5825 ; CHECK-NEXT: vcmp.f32 s22, s22
5826 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5827 ; CHECK-NEXT: it vs
5828 ; CHECK-NEXT: movvs r4, #0
5829 ; CHECK-NEXT: vmov q0[3], q0[1], r4, r7
5830 ; CHECK-NEXT: vcmp.f32 s22, s18
5831 ; CHECK-NEXT: ldr r4, [sp, #20] @ 4-byte Reload
5832 ; CHECK-NEXT: vmov r5, s1
5833 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5834 ; CHECK-NEXT: it lt
5835 ; CHECK-NEXT: movlt r4, #0
5836 ; CHECK-NEXT: vcmp.f32 s22, s20
5837 ; CHECK-NEXT: lsrl r8, r5, #28
5838 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5839 ; CHECK-NEXT: it gt
5840 ; CHECK-NEXT: movgt.w r4, #-1
5841 ; CHECK-NEXT: vcmp.f32 s22, s22
5842 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5843 ; CHECK-NEXT: it vs
5844 ; CHECK-NEXT: movvs r4, #0
5845 ; CHECK-NEXT: orr.w r6, r5, r4, lsl #4
5846 ; CHECK-NEXT: and r5, r7, #15
5847 ; CHECK-NEXT: lsrl r4, r5, #28
5848 ; CHECK-NEXT: str.w r6, [r9, #70]
5849 ; CHECK-NEXT: str.w r8, [r9, #66]
5850 ; CHECK-NEXT: vcmp.f32 s30, s18
5851 ; CHECK-NEXT: strb.w r4, [r9, #74]
5852 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5853 ; CHECK-NEXT: ldr r4, [sp, #4] @ 4-byte Reload
5854 ; CHECK-NEXT: vcmp.f32 s30, s20
5855 ; CHECK-NEXT: it lt
5856 ; CHECK-NEXT: mvnlt r4, #7
5857 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5858 ; CHECK-NEXT: it gt
5859 ; CHECK-NEXT: movgt r4, #7
5860 ; CHECK-NEXT: vcmp.f32 s30, s30
5861 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5862 ; CHECK-NEXT: it vs
5863 ; CHECK-NEXT: movvs r4, #0
5864 ; CHECK-NEXT: vcmp.f32 s30, s18
5865 ; CHECK-NEXT: ldr r7, [sp, #16] @ 4-byte Reload
5866 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5867 ; CHECK-NEXT: it lt
5868 ; CHECK-NEXT: movlt r7, #0
5869 ; CHECK-NEXT: vcmp.f32 s30, s20
5870 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5871 ; CHECK-NEXT: it gt
5872 ; CHECK-NEXT: movgt.w r7, #-1
5873 ; CHECK-NEXT: vcmp.f32 s30, s30
5874 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5875 ; CHECK-NEXT: it vs
5876 ; CHECK-NEXT: movvs r7, #0
5877 ; CHECK-NEXT: vmov q0[3], q0[1], r7, r4
5878 ; CHECK-NEXT: vcmp.f32 s30, s18
5879 ; CHECK-NEXT: ldr.w r12, [sp] @ 4-byte Reload
5880 ; CHECK-NEXT: vmov r5, s1
5881 ; CHECK-NEXT: ldr r6, [sp, #28] @ 4-byte Reload
5882 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5883 ; CHECK-NEXT: it lt
5884 ; CHECK-NEXT: movlt r6, #0
5885 ; CHECK-NEXT: vcmp.f32 s30, s20
5886 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5887 ; CHECK-NEXT: lsrl r12, r5, #28
5888 ; CHECK-NEXT: it gt
5889 ; CHECK-NEXT: movgt.w r6, #-1
5890 ; CHECK-NEXT: vcmp.f32 s30, s30
5891 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5892 ; CHECK-NEXT: it vs
5893 ; CHECK-NEXT: movvs r6, #0
5894 ; CHECK-NEXT: orr.w r7, r5, r6, lsl #4
5895 ; CHECK-NEXT: and r5, r4, #15
5896 ; CHECK-NEXT: vcmp.f32 s16, s18
5897 ; CHECK-NEXT: lsrl r6, r5, #28
5898 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5899 ; CHECK-NEXT: vcmp.f32 s16, s20
5900 ; CHECK-NEXT: str.w r7, [r9, #45]
5901 ; CHECK-NEXT: str.w r12, [r9, #41]
5902 ; CHECK-NEXT: strb.w r6, [r9, #49]
5903 ; CHECK-NEXT: it lt
5904 ; CHECK-NEXT: mvnlt r3, #7
5905 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5906 ; CHECK-NEXT: vcmp.f32 s16, s16
5907 ; CHECK-NEXT: it gt
5908 ; CHECK-NEXT: movgt r3, #7
5909 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5910 ; CHECK-NEXT: vcmp.f32 s16, s18
5911 ; CHECK-NEXT: it vs
5912 ; CHECK-NEXT: movvs r3, #0
5913 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5914 ; CHECK-NEXT: it lt
5915 ; CHECK-NEXT: movlt r1, #0
5916 ; CHECK-NEXT: vcmp.f32 s16, s20
5917 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5918 ; CHECK-NEXT: it gt
5919 ; CHECK-NEXT: movgt.w r1, #-1
5920 ; CHECK-NEXT: vcmp.f32 s16, s16
5921 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5922 ; CHECK-NEXT: it vs
5923 ; CHECK-NEXT: movvs r1, #0
5924 ; CHECK-NEXT: vmov q0[3], q0[1], r1, r3
5925 ; CHECK-NEXT: vcmp.f32 s16, s18
5926 ; CHECK-NEXT: vmov r1, s1
5927 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5928 ; CHECK-NEXT: it lt
5929 ; CHECK-NEXT: movlt r2, #0
5930 ; CHECK-NEXT: vcmp.f32 s16, s20
5931 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5932 ; CHECK-NEXT: lsrl r0, r1, #28
5933 ; CHECK-NEXT: it gt
5934 ; CHECK-NEXT: movgt.w r2, #-1
5935 ; CHECK-NEXT: vcmp.f32 s16, s16
5936 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5937 ; CHECK-NEXT: it vs
5938 ; CHECK-NEXT: movvs r2, #0
5939 ; CHECK-NEXT: orr.w r1, r1, r2, lsl #4
5940 ; CHECK-NEXT: strd r0, r1, [r9, #16]
5941 ; CHECK-NEXT: and r1, r3, #15
5942 ; CHECK-NEXT: lsrl r2, r1, #28
5943 ; CHECK-NEXT: strb.w r2, [r9, #24]
5944 ; CHECK-NEXT: add sp, #32
5945 ; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}
5946 ; CHECK-NEXT: add sp, #4
5947 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
5948 ; CHECK-NEXT: @ %bb.4:
5949 %x = call <8 x i100> @llvm.fptosi.sat.v8f16.v8i100(<8 x half> %f)
5950 ret <8 x i100> %x
5951 }
5953 define arm_aapcs_vfpcc <8 x i128> @test_signed_v8f16_v8i128(<8 x half> %f) {
5954 ; CHECK-LABEL: test_signed_v8f16_v8i128:
5955 ; CHECK: @ %bb.0:
5956 ; CHECK-NEXT: .save {r4, r5, r6, r7, r8, r9, lr}
5957 ; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, lr}
5958 ; CHECK-NEXT: .pad #4
5959 ; CHECK-NEXT: sub sp, #4
5960 ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}
5961 ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}
5962 ; CHECK-NEXT: vmov q4, q0
5963 ; CHECK-NEXT: mov r4, r0
5964 ; CHECK-NEXT: vcvtt.f32.f16 s28, s19
5965 ; CHECK-NEXT: vcvtb.f32.f16 s20, s16
5966 ; CHECK-NEXT: vmov r0, s28
5967 ; CHECK-NEXT: vcvtt.f32.f16 s24, s16
5968 ; CHECK-NEXT: vcvtb.f32.f16 s26, s17
5969 ; CHECK-NEXT: vcvtb.f32.f16 s19, s19
5970 ; CHECK-NEXT: vldr s22, .LCPI51_2
5971 ; CHECK-NEXT: vmov r8, s20
5972 ; CHECK-NEXT: vmov r9, s24
5973 ; CHECK-NEXT: vcvtt.f32.f16 s30, s18
5974 ; CHECK-NEXT: vmov r7, s26
5975 ; CHECK-NEXT: vmov r6, s19
5976 ; CHECK-NEXT: bl __fixsfti
5977 ; CHECK-NEXT: vldr s16, .LCPI51_3
5978 ; CHECK-NEXT: vmov r5, s30
5979 ; CHECK-NEXT: vcvtb.f32.f16 s18, s18
5980 ; CHECK-NEXT: vcmp.f32 s28, s16
5981 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5982 ; CHECK-NEXT: vcmp.f32 s28, s22
5983 ; CHECK-NEXT: it lt
5984 ; CHECK-NEXT: movlt.w r3, #-2147483648
5985 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5986 ; CHECK-NEXT: vcmp.f32 s28, s28
5987 ; CHECK-NEXT: it gt
5988 ; CHECK-NEXT: mvngt r3, #-2147483648
5989 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5990 ; CHECK-NEXT: vcmp.f32 s28, s16
5991 ; CHECK-NEXT: it vs
5992 ; CHECK-NEXT: movvs r3, #0
5993 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5994 ; CHECK-NEXT: vcmp.f32 s28, s22
5995 ; CHECK-NEXT: str r3, [r4, #124]
5996 ; CHECK-NEXT: it lt
5997 ; CHECK-NEXT: movlt r2, #0
5998 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
5999 ; CHECK-NEXT: vcmp.f32 s28, s28
6000 ; CHECK-NEXT: it gt
6001 ; CHECK-NEXT: movgt.w r2, #-1
6002 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6003 ; CHECK-NEXT: vcmp.f32 s28, s16
6004 ; CHECK-NEXT: it vs
6005 ; CHECK-NEXT: movvs r2, #0
6006 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6007 ; CHECK-NEXT: vcmp.f32 s28, s22
6008 ; CHECK-NEXT: str r2, [r4, #120]
6009 ; CHECK-NEXT: it lt
6010 ; CHECK-NEXT: movlt r1, #0
6011 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6012 ; CHECK-NEXT: vcmp.f32 s28, s28
6013 ; CHECK-NEXT: it gt
6014 ; CHECK-NEXT: movgt.w r1, #-1
6015 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6016 ; CHECK-NEXT: vcmp.f32 s28, s16
6017 ; CHECK-NEXT: it vs
6018 ; CHECK-NEXT: movvs r1, #0
6019 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6020 ; CHECK-NEXT: str r1, [r4, #116]
6021 ; CHECK-NEXT: it lt
6022 ; CHECK-NEXT: movlt r0, #0
6023 ; CHECK-NEXT: vcmp.f32 s28, s22
6024 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6025 ; CHECK-NEXT: it gt
6026 ; CHECK-NEXT: movgt.w r0, #-1
6027 ; CHECK-NEXT: vcmp.f32 s28, s28
6028 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6029 ; CHECK-NEXT: it vs
6030 ; CHECK-NEXT: movvs r0, #0
6031 ; CHECK-NEXT: str r0, [r4, #112]
6032 ; CHECK-NEXT: mov r0, r6
6033 ; CHECK-NEXT: bl __fixsfti
6034 ; CHECK-NEXT: vcmp.f32 s19, s16
6035 ; CHECK-NEXT: vcvtt.f32.f16 s28, s17
6036 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6037 ; CHECK-NEXT: vcmp.f32 s19, s22
6038 ; CHECK-NEXT: it lt
6039 ; CHECK-NEXT: movlt.w r3, #-2147483648
6040 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6041 ; CHECK-NEXT: vcmp.f32 s19, s19
6042 ; CHECK-NEXT: it gt
6043 ; CHECK-NEXT: mvngt r3, #-2147483648
6044 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6045 ; CHECK-NEXT: vcmp.f32 s19, s16
6046 ; CHECK-NEXT: it vs
6047 ; CHECK-NEXT: movvs r3, #0
6048 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6049 ; CHECK-NEXT: vcmp.f32 s19, s22
6050 ; CHECK-NEXT: str r3, [r4, #108]
6051 ; CHECK-NEXT: it lt
6052 ; CHECK-NEXT: movlt r2, #0
6053 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6054 ; CHECK-NEXT: vcmp.f32 s19, s19
6055 ; CHECK-NEXT: it gt
6056 ; CHECK-NEXT: movgt.w r2, #-1
6057 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6058 ; CHECK-NEXT: vcmp.f32 s19, s16
6059 ; CHECK-NEXT: it vs
6060 ; CHECK-NEXT: movvs r2, #0
6061 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6062 ; CHECK-NEXT: vcmp.f32 s19, s22
6063 ; CHECK-NEXT: str r2, [r4, #104]
6064 ; CHECK-NEXT: it lt
6065 ; CHECK-NEXT: movlt r1, #0
6066 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6067 ; CHECK-NEXT: vcmp.f32 s19, s19
6068 ; CHECK-NEXT: it gt
6069 ; CHECK-NEXT: movgt.w r1, #-1
6070 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6071 ; CHECK-NEXT: vcmp.f32 s19, s16
6072 ; CHECK-NEXT: it vs
6073 ; CHECK-NEXT: movvs r1, #0
6074 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6075 ; CHECK-NEXT: str r1, [r4, #100]
6076 ; CHECK-NEXT: it lt
6077 ; CHECK-NEXT: movlt r0, #0
6078 ; CHECK-NEXT: vcmp.f32 s19, s22
6079 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6080 ; CHECK-NEXT: it gt
6081 ; CHECK-NEXT: movgt.w r0, #-1
6082 ; CHECK-NEXT: vcmp.f32 s19, s19
6083 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6084 ; CHECK-NEXT: it vs
6085 ; CHECK-NEXT: movvs r0, #0
6086 ; CHECK-NEXT: str r0, [r4, #96]
6087 ; CHECK-NEXT: mov r0, r5
6088 ; CHECK-NEXT: vmov r6, s18
6089 ; CHECK-NEXT: bl __fixsfti
6090 ; CHECK-NEXT: vcmp.f32 s30, s16
6091 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6092 ; CHECK-NEXT: vcmp.f32 s30, s22
6093 ; CHECK-NEXT: it lt
6094 ; CHECK-NEXT: movlt.w r3, #-2147483648
6095 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6096 ; CHECK-NEXT: vcmp.f32 s30, s30
6097 ; CHECK-NEXT: it gt
6098 ; CHECK-NEXT: mvngt r3, #-2147483648
6099 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6100 ; CHECK-NEXT: vcmp.f32 s30, s16
6101 ; CHECK-NEXT: it vs
6102 ; CHECK-NEXT: movvs r3, #0
6103 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6104 ; CHECK-NEXT: vcmp.f32 s30, s22
6105 ; CHECK-NEXT: str r3, [r4, #92]
6106 ; CHECK-NEXT: it lt
6107 ; CHECK-NEXT: movlt r2, #0
6108 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6109 ; CHECK-NEXT: vcmp.f32 s30, s30
6110 ; CHECK-NEXT: it gt
6111 ; CHECK-NEXT: movgt.w r2, #-1
6112 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6113 ; CHECK-NEXT: vcmp.f32 s30, s16
6114 ; CHECK-NEXT: it vs
6115 ; CHECK-NEXT: movvs r2, #0
6116 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6117 ; CHECK-NEXT: vcmp.f32 s30, s22
6118 ; CHECK-NEXT: str r2, [r4, #88]
6119 ; CHECK-NEXT: it lt
6120 ; CHECK-NEXT: movlt r1, #0
6121 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6122 ; CHECK-NEXT: vcmp.f32 s30, s30
6123 ; CHECK-NEXT: it gt
6124 ; CHECK-NEXT: movgt.w r1, #-1
6125 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6126 ; CHECK-NEXT: vcmp.f32 s30, s16
6127 ; CHECK-NEXT: it vs
6128 ; CHECK-NEXT: movvs r1, #0
6129 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6130 ; CHECK-NEXT: str r1, [r4, #84]
6131 ; CHECK-NEXT: it lt
6132 ; CHECK-NEXT: movlt r0, #0
6133 ; CHECK-NEXT: vcmp.f32 s30, s22
6134 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6135 ; CHECK-NEXT: it gt
6136 ; CHECK-NEXT: movgt.w r0, #-1
6137 ; CHECK-NEXT: vcmp.f32 s30, s30
6138 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6139 ; CHECK-NEXT: it vs
6140 ; CHECK-NEXT: movvs r0, #0
6141 ; CHECK-NEXT: str r0, [r4, #80]
6142 ; CHECK-NEXT: mov r0, r6
6143 ; CHECK-NEXT: vmov r5, s28
6144 ; CHECK-NEXT: bl __fixsfti
6145 ; CHECK-NEXT: vcmp.f32 s18, s16
6146 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6147 ; CHECK-NEXT: vcmp.f32 s18, s22
6148 ; CHECK-NEXT: it lt
6149 ; CHECK-NEXT: movlt.w r3, #-2147483648
6150 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6151 ; CHECK-NEXT: vcmp.f32 s18, s18
6152 ; CHECK-NEXT: it gt
6153 ; CHECK-NEXT: mvngt r3, #-2147483648
6154 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6155 ; CHECK-NEXT: vcmp.f32 s18, s16
6156 ; CHECK-NEXT: it vs
6157 ; CHECK-NEXT: movvs r3, #0
6158 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6159 ; CHECK-NEXT: vcmp.f32 s18, s22
6160 ; CHECK-NEXT: str r3, [r4, #76]
6161 ; CHECK-NEXT: it lt
6162 ; CHECK-NEXT: movlt r2, #0
6163 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6164 ; CHECK-NEXT: vcmp.f32 s18, s18
6165 ; CHECK-NEXT: it gt
6166 ; CHECK-NEXT: movgt.w r2, #-1
6167 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6168 ; CHECK-NEXT: vcmp.f32 s18, s16
6169 ; CHECK-NEXT: it vs
6170 ; CHECK-NEXT: movvs r2, #0
6171 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6172 ; CHECK-NEXT: vcmp.f32 s18, s22
6173 ; CHECK-NEXT: str r2, [r4, #72]
6174 ; CHECK-NEXT: it lt
6175 ; CHECK-NEXT: movlt r1, #0
6176 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6177 ; CHECK-NEXT: vcmp.f32 s18, s18
6178 ; CHECK-NEXT: it gt
6179 ; CHECK-NEXT: movgt.w r1, #-1
6180 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6181 ; CHECK-NEXT: vcmp.f32 s18, s16
6182 ; CHECK-NEXT: it vs
6183 ; CHECK-NEXT: movvs r1, #0
6184 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6185 ; CHECK-NEXT: str r1, [r4, #68]
6186 ; CHECK-NEXT: it lt
6187 ; CHECK-NEXT: movlt r0, #0
6188 ; CHECK-NEXT: vcmp.f32 s18, s22
6189 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6190 ; CHECK-NEXT: it gt
6191 ; CHECK-NEXT: movgt.w r0, #-1
6192 ; CHECK-NEXT: vcmp.f32 s18, s18
6193 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6194 ; CHECK-NEXT: it vs
6195 ; CHECK-NEXT: movvs r0, #0
6196 ; CHECK-NEXT: str r0, [r4, #64]
6197 ; CHECK-NEXT: mov r0, r5
6198 ; CHECK-NEXT: bl __fixsfti
6199 ; CHECK-NEXT: vcmp.f32 s28, s16
6200 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6201 ; CHECK-NEXT: vcmp.f32 s28, s22
6202 ; CHECK-NEXT: it lt
6203 ; CHECK-NEXT: movlt.w r3, #-2147483648
6204 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6205 ; CHECK-NEXT: vcmp.f32 s28, s28
6206 ; CHECK-NEXT: it gt
6207 ; CHECK-NEXT: mvngt r3, #-2147483648
6208 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6209 ; CHECK-NEXT: vcmp.f32 s28, s16
6210 ; CHECK-NEXT: it vs
6211 ; CHECK-NEXT: movvs r3, #0
6212 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6213 ; CHECK-NEXT: vcmp.f32 s28, s22
6214 ; CHECK-NEXT: str r3, [r4, #60]
6215 ; CHECK-NEXT: it lt
6216 ; CHECK-NEXT: movlt r2, #0
6217 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6218 ; CHECK-NEXT: vcmp.f32 s28, s28
6219 ; CHECK-NEXT: it gt
6220 ; CHECK-NEXT: movgt.w r2, #-1
6221 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6222 ; CHECK-NEXT: vcmp.f32 s28, s16
6223 ; CHECK-NEXT: it vs
6224 ; CHECK-NEXT: movvs r2, #0
6225 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6226 ; CHECK-NEXT: vcmp.f32 s28, s22
6227 ; CHECK-NEXT: str r2, [r4, #56]
6228 ; CHECK-NEXT: it lt
6229 ; CHECK-NEXT: movlt r1, #0
6230 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6231 ; CHECK-NEXT: vcmp.f32 s28, s28
6232 ; CHECK-NEXT: it gt
6233 ; CHECK-NEXT: movgt.w r1, #-1
6234 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6235 ; CHECK-NEXT: vcmp.f32 s28, s16
6236 ; CHECK-NEXT: it vs
6237 ; CHECK-NEXT: movvs r1, #0
6238 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6239 ; CHECK-NEXT: str r1, [r4, #52]
6240 ; CHECK-NEXT: it lt
6241 ; CHECK-NEXT: movlt r0, #0
6242 ; CHECK-NEXT: vcmp.f32 s28, s22
6243 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6244 ; CHECK-NEXT: it gt
6245 ; CHECK-NEXT: movgt.w r0, #-1
6246 ; CHECK-NEXT: vcmp.f32 s28, s28
6247 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6248 ; CHECK-NEXT: it vs
6249 ; CHECK-NEXT: movvs r0, #0
6250 ; CHECK-NEXT: str r0, [r4, #48]
6251 ; CHECK-NEXT: mov r0, r7
6252 ; CHECK-NEXT: bl __fixsfti
6253 ; CHECK-NEXT: vcmp.f32 s26, s16
6254 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6255 ; CHECK-NEXT: vcmp.f32 s26, s22
6256 ; CHECK-NEXT: it lt
6257 ; CHECK-NEXT: movlt.w r3, #-2147483648
6258 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6259 ; CHECK-NEXT: vcmp.f32 s26, s26
6260 ; CHECK-NEXT: it gt
6261 ; CHECK-NEXT: mvngt r3, #-2147483648
6262 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6263 ; CHECK-NEXT: vcmp.f32 s26, s16
6264 ; CHECK-NEXT: it vs
6265 ; CHECK-NEXT: movvs r3, #0
6266 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6267 ; CHECK-NEXT: vcmp.f32 s26, s22
6268 ; CHECK-NEXT: str r3, [r4, #44]
6269 ; CHECK-NEXT: it lt
6270 ; CHECK-NEXT: movlt r2, #0
6271 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6272 ; CHECK-NEXT: vcmp.f32 s26, s26
6273 ; CHECK-NEXT: it gt
6274 ; CHECK-NEXT: movgt.w r2, #-1
6275 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6276 ; CHECK-NEXT: vcmp.f32 s26, s16
6277 ; CHECK-NEXT: it vs
6278 ; CHECK-NEXT: movvs r2, #0
6279 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6280 ; CHECK-NEXT: vcmp.f32 s26, s22
6281 ; CHECK-NEXT: str r2, [r4, #40]
6282 ; CHECK-NEXT: it lt
6283 ; CHECK-NEXT: movlt r1, #0
6284 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6285 ; CHECK-NEXT: vcmp.f32 s26, s26
6286 ; CHECK-NEXT: it gt
6287 ; CHECK-NEXT: movgt.w r1, #-1
6288 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6289 ; CHECK-NEXT: vcmp.f32 s26, s16
6290 ; CHECK-NEXT: b.w .LBB51_3
6291 ; CHECK-NEXT: .p2align 2
6292 ; CHECK-NEXT: @ %bb.1:
6293 ; CHECK-NEXT: .LCPI51_2:
6294 ; CHECK-NEXT: .long 0x7effffff @ float 1.70141173E+38
6295 ; CHECK-NEXT: .p2align 2
6296 ; CHECK-NEXT: @ %bb.2:
6297 ; CHECK-NEXT: .LCPI51_3:
6298 ; CHECK-NEXT: .long 0xff000000 @ float -1.70141183E+38
6299 ; CHECK-NEXT: .p2align 1
6300 ; CHECK-NEXT: .LBB51_3:
6301 ; CHECK-NEXT: it vs
6302 ; CHECK-NEXT: movvs r1, #0
6303 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6304 ; CHECK-NEXT: str r1, [r4, #36]
6305 ; CHECK-NEXT: it lt
6306 ; CHECK-NEXT: movlt r0, #0
6307 ; CHECK-NEXT: vcmp.f32 s26, s22
6308 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6309 ; CHECK-NEXT: it gt
6310 ; CHECK-NEXT: movgt.w r0, #-1
6311 ; CHECK-NEXT: vcmp.f32 s26, s26
6312 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6313 ; CHECK-NEXT: it vs
6314 ; CHECK-NEXT: movvs r0, #0
6315 ; CHECK-NEXT: str r0, [r4, #32]
6316 ; CHECK-NEXT: mov r0, r9
6317 ; CHECK-NEXT: bl __fixsfti
6318 ; CHECK-NEXT: vcmp.f32 s24, s16
6319 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6320 ; CHECK-NEXT: vcmp.f32 s24, s22
6321 ; CHECK-NEXT: it lt
6322 ; CHECK-NEXT: movlt.w r3, #-2147483648
6323 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6324 ; CHECK-NEXT: vcmp.f32 s24, s24
6325 ; CHECK-NEXT: it gt
6326 ; CHECK-NEXT: mvngt r3, #-2147483648
6327 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6328 ; CHECK-NEXT: vcmp.f32 s24, s16
6329 ; CHECK-NEXT: it vs
6330 ; CHECK-NEXT: movvs r3, #0
6331 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6332 ; CHECK-NEXT: vcmp.f32 s24, s22
6333 ; CHECK-NEXT: str r3, [r4, #28]
6334 ; CHECK-NEXT: it lt
6335 ; CHECK-NEXT: movlt r2, #0
6336 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6337 ; CHECK-NEXT: vcmp.f32 s24, s24
6338 ; CHECK-NEXT: it gt
6339 ; CHECK-NEXT: movgt.w r2, #-1
6340 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6341 ; CHECK-NEXT: vcmp.f32 s24, s16
6342 ; CHECK-NEXT: it vs
6343 ; CHECK-NEXT: movvs r2, #0
6344 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6345 ; CHECK-NEXT: vcmp.f32 s24, s22
6346 ; CHECK-NEXT: str r2, [r4, #24]
6347 ; CHECK-NEXT: it lt
6348 ; CHECK-NEXT: movlt r1, #0
6349 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6350 ; CHECK-NEXT: vcmp.f32 s24, s24
6351 ; CHECK-NEXT: it gt
6352 ; CHECK-NEXT: movgt.w r1, #-1
6353 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6354 ; CHECK-NEXT: vcmp.f32 s24, s16
6355 ; CHECK-NEXT: it vs
6356 ; CHECK-NEXT: movvs r1, #0
6357 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6358 ; CHECK-NEXT: str r1, [r4, #20]
6359 ; CHECK-NEXT: it lt
6360 ; CHECK-NEXT: movlt r0, #0
6361 ; CHECK-NEXT: vcmp.f32 s24, s22
6362 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6363 ; CHECK-NEXT: it gt
6364 ; CHECK-NEXT: movgt.w r0, #-1
6365 ; CHECK-NEXT: vcmp.f32 s24, s24
6366 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6367 ; CHECK-NEXT: it vs
6368 ; CHECK-NEXT: movvs r0, #0
6369 ; CHECK-NEXT: str r0, [r4, #16]
6370 ; CHECK-NEXT: mov r0, r8
6371 ; CHECK-NEXT: bl __fixsfti
6372 ; CHECK-NEXT: vcmp.f32 s20, s16
6373 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6374 ; CHECK-NEXT: vcmp.f32 s20, s22
6375 ; CHECK-NEXT: it lt
6376 ; CHECK-NEXT: movlt.w r3, #-2147483648
6377 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6378 ; CHECK-NEXT: vcmp.f32 s20, s20
6379 ; CHECK-NEXT: it gt
6380 ; CHECK-NEXT: mvngt r3, #-2147483648
6381 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6382 ; CHECK-NEXT: vcmp.f32 s20, s16
6383 ; CHECK-NEXT: it vs
6384 ; CHECK-NEXT: movvs r3, #0
6385 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6386 ; CHECK-NEXT: vcmp.f32 s20, s22
6387 ; CHECK-NEXT: str r3, [r4, #12]
6388 ; CHECK-NEXT: it lt
6389 ; CHECK-NEXT: movlt r2, #0
6390 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6391 ; CHECK-NEXT: vcmp.f32 s20, s20
6392 ; CHECK-NEXT: it gt
6393 ; CHECK-NEXT: movgt.w r2, #-1
6394 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6395 ; CHECK-NEXT: vcmp.f32 s20, s16
6396 ; CHECK-NEXT: it vs
6397 ; CHECK-NEXT: movvs r2, #0
6398 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6399 ; CHECK-NEXT: vcmp.f32 s20, s22
6400 ; CHECK-NEXT: str r2, [r4, #8]
6401 ; CHECK-NEXT: it lt
6402 ; CHECK-NEXT: movlt r1, #0
6403 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6404 ; CHECK-NEXT: vcmp.f32 s20, s20
6405 ; CHECK-NEXT: it gt
6406 ; CHECK-NEXT: movgt.w r1, #-1
6407 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6408 ; CHECK-NEXT: vcmp.f32 s20, s16
6409 ; CHECK-NEXT: it vs
6410 ; CHECK-NEXT: movvs r1, #0
6411 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6412 ; CHECK-NEXT: str r1, [r4, #4]
6413 ; CHECK-NEXT: it lt
6414 ; CHECK-NEXT: movlt r0, #0
6415 ; CHECK-NEXT: vcmp.f32 s20, s22
6416 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6417 ; CHECK-NEXT: it gt
6418 ; CHECK-NEXT: movgt.w r0, #-1
6419 ; CHECK-NEXT: vcmp.f32 s20, s20
6420 ; CHECK-NEXT: vmrs APSR_nzcv, fpscr
6421 ; CHECK-NEXT: it vs
6422 ; CHECK-NEXT: movvs r0, #0
6423 ; CHECK-NEXT: str r0, [r4]
6424 ; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}
6425 ; CHECK-NEXT: add sp, #4
6426 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, pc}
6427 ; CHECK-NEXT: @ %bb.4:
6428 %x = call <8 x i128> @llvm.fptosi.sat.v8f16.v8i128(<8 x half> %f)
6429 ret <8 x i128> %x
6430 }