1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s -run-pass=postrapseudos -verify-machineinstrs | FileCheck %s
4 # Test that we emit VPXORD with ZMM registers instead of YMM
5 # registers when we do not have VLX.
9 source_filename = "test.ll"
10 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
11 target triple = "x86_64-unknown-linux-gnu"
13 @tst_ = common global [4 x i64] zeroinitializer, align 64
15 define void @main() #0 {
17 %gep1 = bitcast ptr @tst_ to ptr
18 %lsr.iv1 = bitcast ptr %gep1 to ptr
19 store <4 x i64> zeroinitializer, ptr %lsr.iv1, align 16
23 attributes #0 = { "target-features"="+avx512f" }
29 exposesReturnsTwice: false
31 regBankSelected: false
34 tracksRegLiveness: true
39 isFrameAddressTaken: false
40 isReturnAddressTaken: false
50 cvBytesOfCalleeSavedRegisters: 0
51 hasOpaqueSPAdjustment: false
53 hasMustTailInVarArgFunc: false
60 machineFunctionInfo: {}
63 ; CHECK-LABEL: name: main
64 ; CHECK: $zmm16 = VPXORDZrr undef $zmm16, undef $zmm16
65 ; CHECK: VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store (s256) into %ir.lsr.iv1, align 64)
67 renamable $ymm16 = AVX512_256_SET0
68 VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store (s256) into %ir.lsr.iv1, align 64)