1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2 # RUN: llc -run-pass=break-false-deps -verify-machineinstrs %s -o - | FileCheck %s
4 # Check that BreakFalseDeps pass does not crash in presense of dead blocks.
6 ; ModuleID = 'repro.ll'
7 target datalayout = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-f80:32-n8:16:32-S128"
8 target triple = "i686-unknown-unknown"
10 declare fastcc void @hoge() #0
12 ; Function Attrs: nounwind
13 define fastcc void @widget(i32 %arg) #1 {
17 bb1: ; preds = %bb1, %bb
18 %phi = phi i1 [ true, %bb ], [ false, %bb1 ]
19 br i1 %phi, label %bb1, label %bb2
22 br i1 %phi, label %bb4, label %bb3
30 bb5: ; preds = %bb5, %bb4
31 %phi6 = phi double [ 0.000000e+00, %bb4 ], [ %fmul, %bb5 ]
32 %fptosi = fptosi double %phi6 to i32
33 %icmp = icmp slt i32 %fptosi, %arg
34 %select = select i1 %icmp, i32 %fptosi, i32 0
35 %sitofp = sitofp i32 %select to double
36 %fsub = fsub double 0.000000e+00, %sitofp
37 %fmul = fmul double 0.000000e+00, %fsub
41 declare fastcc void @quux() #0
43 declare fastcc void @hoge.1() #0
45 declare fastcc void @barney() #0
47 declare fastcc void @ham() #0
49 declare fastcc void @wombat() #0
51 attributes #0 = { "target-features"="+sse2" }
52 attributes #1 = { nounwind "target-features"="+sse2" }
58 exposesReturnsTwice: false
60 regBankSelected: false
63 tracksRegLiveness: true
66 callsUnwindInit: false
72 failsVerification: false
73 tracksDebugUserValues: true
76 - { reg: '$ecx', virtual-reg: '' }
78 isFrameAddressTaken: false
79 isReturnAddressTaken: false
90 cvBytesOfCalleeSavedRegisters: 0
91 hasOpaqueSPAdjustment: false
93 hasMustTailInVarArgFunc: false
101 debugValueSubstitutions: []
103 machineFunctionInfo: {}
105 ; CHECK-LABEL: name: widget
107 ; CHECK-NEXT: successors: %bb.1(0x80000000)
108 ; CHECK-NEXT: liveins: $ecx
110 ; CHECK-NEXT: renamable $al = MOV8ri 1, implicit-def $eax
112 ; CHECK-NEXT: bb.1.bb1 (align 16):
113 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000)
114 ; CHECK-NEXT: liveins: $eax, $ecx
116 ; CHECK-NEXT: TEST8ri renamable $al, 1, implicit-def $eflags, implicit killed $eax
117 ; CHECK-NEXT: renamable $eax = MOV32ri 0
118 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit $eflags
120 ; CHECK-NEXT: bb.2.bb3:
123 ; CHECK-NEXT: bb.3.bb5:
124 ; CHECK-NEXT: successors: %bb.3(0x80000000)
125 ; CHECK-NEXT: liveins: $eax, $ecx, $xmm0, $xmm1
127 ; CHECK-NEXT: renamable $edx = nofpexcept CVTTSD2SIrr killed renamable $xmm1, implicit $mxcsr
128 ; CHECK-NEXT: CMP32rr renamable $edx, renamable $ecx, implicit-def $eflags
129 ; CHECK-NEXT: renamable $edx = CMOV32rr killed renamable $edx, renamable $eax, 13, implicit killed $eflags
130 ; CHECK-NEXT: renamable $xmm2 = CVTSI2SDrr killed renamable $edx
131 ; CHECK-NEXT: renamable $xmm1 = XORPSrr undef $xmm1, undef $xmm1
132 ; CHECK-NEXT: renamable $xmm1 = nofpexcept SUBSDrr killed renamable $xmm1, killed renamable $xmm2, implicit $mxcsr
133 ; CHECK-NEXT: renamable $xmm1 = nofpexcept MULSDrr killed renamable $xmm1, renamable $xmm0, implicit $mxcsr
134 ; CHECK-NEXT: JMP_1 %bb.3
136 successors: %bb.1(0x80000000)
139 renamable $al = MOV8ri 1, implicit-def $eax
142 successors: %bb.1(0x7c000000), %bb.2(0x04000000)
145 TEST8ri renamable $al, 1, implicit-def $eflags, implicit killed $eax
146 renamable $eax = MOV32ri 0
147 JCC_1 %bb.1, 5, implicit $eflags
153 successors: %bb.3(0x80000000)
154 liveins: $eax, $ecx, $xmm0, $xmm1
156 renamable $edx = nofpexcept CVTTSD2SIrr killed renamable $xmm1, implicit $mxcsr
157 CMP32rr renamable $edx, renamable $ecx, implicit-def $eflags
158 renamable $edx = CMOV32rr killed renamable $edx, renamable $eax, 13, implicit killed $eflags
159 renamable $xmm2 = CVTSI2SDrr killed renamable $edx
160 renamable $xmm1 = XORPSrr undef $xmm1, undef $xmm1
161 renamable $xmm1 = nofpexcept SUBSDrr killed renamable $xmm1, killed renamable $xmm2, implicit $mxcsr
162 renamable $xmm1 = nofpexcept MULSDrr killed renamable $xmm1, renamable $xmm0, implicit $mxcsr