1 ; RUN: llc < %s | FileCheck %s
3 ; In PR44697, the register allocator inserted loads into the __except block
4 ; before the instructions that restore EBP and ESP back to what they should be.
5 ; Make sure they are the first instructions in the __except block.
8 source_filename = "t.cpp"
9 target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:32-n8:16:32-a:0:32-S32"
10 target triple = "i386-pc-windows-msvc19.24.28315"
12 declare ptr @llvm.frameaddress.p0(i32 immarg)
13 declare ptr @llvm.eh.recoverfp(ptr, ptr)
14 declare ptr @llvm.localrecover(ptr, ptr, i32 immarg)
15 declare dso_local i32 @_except_handler3(...)
16 declare void @llvm.localescape(...)
18 define dso_local zeroext i1 @invokewrapper(
20 i1 zeroext %DumpStackAndCleanup,
21 ptr nocapture dereferenceable(4) %RetCode)
22 personality ptr @_except_handler3 {
24 %__exception_code = alloca i32, align 4
25 call void (...) @llvm.localescape(ptr nonnull %__exception_code)
27 to label %return unwind label %catch.dispatch
29 catch.dispatch: ; preds = %entry
30 %0 = catchswitch within none [label %__except.ret] unwind to caller
32 __except.ret: ; preds = %catch.dispatch
33 %1 = catchpad within %0 [ptr @filter]
34 catchret from %1 to label %__except
36 __except: ; preds = %__except.ret
37 %2 = load i32, ptr %__exception_code, align 4
38 store i32 %2, ptr %RetCode, align 4
41 return: ; preds = %entry, %__except
42 %retval.0 = phi i1 [ false, %__except ], [ true, %entry ]
46 ; CHECK-LABEL: _invokewrapper: # @invokewrapper
47 ; CHECK: calll *8(%ebp)
48 ; CHECK: LBB0_2: # %return
50 ; CHECK: LBB0_1: # %__except.ret
51 ; CHECK-NEXT: movl -24(%ebp), %esp
52 ; CHECK-NEXT: addl $12, %ebp
54 ; Function Attrs: nofree nounwind
55 define internal i32 @filter() {
57 %0 = tail call ptr @llvm.frameaddress.p0(i32 1)
58 %1 = tail call ptr @llvm.eh.recoverfp(ptr @invokewrapper, ptr %0)
59 %2 = tail call ptr @llvm.localrecover(ptr @invokewrapper, ptr %1, i32 0)
60 %3 = getelementptr inbounds i8, ptr %0, i32 -20
61 %4 = load ptr, ptr %3, align 4
62 %5 = getelementptr inbounds { ptr, ptr }, ptr %4, i32 0, i32 0
63 %6 = load ptr, ptr %5, align 4
64 %7 = load i32, ptr %6, align 4
65 store i32 %7, ptr %2, align 4