1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512BWVL-FAST-ALL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512BWVL-FAST-PERLANE
10 define void @shuffle_v64i8_to_v32i8_1(ptr %L, ptr %S) nounwind {
11 ; AVX512F-LABEL: shuffle_v64i8_to_v32i8_1:
13 ; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
14 ; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
15 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm2 = [1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15,1,3,5,7,9,11,13,15]
16 ; AVX512F-NEXT: vpshufb %ymm2, %ymm1, %ymm1
17 ; AVX512F-NEXT: vpshufb %ymm2, %ymm0, %ymm0
18 ; AVX512F-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
19 ; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
20 ; AVX512F-NEXT: vmovdqa %ymm0, (%rsi)
21 ; AVX512F-NEXT: vzeroupper
24 ; AVX512BW-LABEL: shuffle_v64i8_to_v32i8_1:
26 ; AVX512BW-NEXT: vpsrlw $8, (%rdi), %zmm0
27 ; AVX512BW-NEXT: vpmovwb %zmm0, (%rsi)
28 ; AVX512BW-NEXT: vzeroupper
31 ; AVX512BWVL-LABEL: shuffle_v64i8_to_v32i8_1:
32 ; AVX512BWVL: # %bb.0:
33 ; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %zmm0
34 ; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rsi)
35 ; AVX512BWVL-NEXT: vzeroupper
36 ; AVX512BWVL-NEXT: retq
37 %vec = load <64 x i8>, ptr %L
38 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <32 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63>
39 store <32 x i8> %strided.vec, ptr %S
43 define void @shuffle_v32i16_to_v16i16_1(ptr %L, ptr %S) nounwind {
44 ; AVX512-LABEL: shuffle_v32i16_to_v16i16_1:
46 ; AVX512-NEXT: vpsrld $16, (%rdi), %zmm0
47 ; AVX512-NEXT: vpmovdw %zmm0, (%rsi)
48 ; AVX512-NEXT: vzeroupper
50 %vec = load <32 x i16>, ptr %L
51 %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
52 store <16 x i16> %strided.vec, ptr %S
56 define void @shuffle_v16i32_to_v8i32_1(ptr %L, ptr %S) nounwind {
57 ; AVX512F-LABEL: shuffle_v16i32_to_v8i32_1:
59 ; AVX512F-NEXT: vmovaps (%rdi), %ymm0
60 ; AVX512F-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],mem[1,3],ymm0[5,7],mem[5,7]
61 ; AVX512F-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,1,3]
62 ; AVX512F-NEXT: vmovaps %ymm0, (%rsi)
63 ; AVX512F-NEXT: vzeroupper
66 ; AVX512BWVL-FAST-ALL-LABEL: shuffle_v16i32_to_v8i32_1:
67 ; AVX512BWVL-FAST-ALL: # %bb.0:
68 ; AVX512BWVL-FAST-ALL-NEXT: vmovdqa (%rdi), %ymm0
69 ; AVX512BWVL-FAST-ALL-NEXT: vpmovsxbd {{.*#+}} ymm1 = [1,3,5,7,9,11,13,15]
70 ; AVX512BWVL-FAST-ALL-NEXT: vpermi2d 32(%rdi), %ymm0, %ymm1
71 ; AVX512BWVL-FAST-ALL-NEXT: vmovdqa %ymm1, (%rsi)
72 ; AVX512BWVL-FAST-ALL-NEXT: vzeroupper
73 ; AVX512BWVL-FAST-ALL-NEXT: retq
75 ; AVX512BWVL-FAST-PERLANE-LABEL: shuffle_v16i32_to_v8i32_1:
76 ; AVX512BWVL-FAST-PERLANE: # %bb.0:
77 ; AVX512BWVL-FAST-PERLANE-NEXT: vmovaps (%rdi), %ymm0
78 ; AVX512BWVL-FAST-PERLANE-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],mem[1,3],ymm0[5,7],mem[5,7]
79 ; AVX512BWVL-FAST-PERLANE-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,1,3]
80 ; AVX512BWVL-FAST-PERLANE-NEXT: vmovaps %ymm0, (%rsi)
81 ; AVX512BWVL-FAST-PERLANE-NEXT: vzeroupper
82 ; AVX512BWVL-FAST-PERLANE-NEXT: retq
83 %vec = load <16 x i32>, ptr %L
84 %strided.vec = shufflevector <16 x i32> %vec, <16 x i32> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
85 store <8 x i32> %strided.vec, ptr %S
89 define void @shuffle_v64i8_to_v16i8_1(ptr %L, ptr %S) nounwind {
90 ; AVX512-LABEL: shuffle_v64i8_to_v16i8_1:
92 ; AVX512-NEXT: vpsrld $8, (%rdi), %zmm0
93 ; AVX512-NEXT: vpmovdb %zmm0, (%rsi)
94 ; AVX512-NEXT: vzeroupper
96 %vec = load <64 x i8>, ptr %L
97 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <16 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29, i32 33, i32 37, i32 41, i32 45, i32 49, i32 53, i32 57, i32 61>
98 store <16 x i8> %strided.vec, ptr %S
102 define void @shuffle_v64i8_to_v16i8_2(ptr %L, ptr %S) nounwind {
103 ; AVX512-LABEL: shuffle_v64i8_to_v16i8_2:
105 ; AVX512-NEXT: vpsrld $16, (%rdi), %zmm0
106 ; AVX512-NEXT: vpmovdb %zmm0, (%rsi)
107 ; AVX512-NEXT: vzeroupper
109 %vec = load <64 x i8>, ptr %L
110 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <16 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 34, i32 38, i32 42, i32 46, i32 50, i32 54, i32 58, i32 62>
111 store <16 x i8> %strided.vec, ptr %S
115 define void @shuffle_v64i8_to_v16i8_3(ptr %L, ptr %S) nounwind {
116 ; AVX512-LABEL: shuffle_v64i8_to_v16i8_3:
118 ; AVX512-NEXT: vpsrld $24, (%rdi), %zmm0
119 ; AVX512-NEXT: vpmovdb %zmm0, (%rsi)
120 ; AVX512-NEXT: vzeroupper
122 %vec = load <64 x i8>, ptr %L
123 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <16 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31, i32 35, i32 39, i32 43, i32 47, i32 51, i32 55, i32 59, i32 63>
124 store <16 x i8> %strided.vec, ptr %S
128 define void @shuffle_v32i16_to_v8i16_1(ptr %L, ptr %S) nounwind {
129 ; AVX512-LABEL: shuffle_v32i16_to_v8i16_1:
131 ; AVX512-NEXT: vpsrlq $16, (%rdi), %zmm0
132 ; AVX512-NEXT: vpmovqw %zmm0, (%rsi)
133 ; AVX512-NEXT: vzeroupper
135 %vec = load <32 x i16>, ptr %L
136 %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> <i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29>
137 store <8 x i16> %strided.vec, ptr %S
141 define void @shuffle_v32i16_to_v8i16_2(ptr %L, ptr %S) nounwind {
142 ; AVX512-LABEL: shuffle_v32i16_to_v8i16_2:
144 ; AVX512-NEXT: vpsrlq $32, (%rdi), %zmm0
145 ; AVX512-NEXT: vpmovqw %zmm0, (%rsi)
146 ; AVX512-NEXT: vzeroupper
148 %vec = load <32 x i16>, ptr %L
149 %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30>
150 store <8 x i16> %strided.vec, ptr %S
154 define void @shuffle_v32i16_to_v8i16_3(ptr %L, ptr %S) nounwind {
155 ; AVX512-LABEL: shuffle_v32i16_to_v8i16_3:
157 ; AVX512-NEXT: vpsrlq $48, (%rdi), %zmm0
158 ; AVX512-NEXT: vpmovqw %zmm0, (%rsi)
159 ; AVX512-NEXT: vzeroupper
161 %vec = load <32 x i16>, ptr %L
162 %strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> <i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
163 store <8 x i16> %strided.vec, ptr %S
167 define void @shuffle_v64i8_to_v8i8_1(ptr %L, ptr %S) nounwind {
168 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_1:
170 ; AVX512-NEXT: vpsrlq $8, (%rdi), %zmm0
171 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
172 ; AVX512-NEXT: vzeroupper
174 %vec = load <64 x i8>, ptr %L
175 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 1, i32 9, i32 17, i32 25, i32 33, i32 41, i32 49, i32 57>
176 store <8 x i8> %strided.vec, ptr %S
180 define void @shuffle_v64i8_to_v8i8_2(ptr %L, ptr %S) nounwind {
181 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_2:
183 ; AVX512-NEXT: vpsrlq $16, (%rdi), %zmm0
184 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
185 ; AVX512-NEXT: vzeroupper
187 %vec = load <64 x i8>, ptr %L
188 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 2, i32 10, i32 18, i32 26, i32 34, i32 42, i32 50, i32 58>
189 store <8 x i8> %strided.vec, ptr %S
193 define void @shuffle_v64i8_to_v8i8_3(ptr %L, ptr %S) nounwind {
194 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_3:
196 ; AVX512-NEXT: vpsrlq $24, (%rdi), %zmm0
197 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
198 ; AVX512-NEXT: vzeroupper
200 %vec = load <64 x i8>, ptr %L
201 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 3, i32 11, i32 19, i32 27, i32 35, i32 43, i32 51, i32 59>
202 store <8 x i8> %strided.vec, ptr %S
206 define void @shuffle_v64i8_to_v8i8_4(ptr %L, ptr %S) nounwind {
207 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_4:
209 ; AVX512-NEXT: vpsrlq $32, (%rdi), %zmm0
210 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
211 ; AVX512-NEXT: vzeroupper
213 %vec = load <64 x i8>, ptr %L
214 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 4, i32 12, i32 20, i32 28, i32 36, i32 44, i32 52, i32 60>
215 store <8 x i8> %strided.vec, ptr %S
219 define void @shuffle_v64i8_to_v8i8_5(ptr %L, ptr %S) nounwind {
220 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_5:
222 ; AVX512-NEXT: vpsrlq $40, (%rdi), %zmm0
223 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
224 ; AVX512-NEXT: vzeroupper
226 %vec = load <64 x i8>, ptr %L
227 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 5, i32 13, i32 21, i32 29, i32 37, i32 45, i32 53, i32 61>
228 store <8 x i8> %strided.vec, ptr %S
232 define void @shuffle_v64i8_to_v8i8_6(ptr %L, ptr %S) nounwind {
233 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_6:
235 ; AVX512-NEXT: vpsrlq $48, (%rdi), %zmm0
236 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
237 ; AVX512-NEXT: vzeroupper
239 %vec = load <64 x i8>, ptr %L
240 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 6, i32 14, i32 22, i32 30, i32 38, i32 46, i32 54, i32 62>
241 store <8 x i8> %strided.vec, ptr %S
245 define void @shuffle_v64i8_to_v8i8_7(ptr %L, ptr %S) nounwind {
246 ; AVX512-LABEL: shuffle_v64i8_to_v8i8_7:
248 ; AVX512-NEXT: vpsrlq $56, (%rdi), %zmm0
249 ; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
250 ; AVX512-NEXT: vzeroupper
252 %vec = load <64 x i8>, ptr %L
253 %strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 7, i32 15, i32 23, i32 31, i32 39, i32 47, i32 55, i32 63>
254 store <8 x i8> %strided.vec, ptr %S
258 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: