| blob | 6350344457d87a5a3b46eb5c40ae307ab8f2290c |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,XOP
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX1
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX2
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX512
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX512
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX512
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX512VLBW
12 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=AVX,AVX512VL,VLVBMI
14 define <2 x i64> @var_shuffle_v2i64(<2 x i64> %v, <2 x i64> %indices) nounwind {
15 ; SSE3-LABEL: var_shuffle_v2i64:
16 ; SSE3: # %bb.0:
17 ; SSE3-NEXT: movq %xmm1, %rax
18 ; SSE3-NEXT: andl $1, %eax
19 ; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
20 ; SSE3-NEXT: movq %xmm1, %rcx
21 ; SSE3-NEXT: andl $1, %ecx
22 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
23 ; SSE3-NEXT: movsd -24(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
24 ; SSE3-NEXT: movsd -24(%rsp,%rcx,8), %xmm1 # xmm1 = mem[0],zero
25 ; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
26 ; SSE3-NEXT: retq
27 ;
28 ; SSSE3-LABEL: var_shuffle_v2i64:
29 ; SSSE3: # %bb.0:
30 ; SSSE3-NEXT: movq %xmm1, %rax
31 ; SSSE3-NEXT: andl $1, %eax
32 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
33 ; SSSE3-NEXT: movq %xmm1, %rcx
34 ; SSSE3-NEXT: andl $1, %ecx
35 ; SSSE3-NEXT: movaps %xmm0, -24(%rsp)
36 ; SSSE3-NEXT: movsd -24(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
37 ; SSSE3-NEXT: movsd -24(%rsp,%rcx,8), %xmm1 # xmm1 = mem[0],zero
38 ; SSSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
39 ; SSSE3-NEXT: retq
40 ;
41 ; SSE41-LABEL: var_shuffle_v2i64:
42 ; SSE41: # %bb.0:
43 ; SSE41-NEXT: pxor %xmm2, %xmm2
44 ; SSE41-NEXT: pcmpeqq %xmm1, %xmm2
45 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,1,0,1]
46 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
47 ; SSE41-NEXT: movdqa %xmm2, %xmm0
48 ; SSE41-NEXT: blendvpd %xmm0, %xmm3, %xmm1
49 ; SSE41-NEXT: movapd %xmm1, %xmm0
50 ; SSE41-NEXT: retq
51 ;
52 ; AVX-LABEL: var_shuffle_v2i64:
53 ; AVX: # %bb.0:
54 ; AVX-NEXT: vpaddq %xmm1, %xmm1, %xmm1
55 ; AVX-NEXT: vpermilpd %xmm1, %xmm0, %xmm0
56 ; AVX-NEXT: retq
57 %index0 = extractelement <2 x i64> %indices, i32 0
58 %index1 = extractelement <2 x i64> %indices, i32 1
59 %v0 = extractelement <2 x i64> %v, i64 %index0
60 %v1 = extractelement <2 x i64> %v, i64 %index1
61 %ret0 = insertelement <2 x i64> undef, i64 %v0, i32 0
62 %ret1 = insertelement <2 x i64> %ret0, i64 %v1, i32 1
63 ret <2 x i64> %ret1
64 }
66 define <4 x i32> @var_shuffle_v4i32(<4 x i32> %v, <4 x i32> %indices) nounwind {
67 ; SSE3-LABEL: var_shuffle_v4i32:
68 ; SSE3: # %bb.0:
69 ; SSE3-NEXT: movd %xmm1, %eax
70 ; SSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
71 ; SSE3-NEXT: movd %xmm2, %ecx
72 ; SSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
73 ; SSE3-NEXT: movd %xmm2, %edx
74 ; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
75 ; SSE3-NEXT: movd %xmm1, %esi
76 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
77 ; SSE3-NEXT: andl $3, %eax
78 ; SSE3-NEXT: andl $3, %ecx
79 ; SSE3-NEXT: andl $3, %edx
80 ; SSE3-NEXT: andl $3, %esi
81 ; SSE3-NEXT: movss -24(%rsp,%rsi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
82 ; SSE3-NEXT: movss -24(%rsp,%rdx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
83 ; SSE3-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
84 ; SSE3-NEXT: movss -24(%rsp,%rax,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
85 ; SSE3-NEXT: movss -24(%rsp,%rcx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
86 ; SSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
87 ; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
88 ; SSE3-NEXT: retq
89 ;
90 ; SSSE3-LABEL: var_shuffle_v4i32:
91 ; SSSE3: # %bb.0:
92 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [67372036,67372036,67372036,67372036]
93 ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
94 ; SSSE3-NEXT: pmuludq %xmm2, %xmm1
95 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
96 ; SSSE3-NEXT: pmuludq %xmm2, %xmm3
97 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
98 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
99 ; SSSE3-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
100 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
101 ; SSSE3-NEXT: retq
102 ;
103 ; SSE41-LABEL: var_shuffle_v4i32:
104 ; SSE41: # %bb.0:
105 ; SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
106 ; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
107 ; SSE41-NEXT: pshufb %xmm1, %xmm0
108 ; SSE41-NEXT: retq
109 ;
110 ; AVX-LABEL: var_shuffle_v4i32:
111 ; AVX: # %bb.0:
112 ; AVX-NEXT: vpermilps %xmm1, %xmm0, %xmm0
113 ; AVX-NEXT: retq
114 %index0 = extractelement <4 x i32> %indices, i32 0
115 %index1 = extractelement <4 x i32> %indices, i32 1
116 %index2 = extractelement <4 x i32> %indices, i32 2
117 %index3 = extractelement <4 x i32> %indices, i32 3
118 %v0 = extractelement <4 x i32> %v, i32 %index0
119 %v1 = extractelement <4 x i32> %v, i32 %index1
120 %v2 = extractelement <4 x i32> %v, i32 %index2
121 %v3 = extractelement <4 x i32> %v, i32 %index3
122 %ret0 = insertelement <4 x i32> undef, i32 %v0, i32 0
123 %ret1 = insertelement <4 x i32> %ret0, i32 %v1, i32 1
124 %ret2 = insertelement <4 x i32> %ret1, i32 %v2, i32 2
125 %ret3 = insertelement <4 x i32> %ret2, i32 %v3, i32 3
126 ret <4 x i32> %ret3
127 }
129 define <8 x i16> @var_shuffle_v8i16(<8 x i16> %v, <8 x i16> %indices) nounwind {
130 ; SSE3-LABEL: var_shuffle_v8i16:
131 ; SSE3: # %bb.0:
132 ; SSE3-NEXT: pextrw $0, %xmm1, %eax
133 ; SSE3-NEXT: pextrw $1, %xmm1, %ecx
134 ; SSE3-NEXT: pextrw $2, %xmm1, %edx
135 ; SSE3-NEXT: pextrw $3, %xmm1, %esi
136 ; SSE3-NEXT: pextrw $4, %xmm1, %edi
137 ; SSE3-NEXT: pextrw $5, %xmm1, %r8d
138 ; SSE3-NEXT: pextrw $6, %xmm1, %r9d
139 ; SSE3-NEXT: pextrw $7, %xmm1, %r10d
140 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
141 ; SSE3-NEXT: andl $7, %eax
142 ; SSE3-NEXT: andl $7, %ecx
143 ; SSE3-NEXT: andl $7, %edx
144 ; SSE3-NEXT: andl $7, %esi
145 ; SSE3-NEXT: andl $7, %edi
146 ; SSE3-NEXT: andl $7, %r8d
147 ; SSE3-NEXT: andl $7, %r9d
148 ; SSE3-NEXT: andl $7, %r10d
149 ; SSE3-NEXT: movzwl -24(%rsp,%r10,2), %r10d
150 ; SSE3-NEXT: movd %r10d, %xmm0
151 ; SSE3-NEXT: movzwl -24(%rsp,%r9,2), %r9d
152 ; SSE3-NEXT: movd %r9d, %xmm1
153 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
154 ; SSE3-NEXT: movzwl -24(%rsp,%r8,2), %r8d
155 ; SSE3-NEXT: movd %r8d, %xmm0
156 ; SSE3-NEXT: movzwl -24(%rsp,%rdi,2), %edi
157 ; SSE3-NEXT: movd %edi, %xmm2
158 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
159 ; SSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
160 ; SSE3-NEXT: movzwl -24(%rsp,%rsi,2), %esi
161 ; SSE3-NEXT: movd %esi, %xmm0
162 ; SSE3-NEXT: movzwl -24(%rsp,%rdx,2), %edx
163 ; SSE3-NEXT: movd %edx, %xmm1
164 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
165 ; SSE3-NEXT: movzwl -24(%rsp,%rcx,2), %ecx
166 ; SSE3-NEXT: movd %ecx, %xmm3
167 ; SSE3-NEXT: movzwl -24(%rsp,%rax,2), %eax
168 ; SSE3-NEXT: movd %eax, %xmm0
169 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
170 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
171 ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
172 ; SSE3-NEXT: retq
173 ;
174 ; SSSE3-LABEL: var_shuffle_v8i16:
175 ; SSSE3: # %bb.0:
176 ; SSSE3-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [514,514,514,514,514,514,514,514]
177 ; SSSE3-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
178 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
179 ; SSSE3-NEXT: retq
180 ;
181 ; SSE41-LABEL: var_shuffle_v8i16:
182 ; SSE41: # %bb.0:
183 ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [514,514,514,514,514,514,514,514]
184 ; SSE41-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
185 ; SSE41-NEXT: pshufb %xmm1, %xmm0
186 ; SSE41-NEXT: retq
187 ;
188 ; AVXNOVLBW-LABEL: var_shuffle_v8i16:
189 ; AVXNOVLBW: # %bb.0:
190 ; AVXNOVLBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [514,514,514,514,514,514,514,514]
191 ; AVXNOVLBW-NEXT: vpaddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
192 ; AVXNOVLBW-NEXT: vpshufb %xmm1, %xmm0, %xmm0
193 ; AVXNOVLBW-NEXT: retq
194 ;
195 ; AVX512VL-LABEL: var_shuffle_v8i16:
196 ; AVX512VL: # %bb.0:
197 ; AVX512VL-NEXT: vpermw %xmm0, %xmm1, %xmm0
198 ; AVX512VL-NEXT: retq
199 %index0 = extractelement <8 x i16> %indices, i32 0
200 %index1 = extractelement <8 x i16> %indices, i32 1
201 %index2 = extractelement <8 x i16> %indices, i32 2
202 %index3 = extractelement <8 x i16> %indices, i32 3
203 %index4 = extractelement <8 x i16> %indices, i32 4
204 %index5 = extractelement <8 x i16> %indices, i32 5
205 %index6 = extractelement <8 x i16> %indices, i32 6
206 %index7 = extractelement <8 x i16> %indices, i32 7
207 %v0 = extractelement <8 x i16> %v, i16 %index0
208 %v1 = extractelement <8 x i16> %v, i16 %index1
209 %v2 = extractelement <8 x i16> %v, i16 %index2
210 %v3 = extractelement <8 x i16> %v, i16 %index3
211 %v4 = extractelement <8 x i16> %v, i16 %index4
212 %v5 = extractelement <8 x i16> %v, i16 %index5
213 %v6 = extractelement <8 x i16> %v, i16 %index6
214 %v7 = extractelement <8 x i16> %v, i16 %index7
215 %ret0 = insertelement <8 x i16> undef, i16 %v0, i32 0
216 %ret1 = insertelement <8 x i16> %ret0, i16 %v1, i32 1
217 %ret2 = insertelement <8 x i16> %ret1, i16 %v2, i32 2
218 %ret3 = insertelement <8 x i16> %ret2, i16 %v3, i32 3
219 %ret4 = insertelement <8 x i16> %ret3, i16 %v4, i32 4
220 %ret5 = insertelement <8 x i16> %ret4, i16 %v5, i32 5
221 %ret6 = insertelement <8 x i16> %ret5, i16 %v6, i32 6
222 %ret7 = insertelement <8 x i16> %ret6, i16 %v7, i32 7
223 ret <8 x i16> %ret7
224 }
226 define <16 x i8> @var_shuffle_v16i8(<16 x i8> %v, <16 x i8> %indices) nounwind {
227 ; SSE3-LABEL: var_shuffle_v16i8:
228 ; SSE3: # %bb.0:
229 ; SSE3-NEXT: movaps %xmm1, -40(%rsp)
230 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
231 ; SSE3-NEXT: movzbl -25(%rsp), %eax
232 ; SSE3-NEXT: andl $15, %eax
233 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
234 ; SSE3-NEXT: movd %eax, %xmm1
235 ; SSE3-NEXT: movzbl -26(%rsp), %eax
236 ; SSE3-NEXT: andl $15, %eax
237 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
238 ; SSE3-NEXT: movd %eax, %xmm2
239 ; SSE3-NEXT: movzbl -27(%rsp), %eax
240 ; SSE3-NEXT: andl $15, %eax
241 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
242 ; SSE3-NEXT: movd %eax, %xmm4
243 ; SSE3-NEXT: movzbl -28(%rsp), %eax
244 ; SSE3-NEXT: andl $15, %eax
245 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
246 ; SSE3-NEXT: movd %eax, %xmm3
247 ; SSE3-NEXT: movzbl -29(%rsp), %eax
248 ; SSE3-NEXT: andl $15, %eax
249 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
250 ; SSE3-NEXT: movd %eax, %xmm6
251 ; SSE3-NEXT: movzbl -30(%rsp), %eax
252 ; SSE3-NEXT: andl $15, %eax
253 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
254 ; SSE3-NEXT: movd %eax, %xmm7
255 ; SSE3-NEXT: movzbl -31(%rsp), %eax
256 ; SSE3-NEXT: andl $15, %eax
257 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
258 ; SSE3-NEXT: movd %eax, %xmm8
259 ; SSE3-NEXT: movzbl -32(%rsp), %eax
260 ; SSE3-NEXT: andl $15, %eax
261 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
262 ; SSE3-NEXT: movd %eax, %xmm5
263 ; SSE3-NEXT: movzbl -33(%rsp), %eax
264 ; SSE3-NEXT: andl $15, %eax
265 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
266 ; SSE3-NEXT: movd %eax, %xmm9
267 ; SSE3-NEXT: movzbl -34(%rsp), %eax
268 ; SSE3-NEXT: andl $15, %eax
269 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
270 ; SSE3-NEXT: movd %eax, %xmm10
271 ; SSE3-NEXT: movzbl -35(%rsp), %eax
272 ; SSE3-NEXT: andl $15, %eax
273 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
274 ; SSE3-NEXT: movd %eax, %xmm12
275 ; SSE3-NEXT: movzbl -36(%rsp), %eax
276 ; SSE3-NEXT: andl $15, %eax
277 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
278 ; SSE3-NEXT: movd %eax, %xmm11
279 ; SSE3-NEXT: movzbl -37(%rsp), %eax
280 ; SSE3-NEXT: andl $15, %eax
281 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
282 ; SSE3-NEXT: movd %eax, %xmm13
283 ; SSE3-NEXT: movzbl -38(%rsp), %eax
284 ; SSE3-NEXT: andl $15, %eax
285 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
286 ; SSE3-NEXT: movd %eax, %xmm14
287 ; SSE3-NEXT: movzbl -39(%rsp), %eax
288 ; SSE3-NEXT: andl $15, %eax
289 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
290 ; SSE3-NEXT: movd %eax, %xmm15
291 ; SSE3-NEXT: movzbl -40(%rsp), %eax
292 ; SSE3-NEXT: andl $15, %eax
293 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
294 ; SSE3-NEXT: movd %eax, %xmm0
295 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
296 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
297 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
298 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
299 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm8[0],xmm5[1],xmm8[1],xmm5[2],xmm8[2],xmm5[3],xmm8[3],xmm5[4],xmm8[4],xmm5[5],xmm8[5],xmm5[6],xmm8[6],xmm5[7],xmm8[7]
300 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3]
301 ; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
302 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3],xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
303 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3],xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
304 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
305 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
306 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3],xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
307 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
308 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm11[0],xmm0[1],xmm11[1]
309 ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
310 ; SSE3-NEXT: retq
311 ;
312 ; SSSE3-LABEL: var_shuffle_v16i8:
313 ; SSSE3: # %bb.0:
314 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
315 ; SSSE3-NEXT: retq
316 ;
317 ; SSE41-LABEL: var_shuffle_v16i8:
318 ; SSE41: # %bb.0:
319 ; SSE41-NEXT: pshufb %xmm1, %xmm0
320 ; SSE41-NEXT: retq
321 ;
322 ; AVX-LABEL: var_shuffle_v16i8:
323 ; AVX: # %bb.0:
324 ; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0
325 ; AVX-NEXT: retq
326 %index0 = extractelement <16 x i8> %indices, i32 0
327 %index1 = extractelement <16 x i8> %indices, i32 1
328 %index2 = extractelement <16 x i8> %indices, i32 2
329 %index3 = extractelement <16 x i8> %indices, i32 3
330 %index4 = extractelement <16 x i8> %indices, i32 4
331 %index5 = extractelement <16 x i8> %indices, i32 5
332 %index6 = extractelement <16 x i8> %indices, i32 6
333 %index7 = extractelement <16 x i8> %indices, i32 7
334 %index8 = extractelement <16 x i8> %indices, i32 8
335 %index9 = extractelement <16 x i8> %indices, i32 9
336 %index10 = extractelement <16 x i8> %indices, i32 10
337 %index11 = extractelement <16 x i8> %indices, i32 11
338 %index12 = extractelement <16 x i8> %indices, i32 12
339 %index13 = extractelement <16 x i8> %indices, i32 13
340 %index14 = extractelement <16 x i8> %indices, i32 14
341 %index15 = extractelement <16 x i8> %indices, i32 15
342 %v0 = extractelement <16 x i8> %v, i8 %index0
343 %v1 = extractelement <16 x i8> %v, i8 %index1
344 %v2 = extractelement <16 x i8> %v, i8 %index2
345 %v3 = extractelement <16 x i8> %v, i8 %index3
346 %v4 = extractelement <16 x i8> %v, i8 %index4
347 %v5 = extractelement <16 x i8> %v, i8 %index5
348 %v6 = extractelement <16 x i8> %v, i8 %index6
349 %v7 = extractelement <16 x i8> %v, i8 %index7
350 %v8 = extractelement <16 x i8> %v, i8 %index8
351 %v9 = extractelement <16 x i8> %v, i8 %index9
352 %v10 = extractelement <16 x i8> %v, i8 %index10
353 %v11 = extractelement <16 x i8> %v, i8 %index11
354 %v12 = extractelement <16 x i8> %v, i8 %index12
355 %v13 = extractelement <16 x i8> %v, i8 %index13
356 %v14 = extractelement <16 x i8> %v, i8 %index14
357 %v15 = extractelement <16 x i8> %v, i8 %index15
358 %ret0 = insertelement <16 x i8> undef, i8 %v0, i32 0
359 %ret1 = insertelement <16 x i8> %ret0, i8 %v1, i32 1
360 %ret2 = insertelement <16 x i8> %ret1, i8 %v2, i32 2
361 %ret3 = insertelement <16 x i8> %ret2, i8 %v3, i32 3
362 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
363 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
364 %ret6 = insertelement <16 x i8> %ret5, i8 %v6, i32 6
365 %ret7 = insertelement <16 x i8> %ret6, i8 %v7, i32 7
366 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
367 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
368 %ret10 = insertelement <16 x i8> %ret9, i8 %v10, i32 10
369 %ret11 = insertelement <16 x i8> %ret10, i8 %v11, i32 11
370 %ret12 = insertelement <16 x i8> %ret11, i8 %v12, i32 12
371 %ret13 = insertelement <16 x i8> %ret12, i8 %v13, i32 13
372 %ret14 = insertelement <16 x i8> %ret13, i8 %v14, i32 14
373 %ret15 = insertelement <16 x i8> %ret14, i8 %v15, i32 15
374 ret <16 x i8> %ret15
375 }
377 define <2 x double> @var_shuffle_v2f64(<2 x double> %v, <2 x i64> %indices) nounwind {
378 ; SSE3-LABEL: var_shuffle_v2f64:
379 ; SSE3: # %bb.0:
380 ; SSE3-NEXT: movq %xmm1, %rax
381 ; SSE3-NEXT: andl $1, %eax
382 ; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
383 ; SSE3-NEXT: movq %xmm1, %rcx
384 ; SSE3-NEXT: andl $1, %ecx
385 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
386 ; SSE3-NEXT: movsd -24(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
387 ; SSE3-NEXT: movhps -24(%rsp,%rcx,8), %xmm0 # xmm0 = xmm0[0,1],mem[0,1]
388 ; SSE3-NEXT: retq
389 ;
390 ; SSSE3-LABEL: var_shuffle_v2f64:
391 ; SSSE3: # %bb.0:
392 ; SSSE3-NEXT: movq %xmm1, %rax
393 ; SSSE3-NEXT: andl $1, %eax
394 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
395 ; SSSE3-NEXT: movq %xmm1, %rcx
396 ; SSSE3-NEXT: andl $1, %ecx
397 ; SSSE3-NEXT: movaps %xmm0, -24(%rsp)
398 ; SSSE3-NEXT: movsd -24(%rsp,%rax,8), %xmm0 # xmm0 = mem[0],zero
399 ; SSSE3-NEXT: movhps -24(%rsp,%rcx,8), %xmm0 # xmm0 = xmm0[0,1],mem[0,1]
400 ; SSSE3-NEXT: retq
401 ;
402 ; SSE41-LABEL: var_shuffle_v2f64:
403 ; SSE41: # %bb.0:
404 ; SSE41-NEXT: movdqa %xmm0, %xmm2
405 ; SSE41-NEXT: pxor %xmm0, %xmm0
406 ; SSE41-NEXT: pcmpeqq %xmm1, %xmm0
407 ; SSE41-NEXT: movddup {{.*#+}} xmm1 = xmm2[0,0]
408 ; SSE41-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1,1]
409 ; SSE41-NEXT: blendvpd %xmm0, %xmm1, %xmm2
410 ; SSE41-NEXT: movapd %xmm2, %xmm0
411 ; SSE41-NEXT: retq
412 ;
413 ; AVX-LABEL: var_shuffle_v2f64:
414 ; AVX: # %bb.0:
415 ; AVX-NEXT: vpaddq %xmm1, %xmm1, %xmm1
416 ; AVX-NEXT: vpermilpd %xmm1, %xmm0, %xmm0
417 ; AVX-NEXT: retq
418 %index0 = extractelement <2 x i64> %indices, i32 0
419 %index1 = extractelement <2 x i64> %indices, i32 1
420 %v0 = extractelement <2 x double> %v, i64 %index0
421 %v1 = extractelement <2 x double> %v, i64 %index1
422 %ret0 = insertelement <2 x double> undef, double %v0, i32 0
423 %ret1 = insertelement <2 x double> %ret0, double %v1, i32 1
424 ret <2 x double> %ret1
425 }
427 define <4 x float> @var_shuffle_v4f32(<4 x float> %v, <4 x i32> %indices) nounwind {
428 ; SSE3-LABEL: var_shuffle_v4f32:
429 ; SSE3: # %bb.0:
430 ; SSE3-NEXT: movd %xmm1, %eax
431 ; SSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
432 ; SSE3-NEXT: movd %xmm2, %ecx
433 ; SSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
434 ; SSE3-NEXT: movd %xmm2, %edx
435 ; SSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
436 ; SSE3-NEXT: movd %xmm1, %esi
437 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
438 ; SSE3-NEXT: andl $3, %eax
439 ; SSE3-NEXT: andl $3, %ecx
440 ; SSE3-NEXT: andl $3, %edx
441 ; SSE3-NEXT: andl $3, %esi
442 ; SSE3-NEXT: movss -24(%rsp,%rsi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
443 ; SSE3-NEXT: movss -24(%rsp,%rdx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
444 ; SSE3-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
445 ; SSE3-NEXT: movss -24(%rsp,%rax,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
446 ; SSE3-NEXT: movss -24(%rsp,%rcx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
447 ; SSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
448 ; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
449 ; SSE3-NEXT: retq
450 ;
451 ; SSSE3-LABEL: var_shuffle_v4f32:
452 ; SSSE3: # %bb.0:
453 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [67372036,67372036,67372036,67372036]
454 ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
455 ; SSSE3-NEXT: pmuludq %xmm2, %xmm1
456 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
457 ; SSSE3-NEXT: pmuludq %xmm2, %xmm3
458 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
459 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
460 ; SSSE3-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
461 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
462 ; SSSE3-NEXT: retq
463 ;
464 ; SSE41-LABEL: var_shuffle_v4f32:
465 ; SSE41: # %bb.0:
466 ; SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
467 ; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
468 ; SSE41-NEXT: pshufb %xmm1, %xmm0
469 ; SSE41-NEXT: retq
470 ;
471 ; AVX-LABEL: var_shuffle_v4f32:
472 ; AVX: # %bb.0:
473 ; AVX-NEXT: vpermilps %xmm1, %xmm0, %xmm0
474 ; AVX-NEXT: retq
475 %index0 = extractelement <4 x i32> %indices, i32 0
476 %index1 = extractelement <4 x i32> %indices, i32 1
477 %index2 = extractelement <4 x i32> %indices, i32 2
478 %index3 = extractelement <4 x i32> %indices, i32 3
479 %v0 = extractelement <4 x float> %v, i32 %index0
480 %v1 = extractelement <4 x float> %v, i32 %index1
481 %v2 = extractelement <4 x float> %v, i32 %index2
482 %v3 = extractelement <4 x float> %v, i32 %index3
483 %ret0 = insertelement <4 x float> undef, float %v0, i32 0
484 %ret1 = insertelement <4 x float> %ret0, float %v1, i32 1
485 %ret2 = insertelement <4 x float> %ret1, float %v2, i32 2
486 %ret3 = insertelement <4 x float> %ret2, float %v3, i32 3
487 ret <4 x float> %ret3
488 }
490 define <16 x i8> @var_shuffle_v16i8_from_v16i8_v32i8(<16 x i8> %v, <32 x i8> %indices) nounwind {
491 ; SSE3-LABEL: var_shuffle_v16i8_from_v16i8_v32i8:
492 ; SSE3: # %bb.0:
493 ; SSE3-NEXT: movaps %xmm1, -40(%rsp)
494 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
495 ; SSE3-NEXT: movzbl -25(%rsp), %eax
496 ; SSE3-NEXT: andl $15, %eax
497 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
498 ; SSE3-NEXT: movd %eax, %xmm1
499 ; SSE3-NEXT: movzbl -26(%rsp), %eax
500 ; SSE3-NEXT: andl $15, %eax
501 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
502 ; SSE3-NEXT: movd %eax, %xmm2
503 ; SSE3-NEXT: movzbl -27(%rsp), %eax
504 ; SSE3-NEXT: andl $15, %eax
505 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
506 ; SSE3-NEXT: movd %eax, %xmm4
507 ; SSE3-NEXT: movzbl -28(%rsp), %eax
508 ; SSE3-NEXT: andl $15, %eax
509 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
510 ; SSE3-NEXT: movd %eax, %xmm3
511 ; SSE3-NEXT: movzbl -29(%rsp), %eax
512 ; SSE3-NEXT: andl $15, %eax
513 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
514 ; SSE3-NEXT: movd %eax, %xmm6
515 ; SSE3-NEXT: movzbl -30(%rsp), %eax
516 ; SSE3-NEXT: andl $15, %eax
517 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
518 ; SSE3-NEXT: movd %eax, %xmm7
519 ; SSE3-NEXT: movzbl -31(%rsp), %eax
520 ; SSE3-NEXT: andl $15, %eax
521 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
522 ; SSE3-NEXT: movd %eax, %xmm8
523 ; SSE3-NEXT: movzbl -32(%rsp), %eax
524 ; SSE3-NEXT: andl $15, %eax
525 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
526 ; SSE3-NEXT: movd %eax, %xmm5
527 ; SSE3-NEXT: movzbl -33(%rsp), %eax
528 ; SSE3-NEXT: andl $15, %eax
529 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
530 ; SSE3-NEXT: movd %eax, %xmm9
531 ; SSE3-NEXT: movzbl -34(%rsp), %eax
532 ; SSE3-NEXT: andl $15, %eax
533 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
534 ; SSE3-NEXT: movd %eax, %xmm10
535 ; SSE3-NEXT: movzbl -35(%rsp), %eax
536 ; SSE3-NEXT: andl $15, %eax
537 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
538 ; SSE3-NEXT: movd %eax, %xmm12
539 ; SSE3-NEXT: movzbl -36(%rsp), %eax
540 ; SSE3-NEXT: andl $15, %eax
541 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
542 ; SSE3-NEXT: movd %eax, %xmm11
543 ; SSE3-NEXT: movzbl -37(%rsp), %eax
544 ; SSE3-NEXT: andl $15, %eax
545 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
546 ; SSE3-NEXT: movd %eax, %xmm13
547 ; SSE3-NEXT: movzbl -38(%rsp), %eax
548 ; SSE3-NEXT: andl $15, %eax
549 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
550 ; SSE3-NEXT: movd %eax, %xmm14
551 ; SSE3-NEXT: movzbl -39(%rsp), %eax
552 ; SSE3-NEXT: andl $15, %eax
553 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
554 ; SSE3-NEXT: movd %eax, %xmm15
555 ; SSE3-NEXT: movzbl -40(%rsp), %eax
556 ; SSE3-NEXT: andl $15, %eax
557 ; SSE3-NEXT: movzbl -24(%rsp,%rax), %eax
558 ; SSE3-NEXT: movd %eax, %xmm0
559 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
560 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
561 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
562 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
563 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm8[0],xmm5[1],xmm8[1],xmm5[2],xmm8[2],xmm5[3],xmm8[3],xmm5[4],xmm8[4],xmm5[5],xmm8[5],xmm5[6],xmm8[6],xmm5[7],xmm8[7]
564 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3]
565 ; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
566 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3],xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
567 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3],xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
568 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
569 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
570 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3],xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
571 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
572 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm11[0],xmm0[1],xmm11[1]
573 ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
574 ; SSE3-NEXT: retq
575 ;
576 ; SSSE3-LABEL: var_shuffle_v16i8_from_v16i8_v32i8:
577 ; SSSE3: # %bb.0:
578 ; SSSE3-NEXT: pshufb %xmm1, %xmm0
579 ; SSSE3-NEXT: retq
580 ;
581 ; SSE41-LABEL: var_shuffle_v16i8_from_v16i8_v32i8:
582 ; SSE41: # %bb.0:
583 ; SSE41-NEXT: pshufb %xmm1, %xmm0
584 ; SSE41-NEXT: retq
585 ;
586 ; AVX-LABEL: var_shuffle_v16i8_from_v16i8_v32i8:
587 ; AVX: # %bb.0:
588 ; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0
589 ; AVX-NEXT: vzeroupper
590 ; AVX-NEXT: retq
591 %index0 = extractelement <32 x i8> %indices, i32 0
592 %index1 = extractelement <32 x i8> %indices, i32 1
593 %index2 = extractelement <32 x i8> %indices, i32 2
594 %index3 = extractelement <32 x i8> %indices, i32 3
595 %index4 = extractelement <32 x i8> %indices, i32 4
596 %index5 = extractelement <32 x i8> %indices, i32 5
597 %index6 = extractelement <32 x i8> %indices, i32 6
598 %index7 = extractelement <32 x i8> %indices, i32 7
599 %index8 = extractelement <32 x i8> %indices, i32 8
600 %index9 = extractelement <32 x i8> %indices, i32 9
601 %index10 = extractelement <32 x i8> %indices, i32 10
602 %index11 = extractelement <32 x i8> %indices, i32 11
603 %index12 = extractelement <32 x i8> %indices, i32 12
604 %index13 = extractelement <32 x i8> %indices, i32 13
605 %index14 = extractelement <32 x i8> %indices, i32 14
606 %index15 = extractelement <32 x i8> %indices, i32 15
607 %v0 = extractelement <16 x i8> %v, i8 %index0
608 %v1 = extractelement <16 x i8> %v, i8 %index1
609 %v2 = extractelement <16 x i8> %v, i8 %index2
610 %v3 = extractelement <16 x i8> %v, i8 %index3
611 %v4 = extractelement <16 x i8> %v, i8 %index4
612 %v5 = extractelement <16 x i8> %v, i8 %index5
613 %v6 = extractelement <16 x i8> %v, i8 %index6
614 %v7 = extractelement <16 x i8> %v, i8 %index7
615 %v8 = extractelement <16 x i8> %v, i8 %index8
616 %v9 = extractelement <16 x i8> %v, i8 %index9
617 %v10 = extractelement <16 x i8> %v, i8 %index10
618 %v11 = extractelement <16 x i8> %v, i8 %index11
619 %v12 = extractelement <16 x i8> %v, i8 %index12
620 %v13 = extractelement <16 x i8> %v, i8 %index13
621 %v14 = extractelement <16 x i8> %v, i8 %index14
622 %v15 = extractelement <16 x i8> %v, i8 %index15
623 %ret0 = insertelement <16 x i8> undef, i8 %v0, i32 0
624 %ret1 = insertelement <16 x i8> %ret0, i8 %v1, i32 1
625 %ret2 = insertelement <16 x i8> %ret1, i8 %v2, i32 2
626 %ret3 = insertelement <16 x i8> %ret2, i8 %v3, i32 3
627 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
628 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
629 %ret6 = insertelement <16 x i8> %ret5, i8 %v6, i32 6
630 %ret7 = insertelement <16 x i8> %ret6, i8 %v7, i32 7
631 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
632 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
633 %ret10 = insertelement <16 x i8> %ret9, i8 %v10, i32 10
634 %ret11 = insertelement <16 x i8> %ret10, i8 %v11, i32 11
635 %ret12 = insertelement <16 x i8> %ret11, i8 %v12, i32 12
636 %ret13 = insertelement <16 x i8> %ret12, i8 %v13, i32 13
637 %ret14 = insertelement <16 x i8> %ret13, i8 %v14, i32 14
638 %ret15 = insertelement <16 x i8> %ret14, i8 %v15, i32 15
639 ret <16 x i8> %ret15
640 }
642 define <16 x i8> @var_shuffle_v16i8_from_v32i8_v16i8(<32 x i8> %v, <16 x i8> %indices) nounwind {
643 ; SSE3-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
644 ; SSE3: # %bb.0:
645 ; SSE3-NEXT: pushq %rbp
646 ; SSE3-NEXT: pushq %r15
647 ; SSE3-NEXT: pushq %r14
648 ; SSE3-NEXT: pushq %r13
649 ; SSE3-NEXT: pushq %r12
650 ; SSE3-NEXT: pushq %rbx
651 ; SSE3-NEXT: subq $424, %rsp # imm = 0x1A8
652 ; SSE3-NEXT: movaps %xmm2, -128(%rsp)
653 ; SSE3-NEXT: movaps %xmm1, 400(%rsp)
654 ; SSE3-NEXT: movaps %xmm0, 384(%rsp)
655 ; SSE3-NEXT: movzbl -128(%rsp), %eax
656 ; SSE3-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
657 ; SSE3-NEXT: movaps %xmm1, 368(%rsp)
658 ; SSE3-NEXT: movaps %xmm0, 352(%rsp)
659 ; SSE3-NEXT: movzbl -127(%rsp), %ecx
660 ; SSE3-NEXT: movaps %xmm1, 336(%rsp)
661 ; SSE3-NEXT: movaps %xmm0, 320(%rsp)
662 ; SSE3-NEXT: movzbl -126(%rsp), %edx
663 ; SSE3-NEXT: movaps %xmm1, 304(%rsp)
664 ; SSE3-NEXT: movaps %xmm0, 288(%rsp)
665 ; SSE3-NEXT: movzbl -125(%rsp), %esi
666 ; SSE3-NEXT: movaps %xmm1, 272(%rsp)
667 ; SSE3-NEXT: movaps %xmm0, 256(%rsp)
668 ; SSE3-NEXT: movzbl -124(%rsp), %edi
669 ; SSE3-NEXT: movaps %xmm1, 240(%rsp)
670 ; SSE3-NEXT: movaps %xmm0, 224(%rsp)
671 ; SSE3-NEXT: movzbl -123(%rsp), %r8d
672 ; SSE3-NEXT: movaps %xmm1, 208(%rsp)
673 ; SSE3-NEXT: movaps %xmm0, 192(%rsp)
674 ; SSE3-NEXT: movzbl -122(%rsp), %r9d
675 ; SSE3-NEXT: movaps %xmm1, 176(%rsp)
676 ; SSE3-NEXT: movaps %xmm0, 160(%rsp)
677 ; SSE3-NEXT: movzbl -121(%rsp), %r10d
678 ; SSE3-NEXT: movaps %xmm1, 144(%rsp)
679 ; SSE3-NEXT: movaps %xmm0, 128(%rsp)
680 ; SSE3-NEXT: movzbl -120(%rsp), %r11d
681 ; SSE3-NEXT: movaps %xmm1, 112(%rsp)
682 ; SSE3-NEXT: movaps %xmm0, 96(%rsp)
683 ; SSE3-NEXT: movzbl -119(%rsp), %ebx
684 ; SSE3-NEXT: movaps %xmm1, 80(%rsp)
685 ; SSE3-NEXT: movaps %xmm0, 64(%rsp)
686 ; SSE3-NEXT: movzbl -118(%rsp), %r14d
687 ; SSE3-NEXT: movaps %xmm1, 48(%rsp)
688 ; SSE3-NEXT: movaps %xmm0, 32(%rsp)
689 ; SSE3-NEXT: movzbl -117(%rsp), %r15d
690 ; SSE3-NEXT: movaps %xmm1, 16(%rsp)
691 ; SSE3-NEXT: movaps %xmm0, (%rsp)
692 ; SSE3-NEXT: movzbl -116(%rsp), %r12d
693 ; SSE3-NEXT: movaps %xmm1, -16(%rsp)
694 ; SSE3-NEXT: movaps %xmm0, -32(%rsp)
695 ; SSE3-NEXT: movzbl -115(%rsp), %r13d
696 ; SSE3-NEXT: movaps %xmm1, -48(%rsp)
697 ; SSE3-NEXT: movaps %xmm0, -64(%rsp)
698 ; SSE3-NEXT: movzbl -114(%rsp), %ebp
699 ; SSE3-NEXT: movaps %xmm1, -80(%rsp)
700 ; SSE3-NEXT: movaps %xmm0, -96(%rsp)
701 ; SSE3-NEXT: movzbl -113(%rsp), %eax
702 ; SSE3-NEXT: andl $31, %eax
703 ; SSE3-NEXT: movzbl -96(%rsp,%rax), %eax
704 ; SSE3-NEXT: movd %eax, %xmm1
705 ; SSE3-NEXT: andl $31, %ebp
706 ; SSE3-NEXT: movzbl -64(%rsp,%rbp), %eax
707 ; SSE3-NEXT: movd %eax, %xmm2
708 ; SSE3-NEXT: andl $31, %r13d
709 ; SSE3-NEXT: movzbl -32(%rsp,%r13), %eax
710 ; SSE3-NEXT: movd %eax, %xmm4
711 ; SSE3-NEXT: andl $31, %r12d
712 ; SSE3-NEXT: movzbl (%rsp,%r12), %eax
713 ; SSE3-NEXT: movd %eax, %xmm3
714 ; SSE3-NEXT: andl $31, %r15d
715 ; SSE3-NEXT: movzbl 32(%rsp,%r15), %eax
716 ; SSE3-NEXT: movd %eax, %xmm6
717 ; SSE3-NEXT: andl $31, %r14d
718 ; SSE3-NEXT: movzbl 64(%rsp,%r14), %eax
719 ; SSE3-NEXT: movd %eax, %xmm7
720 ; SSE3-NEXT: andl $31, %ebx
721 ; SSE3-NEXT: movzbl 96(%rsp,%rbx), %eax
722 ; SSE3-NEXT: movd %eax, %xmm8
723 ; SSE3-NEXT: andl $31, %r11d
724 ; SSE3-NEXT: movzbl 128(%rsp,%r11), %eax
725 ; SSE3-NEXT: movd %eax, %xmm5
726 ; SSE3-NEXT: andl $31, %r10d
727 ; SSE3-NEXT: movzbl 160(%rsp,%r10), %eax
728 ; SSE3-NEXT: movd %eax, %xmm9
729 ; SSE3-NEXT: andl $31, %r9d
730 ; SSE3-NEXT: movzbl 192(%rsp,%r9), %eax
731 ; SSE3-NEXT: movd %eax, %xmm10
732 ; SSE3-NEXT: andl $31, %r8d
733 ; SSE3-NEXT: movzbl 224(%rsp,%r8), %eax
734 ; SSE3-NEXT: movd %eax, %xmm12
735 ; SSE3-NEXT: andl $31, %edi
736 ; SSE3-NEXT: movzbl 256(%rsp,%rdi), %eax
737 ; SSE3-NEXT: movd %eax, %xmm11
738 ; SSE3-NEXT: andl $31, %esi
739 ; SSE3-NEXT: movzbl 288(%rsp,%rsi), %eax
740 ; SSE3-NEXT: movd %eax, %xmm13
741 ; SSE3-NEXT: andl $31, %edx
742 ; SSE3-NEXT: movzbl 320(%rsp,%rdx), %eax
743 ; SSE3-NEXT: movd %eax, %xmm14
744 ; SSE3-NEXT: andl $31, %ecx
745 ; SSE3-NEXT: movzbl 352(%rsp,%rcx), %eax
746 ; SSE3-NEXT: movd %eax, %xmm15
747 ; SSE3-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
748 ; SSE3-NEXT: andl $31, %eax
749 ; SSE3-NEXT: movzbl 384(%rsp,%rax), %eax
750 ; SSE3-NEXT: movd %eax, %xmm0
751 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
752 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
753 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
754 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
755 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm8[0],xmm5[1],xmm8[1],xmm5[2],xmm8[2],xmm5[3],xmm8[3],xmm5[4],xmm8[4],xmm5[5],xmm8[5],xmm5[6],xmm8[6],xmm5[7],xmm8[7]
756 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3]
757 ; SSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
758 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3],xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
759 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3],xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
760 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
761 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
762 ; SSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3],xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
763 ; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
764 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm11[0],xmm0[1],xmm11[1]
765 ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
766 ; SSE3-NEXT: addq $424, %rsp # imm = 0x1A8
767 ; SSE3-NEXT: popq %rbx
768 ; SSE3-NEXT: popq %r12
769 ; SSE3-NEXT: popq %r13
770 ; SSE3-NEXT: popq %r14
771 ; SSE3-NEXT: popq %r15
772 ; SSE3-NEXT: popq %rbp
773 ; SSE3-NEXT: retq
774 ;
775 ; SSSE3-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
776 ; SSSE3: # %bb.0:
777 ; SSSE3-NEXT: pushq %rbp
778 ; SSSE3-NEXT: pushq %r15
779 ; SSSE3-NEXT: pushq %r14
780 ; SSSE3-NEXT: pushq %r13
781 ; SSSE3-NEXT: pushq %r12
782 ; SSSE3-NEXT: pushq %rbx
783 ; SSSE3-NEXT: subq $424, %rsp # imm = 0x1A8
784 ; SSSE3-NEXT: movaps %xmm2, -128(%rsp)
785 ; SSSE3-NEXT: movaps %xmm1, 400(%rsp)
786 ; SSSE3-NEXT: movaps %xmm0, 384(%rsp)
787 ; SSSE3-NEXT: movzbl -128(%rsp), %eax
788 ; SSSE3-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
789 ; SSSE3-NEXT: movaps %xmm1, 368(%rsp)
790 ; SSSE3-NEXT: movaps %xmm0, 352(%rsp)
791 ; SSSE3-NEXT: movzbl -127(%rsp), %ecx
792 ; SSSE3-NEXT: movaps %xmm1, 336(%rsp)
793 ; SSSE3-NEXT: movaps %xmm0, 320(%rsp)
794 ; SSSE3-NEXT: movzbl -126(%rsp), %edx
795 ; SSSE3-NEXT: movaps %xmm1, 304(%rsp)
796 ; SSSE3-NEXT: movaps %xmm0, 288(%rsp)
797 ; SSSE3-NEXT: movzbl -125(%rsp), %esi
798 ; SSSE3-NEXT: movaps %xmm1, 272(%rsp)
799 ; SSSE3-NEXT: movaps %xmm0, 256(%rsp)
800 ; SSSE3-NEXT: movzbl -124(%rsp), %edi
801 ; SSSE3-NEXT: movaps %xmm1, 240(%rsp)
802 ; SSSE3-NEXT: movaps %xmm0, 224(%rsp)
803 ; SSSE3-NEXT: movzbl -123(%rsp), %r8d
804 ; SSSE3-NEXT: movaps %xmm1, 208(%rsp)
805 ; SSSE3-NEXT: movaps %xmm0, 192(%rsp)
806 ; SSSE3-NEXT: movzbl -122(%rsp), %r9d
807 ; SSSE3-NEXT: movaps %xmm1, 176(%rsp)
808 ; SSSE3-NEXT: movaps %xmm0, 160(%rsp)
809 ; SSSE3-NEXT: movzbl -121(%rsp), %r10d
810 ; SSSE3-NEXT: movaps %xmm1, 144(%rsp)
811 ; SSSE3-NEXT: movaps %xmm0, 128(%rsp)
812 ; SSSE3-NEXT: movzbl -120(%rsp), %r11d
813 ; SSSE3-NEXT: movaps %xmm1, 112(%rsp)
814 ; SSSE3-NEXT: movaps %xmm0, 96(%rsp)
815 ; SSSE3-NEXT: movzbl -119(%rsp), %ebx
816 ; SSSE3-NEXT: movaps %xmm1, 80(%rsp)
817 ; SSSE3-NEXT: movaps %xmm0, 64(%rsp)
818 ; SSSE3-NEXT: movzbl -118(%rsp), %r14d
819 ; SSSE3-NEXT: movaps %xmm1, 48(%rsp)
820 ; SSSE3-NEXT: movaps %xmm0, 32(%rsp)
821 ; SSSE3-NEXT: movzbl -117(%rsp), %r15d
822 ; SSSE3-NEXT: movaps %xmm1, 16(%rsp)
823 ; SSSE3-NEXT: movaps %xmm0, (%rsp)
824 ; SSSE3-NEXT: movzbl -116(%rsp), %r12d
825 ; SSSE3-NEXT: movaps %xmm1, -16(%rsp)
826 ; SSSE3-NEXT: movaps %xmm0, -32(%rsp)
827 ; SSSE3-NEXT: movzbl -115(%rsp), %r13d
828 ; SSSE3-NEXT: movaps %xmm1, -48(%rsp)
829 ; SSSE3-NEXT: movaps %xmm0, -64(%rsp)
830 ; SSSE3-NEXT: movzbl -114(%rsp), %ebp
831 ; SSSE3-NEXT: movaps %xmm1, -80(%rsp)
832 ; SSSE3-NEXT: movaps %xmm0, -96(%rsp)
833 ; SSSE3-NEXT: movzbl -113(%rsp), %eax
834 ; SSSE3-NEXT: andl $31, %eax
835 ; SSSE3-NEXT: movzbl -96(%rsp,%rax), %eax
836 ; SSSE3-NEXT: movd %eax, %xmm1
837 ; SSSE3-NEXT: andl $31, %ebp
838 ; SSSE3-NEXT: movzbl -64(%rsp,%rbp), %eax
839 ; SSSE3-NEXT: movd %eax, %xmm2
840 ; SSSE3-NEXT: andl $31, %r13d
841 ; SSSE3-NEXT: movzbl -32(%rsp,%r13), %eax
842 ; SSSE3-NEXT: movd %eax, %xmm4
843 ; SSSE3-NEXT: andl $31, %r12d
844 ; SSSE3-NEXT: movzbl (%rsp,%r12), %eax
845 ; SSSE3-NEXT: movd %eax, %xmm3
846 ; SSSE3-NEXT: andl $31, %r15d
847 ; SSSE3-NEXT: movzbl 32(%rsp,%r15), %eax
848 ; SSSE3-NEXT: movd %eax, %xmm6
849 ; SSSE3-NEXT: andl $31, %r14d
850 ; SSSE3-NEXT: movzbl 64(%rsp,%r14), %eax
851 ; SSSE3-NEXT: movd %eax, %xmm7
852 ; SSSE3-NEXT: andl $31, %ebx
853 ; SSSE3-NEXT: movzbl 96(%rsp,%rbx), %eax
854 ; SSSE3-NEXT: movd %eax, %xmm8
855 ; SSSE3-NEXT: andl $31, %r11d
856 ; SSSE3-NEXT: movzbl 128(%rsp,%r11), %eax
857 ; SSSE3-NEXT: movd %eax, %xmm5
858 ; SSSE3-NEXT: andl $31, %r10d
859 ; SSSE3-NEXT: movzbl 160(%rsp,%r10), %eax
860 ; SSSE3-NEXT: movd %eax, %xmm9
861 ; SSSE3-NEXT: andl $31, %r9d
862 ; SSSE3-NEXT: movzbl 192(%rsp,%r9), %eax
863 ; SSSE3-NEXT: movd %eax, %xmm10
864 ; SSSE3-NEXT: andl $31, %r8d
865 ; SSSE3-NEXT: movzbl 224(%rsp,%r8), %eax
866 ; SSSE3-NEXT: movd %eax, %xmm12
867 ; SSSE3-NEXT: andl $31, %edi
868 ; SSSE3-NEXT: movzbl 256(%rsp,%rdi), %eax
869 ; SSSE3-NEXT: movd %eax, %xmm11
870 ; SSSE3-NEXT: andl $31, %esi
871 ; SSSE3-NEXT: movzbl 288(%rsp,%rsi), %eax
872 ; SSSE3-NEXT: movd %eax, %xmm13
873 ; SSSE3-NEXT: andl $31, %edx
874 ; SSSE3-NEXT: movzbl 320(%rsp,%rdx), %eax
875 ; SSSE3-NEXT: movd %eax, %xmm14
876 ; SSSE3-NEXT: andl $31, %ecx
877 ; SSSE3-NEXT: movzbl 352(%rsp,%rcx), %eax
878 ; SSSE3-NEXT: movd %eax, %xmm15
879 ; SSSE3-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
880 ; SSSE3-NEXT: andl $31, %eax
881 ; SSSE3-NEXT: movzbl 384(%rsp,%rax), %eax
882 ; SSSE3-NEXT: movd %eax, %xmm0
883 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
884 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
885 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
886 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3],xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
887 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm8[0],xmm5[1],xmm8[1],xmm5[2],xmm8[2],xmm5[3],xmm8[3],xmm5[4],xmm8[4],xmm5[5],xmm8[5],xmm5[6],xmm8[6],xmm5[7],xmm8[7]
888 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3]
889 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
890 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3],xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
891 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3],xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
892 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
893 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
894 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3],xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
895 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
896 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm11[0],xmm0[1],xmm11[1]
897 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
898 ; SSSE3-NEXT: addq $424, %rsp # imm = 0x1A8
899 ; SSSE3-NEXT: popq %rbx
900 ; SSSE3-NEXT: popq %r12
901 ; SSSE3-NEXT: popq %r13
902 ; SSSE3-NEXT: popq %r14
903 ; SSSE3-NEXT: popq %r15
904 ; SSSE3-NEXT: popq %rbp
905 ; SSSE3-NEXT: retq
906 ;
907 ; SSE41-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
908 ; SSE41: # %bb.0:
909 ; SSE41-NEXT: subq $392, %rsp # imm = 0x188
910 ; SSE41-NEXT: movd %xmm2, %eax
911 ; SSE41-NEXT: movaps %xmm1, 368(%rsp)
912 ; SSE41-NEXT: movaps %xmm0, 352(%rsp)
913 ; SSE41-NEXT: andl $31, %eax
914 ; SSE41-NEXT: movaps %xmm1, 336(%rsp)
915 ; SSE41-NEXT: movaps %xmm0, 320(%rsp)
916 ; SSE41-NEXT: movaps %xmm1, 304(%rsp)
917 ; SSE41-NEXT: movaps %xmm0, 288(%rsp)
918 ; SSE41-NEXT: movaps %xmm1, 272(%rsp)
919 ; SSE41-NEXT: movaps %xmm0, 256(%rsp)
920 ; SSE41-NEXT: movaps %xmm1, 240(%rsp)
921 ; SSE41-NEXT: movaps %xmm0, 224(%rsp)
922 ; SSE41-NEXT: movaps %xmm1, 208(%rsp)
923 ; SSE41-NEXT: movaps %xmm0, 192(%rsp)
924 ; SSE41-NEXT: movaps %xmm1, 176(%rsp)
925 ; SSE41-NEXT: movaps %xmm0, 160(%rsp)
926 ; SSE41-NEXT: movaps %xmm1, 144(%rsp)
927 ; SSE41-NEXT: movaps %xmm0, 128(%rsp)
928 ; SSE41-NEXT: movaps %xmm1, 112(%rsp)
929 ; SSE41-NEXT: movaps %xmm0, 96(%rsp)
930 ; SSE41-NEXT: movaps %xmm1, 80(%rsp)
931 ; SSE41-NEXT: movaps %xmm0, 64(%rsp)
932 ; SSE41-NEXT: movaps %xmm1, 48(%rsp)
933 ; SSE41-NEXT: movaps %xmm0, 32(%rsp)
934 ; SSE41-NEXT: movaps %xmm1, 16(%rsp)
935 ; SSE41-NEXT: movaps %xmm0, (%rsp)
936 ; SSE41-NEXT: movaps %xmm1, -16(%rsp)
937 ; SSE41-NEXT: movaps %xmm0, -32(%rsp)
938 ; SSE41-NEXT: movaps %xmm1, -48(%rsp)
939 ; SSE41-NEXT: movaps %xmm0, -64(%rsp)
940 ; SSE41-NEXT: movaps %xmm1, -80(%rsp)
941 ; SSE41-NEXT: movaps %xmm0, -96(%rsp)
942 ; SSE41-NEXT: movaps %xmm1, -112(%rsp)
943 ; SSE41-NEXT: movaps %xmm0, -128(%rsp)
944 ; SSE41-NEXT: movzbl 352(%rsp,%rax), %eax
945 ; SSE41-NEXT: movd %eax, %xmm0
946 ; SSE41-NEXT: pextrb $1, %xmm2, %eax
947 ; SSE41-NEXT: andl $31, %eax
948 ; SSE41-NEXT: pinsrb $1, 320(%rsp,%rax), %xmm0
949 ; SSE41-NEXT: pextrb $2, %xmm2, %eax
950 ; SSE41-NEXT: andl $31, %eax
951 ; SSE41-NEXT: pinsrb $2, 288(%rsp,%rax), %xmm0
952 ; SSE41-NEXT: pextrb $3, %xmm2, %eax
953 ; SSE41-NEXT: andl $31, %eax
954 ; SSE41-NEXT: pinsrb $3, 256(%rsp,%rax), %xmm0
955 ; SSE41-NEXT: pextrb $4, %xmm2, %eax
956 ; SSE41-NEXT: andl $31, %eax
957 ; SSE41-NEXT: pinsrb $4, 224(%rsp,%rax), %xmm0
958 ; SSE41-NEXT: pextrb $5, %xmm2, %eax
959 ; SSE41-NEXT: andl $31, %eax
960 ; SSE41-NEXT: pinsrb $5, 192(%rsp,%rax), %xmm0
961 ; SSE41-NEXT: pextrb $6, %xmm2, %eax
962 ; SSE41-NEXT: andl $31, %eax
963 ; SSE41-NEXT: pinsrb $6, 160(%rsp,%rax), %xmm0
964 ; SSE41-NEXT: pextrb $7, %xmm2, %eax
965 ; SSE41-NEXT: andl $31, %eax
966 ; SSE41-NEXT: pinsrb $7, 128(%rsp,%rax), %xmm0
967 ; SSE41-NEXT: pextrb $8, %xmm2, %eax
968 ; SSE41-NEXT: andl $31, %eax
969 ; SSE41-NEXT: pinsrb $8, 96(%rsp,%rax), %xmm0
970 ; SSE41-NEXT: pextrb $9, %xmm2, %eax
971 ; SSE41-NEXT: andl $31, %eax
972 ; SSE41-NEXT: pinsrb $9, 64(%rsp,%rax), %xmm0
973 ; SSE41-NEXT: pextrb $10, %xmm2, %eax
974 ; SSE41-NEXT: andl $31, %eax
975 ; SSE41-NEXT: pinsrb $10, 32(%rsp,%rax), %xmm0
976 ; SSE41-NEXT: pextrb $11, %xmm2, %eax
977 ; SSE41-NEXT: andl $31, %eax
978 ; SSE41-NEXT: pinsrb $11, (%rsp,%rax), %xmm0
979 ; SSE41-NEXT: pextrb $12, %xmm2, %eax
980 ; SSE41-NEXT: andl $31, %eax
981 ; SSE41-NEXT: pinsrb $12, -32(%rsp,%rax), %xmm0
982 ; SSE41-NEXT: pextrb $13, %xmm2, %eax
983 ; SSE41-NEXT: andl $31, %eax
984 ; SSE41-NEXT: pinsrb $13, -64(%rsp,%rax), %xmm0
985 ; SSE41-NEXT: pextrb $14, %xmm2, %eax
986 ; SSE41-NEXT: andl $31, %eax
987 ; SSE41-NEXT: pinsrb $14, -96(%rsp,%rax), %xmm0
988 ; SSE41-NEXT: pextrb $15, %xmm2, %eax
989 ; SSE41-NEXT: andl $31, %eax
990 ; SSE41-NEXT: pinsrb $15, -128(%rsp,%rax), %xmm0
991 ; SSE41-NEXT: addq $392, %rsp # imm = 0x188
992 ; SSE41-NEXT: retq
993 ;
994 ; XOP-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
995 ; XOP: # %bb.0:
996 ; XOP-NEXT: vextractf128 $1, %ymm0, %xmm2
997 ; XOP-NEXT: vpperm %xmm1, %xmm2, %xmm0, %xmm0
998 ; XOP-NEXT: vzeroupper
999 ; XOP-NEXT: retq
1000 ;
1001 ; AVX1-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
1002 ; AVX1: # %bb.0:
1003 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
1004 ; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm2
1005 ; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0
1006 ; AVX1-NEXT: vpcmpgtb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1007 ; AVX1-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1008 ; AVX1-NEXT: vzeroupper
1009 ; AVX1-NEXT: retq
1010 ;
1011 ; AVX2-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
1012 ; AVX2: # %bb.0:
1013 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
1014 ; AVX2-NEXT: vpshufb %xmm1, %xmm2, %xmm2
1015 ; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0
1016 ; AVX2-NEXT: vpcmpgtb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1017 ; AVX2-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1018 ; AVX2-NEXT: vzeroupper
1019 ; AVX2-NEXT: retq
1020 ;
1021 ; AVX512-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
1022 ; AVX512: # %bb.0:
1023 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm2
1024 ; AVX512-NEXT: vpshufb %xmm1, %xmm2, %xmm2
1025 ; AVX512-NEXT: vpshufb %xmm1, %xmm0, %xmm0
1026 ; AVX512-NEXT: vpcmpgtb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1027 ; AVX512-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1028 ; AVX512-NEXT: vzeroupper
1029 ; AVX512-NEXT: retq
1030 ;
1031 ; AVX512VLBW-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
1032 ; AVX512VLBW: # %bb.0:
1033 ; AVX512VLBW-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
1034 ; AVX512VLBW-NEXT: vextracti128 $1, %ymm0, %xmm2
1035 ; AVX512VLBW-NEXT: vpshufb %xmm1, %xmm2, %xmm2
1036 ; AVX512VLBW-NEXT: vpshufb %xmm1, %xmm0, %xmm0
1037 ; AVX512VLBW-NEXT: vpcmpgtb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
1038 ; AVX512VLBW-NEXT: vmovdqu8 %ymm2, %ymm0 {%k1}
1039 ; AVX512VLBW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1040 ; AVX512VLBW-NEXT: vzeroupper
1041 ; AVX512VLBW-NEXT: retq
1042 ;
1043 ; VLVBMI-LABEL: var_shuffle_v16i8_from_v32i8_v16i8:
1044 ; VLVBMI: # %bb.0:
1045 ; VLVBMI-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
1046 ; VLVBMI-NEXT: vpermb %ymm0, %ymm1, %ymm0
1047 ; VLVBMI-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1048 ; VLVBMI-NEXT: vzeroupper
1049 ; VLVBMI-NEXT: retq
1050 %index0 = extractelement <16 x i8> %indices, i32 0
1051 %index1 = extractelement <16 x i8> %indices, i32 1
1052 %index2 = extractelement <16 x i8> %indices, i32 2
1053 %index3 = extractelement <16 x i8> %indices, i32 3
1054 %index4 = extractelement <16 x i8> %indices, i32 4
1055 %index5 = extractelement <16 x i8> %indices, i32 5
1056 %index6 = extractelement <16 x i8> %indices, i32 6
1057 %index7 = extractelement <16 x i8> %indices, i32 7
1058 %index8 = extractelement <16 x i8> %indices, i32 8
1059 %index9 = extractelement <16 x i8> %indices, i32 9
1060 %index10 = extractelement <16 x i8> %indices, i32 10
1061 %index11 = extractelement <16 x i8> %indices, i32 11
1062 %index12 = extractelement <16 x i8> %indices, i32 12
1063 %index13 = extractelement <16 x i8> %indices, i32 13
1064 %index14 = extractelement <16 x i8> %indices, i32 14
1065 %index15 = extractelement <16 x i8> %indices, i32 15
1066 %v0 = extractelement <32 x i8> %v, i8 %index0
1067 %v1 = extractelement <32 x i8> %v, i8 %index1
1068 %v2 = extractelement <32 x i8> %v, i8 %index2
1069 %v3 = extractelement <32 x i8> %v, i8 %index3
1070 %v4 = extractelement <32 x i8> %v, i8 %index4
1071 %v5 = extractelement <32 x i8> %v, i8 %index5
1072 %v6 = extractelement <32 x i8> %v, i8 %index6
1073 %v7 = extractelement <32 x i8> %v, i8 %index7
1074 %v8 = extractelement <32 x i8> %v, i8 %index8
1075 %v9 = extractelement <32 x i8> %v, i8 %index9
1076 %v10 = extractelement <32 x i8> %v, i8 %index10
1077 %v11 = extractelement <32 x i8> %v, i8 %index11
1078 %v12 = extractelement <32 x i8> %v, i8 %index12
1079 %v13 = extractelement <32 x i8> %v, i8 %index13
1080 %v14 = extractelement <32 x i8> %v, i8 %index14
1081 %v15 = extractelement <32 x i8> %v, i8 %index15
1082 %ret0 = insertelement <16 x i8> undef, i8 %v0, i32 0
1083 %ret1 = insertelement <16 x i8> %ret0, i8 %v1, i32 1
1084 %ret2 = insertelement <16 x i8> %ret1, i8 %v2, i32 2
1085 %ret3 = insertelement <16 x i8> %ret2, i8 %v3, i32 3
1086 %ret4 = insertelement <16 x i8> %ret3, i8 %v4, i32 4
1087 %ret5 = insertelement <16 x i8> %ret4, i8 %v5, i32 5
1088 %ret6 = insertelement <16 x i8> %ret5, i8 %v6, i32 6
1089 %ret7 = insertelement <16 x i8> %ret6, i8 %v7, i32 7
1090 %ret8 = insertelement <16 x i8> %ret7, i8 %v8, i32 8
1091 %ret9 = insertelement <16 x i8> %ret8, i8 %v9, i32 9
1092 %ret10 = insertelement <16 x i8> %ret9, i8 %v10, i32 10
1093 %ret11 = insertelement <16 x i8> %ret10, i8 %v11, i32 11
1094 %ret12 = insertelement <16 x i8> %ret11, i8 %v12, i32 12
1095 %ret13 = insertelement <16 x i8> %ret12, i8 %v13, i32 13
1096 %ret14 = insertelement <16 x i8> %ret13, i8 %v14, i32 14
1097 %ret15 = insertelement <16 x i8> %ret14, i8 %v15, i32 15
1098 ret <16 x i8> %ret15
1099 }
1101 define void @indices_convert() {
1102 ; SSE3-LABEL: indices_convert:
1103 ; SSE3: # %bb.0: # %bb
1104 ; SSE3-NEXT: movaps (%rax), %xmm0
1105 ; SSE3-NEXT: movaps %xmm0, -24(%rsp)
1106 ; SSE3-NEXT: movaps %xmm0, -40(%rsp)
1107 ; SSE3-NEXT: movl (%rax), %eax
1108 ; SSE3-NEXT: movaps %xmm0, -56(%rsp)
1109 ; SSE3-NEXT: movaps %xmm0, -72(%rsp)
1110 ; SSE3-NEXT: andl $3, %eax
1111 ; SSE3-NEXT: shll $3, %eax
1112 ; SSE3-NEXT: movsd -72(%rsp,%rax), %xmm0 # xmm0 = mem[0],zero
1113 ; SSE3-NEXT: movsd -40(%rsp,%rax), %xmm1 # xmm1 = mem[0],zero
1114 ; SSE3-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1115 ; SSE3-NEXT: movups %xmm1, (%rax)
1116 ; SSE3-NEXT: retq
1117 ;
1118 ; SSSE3-LABEL: indices_convert:
1119 ; SSSE3: # %bb.0: # %bb
1120 ; SSSE3-NEXT: movaps (%rax), %xmm0
1121 ; SSSE3-NEXT: movaps %xmm0, -24(%rsp)
1122 ; SSSE3-NEXT: movaps %xmm0, -40(%rsp)
1123 ; SSSE3-NEXT: movl (%rax), %eax
1124 ; SSSE3-NEXT: movaps %xmm0, -56(%rsp)
1125 ; SSSE3-NEXT: movaps %xmm0, -72(%rsp)
1126 ; SSSE3-NEXT: andl $3, %eax
1127 ; SSSE3-NEXT: shll $3, %eax
1128 ; SSSE3-NEXT: movsd -72(%rsp,%rax), %xmm0 # xmm0 = mem[0],zero
1129 ; SSSE3-NEXT: movsd -40(%rsp,%rax), %xmm1 # xmm1 = mem[0],zero
1130 ; SSSE3-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1131 ; SSSE3-NEXT: movups %xmm1, (%rax)
1132 ; SSSE3-NEXT: retq
1133 ;
1134 ; SSE41-LABEL: indices_convert:
1135 ; SSE41: # %bb.0: # %bb
1136 ; SSE41-NEXT: movaps (%rax), %xmm0
1137 ; SSE41-NEXT: extractps $2, %xmm0, %eax
1138 ; SSE41-NEXT: movaps %xmm0, -24(%rsp)
1139 ; SSE41-NEXT: movaps %xmm0, -40(%rsp)
1140 ; SSE41-NEXT: andl $3, %eax
1141 ; SSE41-NEXT: extractps $3, %xmm0, %ecx
1142 ; SSE41-NEXT: movaps %xmm0, -56(%rsp)
1143 ; SSE41-NEXT: movaps %xmm0, -72(%rsp)
1144 ; SSE41-NEXT: andl $3, %ecx
1145 ; SSE41-NEXT: movsd -72(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
1146 ; SSE41-NEXT: movsd -40(%rsp,%rax,8), %xmm1 # xmm1 = mem[0],zero
1147 ; SSE41-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1148 ; SSE41-NEXT: movups %xmm1, (%rax)
1149 ; SSE41-NEXT: retq
1150 ;
1151 ; XOP-LABEL: indices_convert:
1152 ; XOP: # %bb.0: # %bb
1153 ; XOP-NEXT: vmovdqa (%rax), %xmm0
1154 ; XOP-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1155 ; XOP-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1156 ; XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
1157 ; XOP-NEXT: vpaddq %xmm1, %xmm1, %xmm1
1158 ; XOP-NEXT: vpermil2pd $0, %xmm1, %xmm0, %xmm0, %xmm0
1159 ; XOP-NEXT: vmovupd %xmm0, (%rax)
1160 ; XOP-NEXT: retq
1161 ;
1162 ; AVX1-LABEL: indices_convert:
1163 ; AVX1: # %bb.0: # %bb
1164 ; AVX1-NEXT: vmovdqa (%rax), %xmm0
1165 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1166 ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1167 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
1168 ; AVX1-NEXT: vpaddq %xmm1, %xmm1, %xmm1
1169 ; AVX1-NEXT: vpermilpd %xmm1, %xmm0, %xmm0
1170 ; AVX1-NEXT: vmovupd %xmm0, (%rax)
1171 ; AVX1-NEXT: retq
1172 ;
1173 ; AVX2-LABEL: indices_convert:
1174 ; AVX2: # %bb.0: # %bb
1175 ; AVX2-NEXT: vpbroadcastq (%rax), %xmm0
1176 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [7,7,7,7]
1177 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1178 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1179 ; AVX2-NEXT: vpaddq %xmm0, %xmm0, %xmm0
1180 ; AVX2-NEXT: vmovapd (%rax), %xmm1
1181 ; AVX2-NEXT: vpermilpd %xmm0, %xmm1, %xmm0
1182 ; AVX2-NEXT: vmovupd %xmm0, (%rax)
1183 ; AVX2-NEXT: retq
1184 ;
1185 ; AVX512-LABEL: indices_convert:
1186 ; AVX512: # %bb.0: # %bb
1187 ; AVX512-NEXT: vmovdqa (%rax), %ymm0
1188 ; AVX512-NEXT: vpbroadcastq (%rax), %xmm1
1189 ; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [7,7,7,7]
1190 ; AVX512-NEXT: vpand %xmm2, %xmm1, %xmm1
1191 ; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
1192 ; AVX512-NEXT: vpermq %zmm0, %zmm1, %zmm0
1193 ; AVX512-NEXT: vmovdqu %xmm0, (%rax)
1194 ; AVX512-NEXT: vzeroupper
1195 ; AVX512-NEXT: retq
1196 ;
1197 ; AVX512VL-LABEL: indices_convert:
1198 ; AVX512VL: # %bb.0: # %bb
1199 ; AVX512VL-NEXT: vpbroadcastq (%rax), %xmm0
1200 ; AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1201 ; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1202 ; AVX512VL-NEXT: vpermq (%rax), %ymm0, %ymm0
1203 ; AVX512VL-NEXT: vmovdqu %xmm0, (%rax)
1204 ; AVX512VL-NEXT: vzeroupper
1205 ; AVX512VL-NEXT: retq
1206 bb:
1207 %0 = load <4 x i64>, ptr undef, align 32
1208 %1 = bitcast <4 x i64> %0 to <8 x i32>
1209 %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <2 x i32> <i32 2, i32 12>
1210 %3 = and <2 x i32> %2, <i32 7, i32 7>
1211 %4 = extractelement <2 x i32> %3, i32 0
1212 %vecext.i8.1 = extractelement <4 x i64> %0, i32 %4
1213 %5 = extractelement <2 x i32> %3, i32 1
1214 %vecext.i8.2 = extractelement <4 x i64> %0, i32 %5
1215 %6 = insertelement <2 x i64> poison, i64 %vecext.i8.1, i32 0
1216 %7 = insertelement <2 x i64> %6, i64 %vecext.i8.2, i32 1
1217 %8 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> %7
1218 store <2 x i64> %8, ptr undef, align 8
1219 ret void
1220 }