1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
12 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
13 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
15 ; Just one 32-bit run to make sure we do reasonable things for i64 cases.
16 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
18 declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
24 define <2 x i32> @var_funnnel_v2i32(<2 x i32> %x, <2 x i32> %amt) nounwind {
25 ; SSE2-LABEL: var_funnnel_v2i32:
27 ; SSE2-NEXT: pslld $23, %xmm1
28 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
29 ; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
30 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
31 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
32 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
33 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
34 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
35 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
36 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
37 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
38 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
39 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
40 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
41 ; SSE2-NEXT: por %xmm3, %xmm0
44 ; SSE41-LABEL: var_funnnel_v2i32:
46 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
47 ; SSE41-NEXT: pslld $23, %xmm1
48 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
49 ; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
50 ; SSE41-NEXT: cvttps2dq %xmm1, %xmm1
51 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
52 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
53 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
54 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
55 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
56 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
57 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
58 ; SSE41-NEXT: por %xmm1, %xmm0
61 ; AVX1-LABEL: var_funnnel_v2i32:
63 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
64 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
65 ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
66 ; AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
67 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
68 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
69 ; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
70 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
71 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
72 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
73 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
74 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
75 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
78 ; AVX2-LABEL: var_funnnel_v2i32:
80 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
81 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
82 ; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm2
83 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
84 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
85 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
86 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
89 ; AVX512F-LABEL: var_funnnel_v2i32:
91 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
92 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
93 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
94 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
95 ; AVX512F-NEXT: vzeroupper
98 ; AVX512VL-LABEL: var_funnnel_v2i32:
100 ; AVX512VL-NEXT: vprolvd %xmm1, %xmm0, %xmm0
101 ; AVX512VL-NEXT: retq
103 ; AVX512BW-LABEL: var_funnnel_v2i32:
105 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
106 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
107 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
108 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
109 ; AVX512BW-NEXT: vzeroupper
110 ; AVX512BW-NEXT: retq
112 ; AVX512VLBW-LABEL: var_funnnel_v2i32:
113 ; AVX512VLBW: # %bb.0:
114 ; AVX512VLBW-NEXT: vprolvd %xmm1, %xmm0, %xmm0
115 ; AVX512VLBW-NEXT: retq
117 ; AVX512VBMI2-LABEL: var_funnnel_v2i32:
118 ; AVX512VBMI2: # %bb.0:
119 ; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
120 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
121 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
122 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
123 ; AVX512VBMI2-NEXT: vzeroupper
124 ; AVX512VBMI2-NEXT: retq
126 ; AVX512VLVBMI2-LABEL: var_funnnel_v2i32:
127 ; AVX512VLVBMI2: # %bb.0:
128 ; AVX512VLVBMI2-NEXT: vprolvd %xmm1, %xmm0, %xmm0
129 ; AVX512VLVBMI2-NEXT: retq
131 ; XOP-LABEL: var_funnnel_v2i32:
133 ; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
136 ; X86-SSE2-LABEL: var_funnnel_v2i32:
138 ; X86-SSE2-NEXT: pslld $23, %xmm1
139 ; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
140 ; X86-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
141 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
142 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
143 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm0
144 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
145 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
146 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm1
147 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
148 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
149 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
150 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
151 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
152 ; X86-SSE2-NEXT: por %xmm3, %xmm0
153 ; X86-SSE2-NEXT: retl
154 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> %amt)
159 ; Uniform Variable Shifts
162 define <2 x i32> @splatvar_funnnel_v2i32(<2 x i32> %x, <2 x i32> %amt) nounwind {
163 ; SSE2-LABEL: splatvar_funnnel_v2i32:
165 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
166 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
167 ; SSE2-NEXT: psllq %xmm1, %xmm2
168 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
169 ; SSE2-NEXT: psllq %xmm1, %xmm0
170 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[1,3]
173 ; SSE41-LABEL: splatvar_funnnel_v2i32:
175 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
176 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
177 ; SSE41-NEXT: psllq %xmm1, %xmm2
178 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
179 ; SSE41-NEXT: psllq %xmm1, %xmm0
180 ; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[1,3]
183 ; AVX1-LABEL: splatvar_funnnel_v2i32:
185 ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
186 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
187 ; AVX1-NEXT: vpsllq %xmm1, %xmm2, %xmm2
188 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
189 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
190 ; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[1,3]
193 ; AVX2-LABEL: splatvar_funnnel_v2i32:
195 ; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
196 ; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
197 ; AVX2-NEXT: vpsllq %xmm1, %xmm2, %xmm2
198 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
199 ; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm0
200 ; AVX2-NEXT: vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[1,3]
203 ; AVX512F-LABEL: splatvar_funnnel_v2i32:
205 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
206 ; AVX512F-NEXT: vpbroadcastd %xmm1, %xmm1
207 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
208 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
209 ; AVX512F-NEXT: vzeroupper
212 ; AVX512VL-LABEL: splatvar_funnnel_v2i32:
214 ; AVX512VL-NEXT: vpbroadcastd %xmm1, %xmm1
215 ; AVX512VL-NEXT: vprolvd %xmm1, %xmm0, %xmm0
216 ; AVX512VL-NEXT: retq
218 ; AVX512BW-LABEL: splatvar_funnnel_v2i32:
220 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
221 ; AVX512BW-NEXT: vpbroadcastd %xmm1, %xmm1
222 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
223 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
224 ; AVX512BW-NEXT: vzeroupper
225 ; AVX512BW-NEXT: retq
227 ; AVX512VLBW-LABEL: splatvar_funnnel_v2i32:
228 ; AVX512VLBW: # %bb.0:
229 ; AVX512VLBW-NEXT: vpbroadcastd %xmm1, %xmm1
230 ; AVX512VLBW-NEXT: vprolvd %xmm1, %xmm0, %xmm0
231 ; AVX512VLBW-NEXT: retq
233 ; AVX512VBMI2-LABEL: splatvar_funnnel_v2i32:
234 ; AVX512VBMI2: # %bb.0:
235 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
236 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm1, %xmm1
237 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
238 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
239 ; AVX512VBMI2-NEXT: vzeroupper
240 ; AVX512VBMI2-NEXT: retq
242 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v2i32:
243 ; AVX512VLVBMI2: # %bb.0:
244 ; AVX512VLVBMI2-NEXT: vpbroadcastd %xmm1, %xmm1
245 ; AVX512VLVBMI2-NEXT: vprolvd %xmm1, %xmm0, %xmm0
246 ; AVX512VLVBMI2-NEXT: retq
248 ; XOPAVX1-LABEL: splatvar_funnnel_v2i32:
250 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
251 ; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0
254 ; XOPAVX2-LABEL: splatvar_funnnel_v2i32:
256 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1
257 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0
260 ; X86-SSE2-LABEL: splatvar_funnnel_v2i32:
262 ; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
263 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
264 ; X86-SSE2-NEXT: psllq %xmm1, %xmm2
265 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
266 ; X86-SSE2-NEXT: psllq %xmm1, %xmm0
267 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[1,3]
268 ; X86-SSE2-NEXT: retl
269 %splat = shufflevector <2 x i32> %amt, <2 x i32> undef, <2 x i32> zeroinitializer
270 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> %splat)
278 define <2 x i32> @constant_funnnel_v2i32(<2 x i32> %x) nounwind {
279 ; SSE2-LABEL: constant_funnnel_v2i32:
281 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
282 ; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
283 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]
284 ; SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
285 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
286 ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
287 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
288 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
289 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
290 ; SSE2-NEXT: por %xmm2, %xmm0
293 ; SSE41-LABEL: constant_funnnel_v2i32:
295 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
296 ; SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
297 ; SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
298 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
299 ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
300 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
301 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
302 ; SSE41-NEXT: por %xmm2, %xmm0
305 ; AVX1-LABEL: constant_funnnel_v2i32:
307 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
308 ; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
309 ; AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
310 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
311 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
312 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
313 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
314 ; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
317 ; AVX2-LABEL: constant_funnnel_v2i32:
319 ; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
320 ; AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
321 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
324 ; AVX512F-LABEL: constant_funnnel_v2i32:
326 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
327 ; AVX512F-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,0,0]
328 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
329 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
330 ; AVX512F-NEXT: vzeroupper
333 ; AVX512VL-LABEL: constant_funnnel_v2i32:
335 ; AVX512VL-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
336 ; AVX512VL-NEXT: retq
338 ; AVX512BW-LABEL: constant_funnnel_v2i32:
340 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
341 ; AVX512BW-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,0,0]
342 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
343 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
344 ; AVX512BW-NEXT: vzeroupper
345 ; AVX512BW-NEXT: retq
347 ; AVX512VLBW-LABEL: constant_funnnel_v2i32:
348 ; AVX512VLBW: # %bb.0:
349 ; AVX512VLBW-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
350 ; AVX512VLBW-NEXT: retq
352 ; AVX512VBMI2-LABEL: constant_funnnel_v2i32:
353 ; AVX512VBMI2: # %bb.0:
354 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
355 ; AVX512VBMI2-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,0,0]
356 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
357 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
358 ; AVX512VBMI2-NEXT: vzeroupper
359 ; AVX512VBMI2-NEXT: retq
361 ; AVX512VLVBMI2-LABEL: constant_funnnel_v2i32:
362 ; AVX512VLVBMI2: # %bb.0:
363 ; AVX512VLVBMI2-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
364 ; AVX512VLVBMI2-NEXT: retq
366 ; XOP-LABEL: constant_funnnel_v2i32:
368 ; XOP-NEXT: vprotd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
371 ; X86-SSE2-LABEL: constant_funnnel_v2i32:
373 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
374 ; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
375 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]
376 ; X86-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
377 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
378 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
379 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
380 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
381 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
382 ; X86-SSE2-NEXT: por %xmm2, %xmm0
383 ; X86-SSE2-NEXT: retl
384 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 5>)
389 ; Uniform Constant Shifts
392 define <2 x i32> @splatconstant_funnnel_v2i32(<2 x i32> %x) nounwind {
393 ; SSE2-LABEL: splatconstant_funnnel_v2i32:
395 ; SSE2-NEXT: movdqa %xmm0, %xmm1
396 ; SSE2-NEXT: psrld $28, %xmm1
397 ; SSE2-NEXT: pslld $4, %xmm0
398 ; SSE2-NEXT: por %xmm1, %xmm0
401 ; SSE41-LABEL: splatconstant_funnnel_v2i32:
403 ; SSE41-NEXT: movdqa %xmm0, %xmm1
404 ; SSE41-NEXT: psrld $28, %xmm1
405 ; SSE41-NEXT: pslld $4, %xmm0
406 ; SSE41-NEXT: por %xmm1, %xmm0
409 ; AVX1-LABEL: splatconstant_funnnel_v2i32:
411 ; AVX1-NEXT: vpsrld $28, %xmm0, %xmm1
412 ; AVX1-NEXT: vpslld $4, %xmm0, %xmm0
413 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
416 ; AVX2-LABEL: splatconstant_funnnel_v2i32:
418 ; AVX2-NEXT: vpsrld $28, %xmm0, %xmm1
419 ; AVX2-NEXT: vpslld $4, %xmm0, %xmm0
420 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
423 ; AVX512F-LABEL: splatconstant_funnnel_v2i32:
425 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
426 ; AVX512F-NEXT: vprold $4, %zmm0, %zmm0
427 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
428 ; AVX512F-NEXT: vzeroupper
431 ; AVX512VL-LABEL: splatconstant_funnnel_v2i32:
433 ; AVX512VL-NEXT: vprold $4, %xmm0, %xmm0
434 ; AVX512VL-NEXT: retq
436 ; AVX512BW-LABEL: splatconstant_funnnel_v2i32:
438 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
439 ; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
440 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
441 ; AVX512BW-NEXT: vzeroupper
442 ; AVX512BW-NEXT: retq
444 ; AVX512VLBW-LABEL: splatconstant_funnnel_v2i32:
445 ; AVX512VLBW: # %bb.0:
446 ; AVX512VLBW-NEXT: vprold $4, %xmm0, %xmm0
447 ; AVX512VLBW-NEXT: retq
449 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v2i32:
450 ; AVX512VBMI2: # %bb.0:
451 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
452 ; AVX512VBMI2-NEXT: vprold $4, %zmm0, %zmm0
453 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
454 ; AVX512VBMI2-NEXT: vzeroupper
455 ; AVX512VBMI2-NEXT: retq
457 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v2i32:
458 ; AVX512VLVBMI2: # %bb.0:
459 ; AVX512VLVBMI2-NEXT: vprold $4, %xmm0, %xmm0
460 ; AVX512VLVBMI2-NEXT: retq
462 ; XOP-LABEL: splatconstant_funnnel_v2i32:
464 ; XOP-NEXT: vprotd $4, %xmm0, %xmm0
467 ; X86-SSE2-LABEL: splatconstant_funnnel_v2i32:
469 ; X86-SSE2-NEXT: movdqa %xmm0, %xmm1
470 ; X86-SSE2-NEXT: psrld $28, %xmm1
471 ; X86-SSE2-NEXT: pslld $4, %xmm0
472 ; X86-SSE2-NEXT: por %xmm1, %xmm0
473 ; X86-SSE2-NEXT: retl
474 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 4>)