1 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
3 ; FIXME: two consecutive immediate adds not fused in i16/i8 functions.
5 declare i64 @llvm.ctlz.i64(i64, i1)
6 declare i32 @llvm.ctlz.i32(i32, i1)
7 declare i16 @llvm.ctlz.i16(i16, i1)
8 declare i8 @llvm.ctlz.i8(i8, i1)
10 define i64 @f0(i64 %arg) {
15 %1 = tail call i64 @llvm.ctlz.i64(i64 %arg, i1 false)
19 define i64 @f1(i64 %arg) {
25 %1 = tail call i64 @llvm.ctlz.i64(i64 %arg, i1 true)
29 define i32 @f2(i32 %arg) {
32 ; CHECK-NEXT: llgfr %r0, %r2
33 ; CHECK-NEXT: flogr %r2, %r0
34 ; CHECK-NEXT: aghi %r2, -32
37 %1 = tail call i32 @llvm.ctlz.i32(i32 %arg, i1 false)
41 define i32 @f3(i32 %arg) {
44 ; CHECK-NEXT: llgfr %r0, %r2
45 ; CHECK-NEXT: flogr %r2, %r0
46 ; CHECK-NEXT: aghi %r2, -32
49 %1 = tail call i32 @llvm.ctlz.i32(i32 %arg, i1 true)
53 define i16 @f4(i16 %arg) {
57 ; CHECK-NEXT: llghr %r0, %r2
58 ; CHECK-NEXT: flogr %r0, %r0
59 ; CHECK-NEXT: aghi %r0, -32
60 ; CHECK-NEXT: ahik %r2, %r0, -16
62 %1 = tail call i16 @llvm.ctlz.i16(i16 %arg, i1 false)
66 define i16 @f5(i16 %arg) {
70 ; CHECK-NEXT: llghr %r0, %r2
71 ; CHECK-NEXT: flogr %r0, %r0
72 ; CHECK-NEXT: aghi %r0, -32
73 ; CHECK-NEXT: ahik %r2, %r0, -16
75 %1 = tail call i16 @llvm.ctlz.i16(i16 %arg, i1 true)
79 define i8 @f6(i8 %arg) {
83 ; CHECK-NEXT: llgcr %r0, %r2
84 ; CHECK-NEXT: flogr %r0, %r0
85 ; CHECK-NEXT: aghi %r0, -32
86 ; CHECK-NEXT: ahik %r2, %r0, -24
88 %1 = tail call i8 @llvm.ctlz.i8(i8 %arg, i1 false)
92 define i8 @f7(i8 %arg) {
96 ; CHECK-NEXT: llgcr %r0, %r2
97 ; CHECK-NEXT: flogr %r0, %r0
98 ; CHECK-NEXT: aghi %r0, -32
99 ; CHECK-NEXT: ahik %r2, %r0, -24
100 ; CHECK-NEXT: br %r14
101 %1 = tail call i8 @llvm.ctlz.i8(i8 %arg, i1 true)