clang/test/CodeGen/aarch64-v8.5a-neon-frint3264-intrinsic.c

   1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +v8.5a\
   2 // RUN: -flax-vector-conversions=none -S -disable-O0-optnone -emit-llvm -o - %s \
   3 // RUN: | opt -S -passes=mem2reg \
   4 // RUN: | FileCheck %s
   5
   6 // REQUIRES: aarch64-registered-target
   7
   8 #include <arm_neon.h>
   9
  10 // CHECK-LABEL: test_vrnd32x_f32
  11 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint32x.v2f32(<2 x float> %a)
  12 // CHECK:  ret <2 x float> [[RND]]
  13 float32x2_t test_vrnd32x_f32(float32x2_t a) {
  14   return vrnd32x_f32(a);
  15 }
  16
  17 // CHECK-LABEL: test_vrnd32xq_f32
  18 // CHECK:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint32x.v4f32(<4 x float> %a)
  19 // CHECK:  ret <4 x float> [[RND]]
  20 float32x4_t test_vrnd32xq_f32(float32x4_t a) {
  21   return vrnd32xq_f32(a);
  22 }
  23
  24 // CHECK-LABEL: test_vrnd32z_f32
  25 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint32z.v2f32(<2 x float> %a)
  26 // CHECK:  ret <2 x float> [[RND]]
  27 float32x2_t test_vrnd32z_f32(float32x2_t a) {
  28   return vrnd32z_f32(a);
  29 }
  30
  31 // CHECK-LABEL: test_vrnd32zq_f32
  32 // CHECK:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint32z.v4f32(<4 x float> %a)
  33 // CHECK:  ret <4 x float> [[RND]]
  34 float32x4_t test_vrnd32zq_f32(float32x4_t a) {
  35   return vrnd32zq_f32(a);
  36 }
  37
  38 // CHECK-LABEL: test_vrnd64x_f32
  39 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint64x.v2f32(<2 x float> %a)
  40 // CHECK:  ret <2 x float> [[RND]]
  41 float32x2_t test_vrnd64x_f32(float32x2_t a) {
  42   return vrnd64x_f32(a);
  43 }
  44
  45 // CHECK-LABEL: test_vrnd64xq_f32
  46 // CHECK:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint64x.v4f32(<4 x float> %a)
  47 // CHECK:  ret <4 x float> [[RND]]
  48 float32x4_t test_vrnd64xq_f32(float32x4_t a) {
  49   return vrnd64xq_f32(a);
  50 }
  51
  52 // CHECK-LABEL: test_vrnd64z_f32
  53 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint64z.v2f32(<2 x float> %a)
  54 // CHECK:  ret <2 x float> [[RND]]
  55 float32x2_t test_vrnd64z_f32(float32x2_t a) {
  56   return vrnd64z_f32(a);
  57 }
  58
  59 // CHECK-LABEL: test_vrnd64zq_f32
  60 // CHECK:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint64z.v4f32(<4 x float> %a)
  61 // CHECK:  ret <4 x float> [[RND]]
  62 float32x4_t test_vrnd64zq_f32(float32x4_t a) {
  63   return vrnd64zq_f32(a);
  64 }