clang/test/Frontend/fixed_point_conversions_half.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
   3 // RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED
   4
   5 short _Fract sf;
   6 long _Fract lf;
   7
   8 short _Accum sa;
   9 long _Accum la;
  10
  11 unsigned short _Accum usa;
  12 unsigned long _Accum ula;
  13
  14 _Sat short _Fract sf_sat;
  15 _Sat long _Fract lf_sat;
  16
  17 _Sat short _Accum sa_sat;
  18 _Sat long _Accum la_sat;
  19
  20 _Sat unsigned short _Accum usa_sat;
  21 _Sat unsigned long _Accum ula_sat;
  22
  23 _Float16 h;
  24
  25
  26 // CHECK-LABEL: @half_fix1(
  27 // CHECK-NEXT:  entry:
  28 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  29 // CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
  30 // CHECK-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i8
  31 // CHECK-NEXT:    store i8 [[TMP2]], ptr @sf, align 1
  32 // CHECK-NEXT:    ret void
  33 //
  34 void half_fix1(void) {
  35   sf = h;
  36 }
  37
  38 // CHECK-LABEL: @half_fix2(
  39 // CHECK-NEXT:  entry:
  40 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  41 // CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
  42 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
  43 // CHECK-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i32
  44 // CHECK-NEXT:    store i32 [[TMP3]], ptr @lf, align 4
  45 // CHECK-NEXT:    ret void
  46 //
  47 void half_fix2(void) {
  48   lf = h;
  49 }
  50
  51 // CHECK-LABEL: @half_fix3(
  52 // CHECK-NEXT:  entry:
  53 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  54 // CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
  55 // CHECK-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
  56 // CHECK-NEXT:    store i16 [[TMP2]], ptr @sa, align 2
  57 // CHECK-NEXT:    ret void
  58 //
  59 void half_fix3(void) {
  60   sa = h;
  61 }
  62
  63 // CHECK-LABEL: @half_fix4(
  64 // CHECK-NEXT:  entry:
  65 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  66 // CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
  67 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
  68 // CHECK-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
  69 // CHECK-NEXT:    store i64 [[TMP3]], ptr @la, align 8
  70 // CHECK-NEXT:    ret void
  71 //
  72 void half_fix4(void) {
  73   la = h;
  74 }
  75
  76 // SIGNED-LABEL: @half_fix5(
  77 // SIGNED-NEXT:  entry:
  78 // SIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  79 // SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
  80 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
  81 // SIGNED-NEXT:    [[TMP3:%.*]] = fptoui float [[TMP2]] to i16
  82 // SIGNED-NEXT:    store i16 [[TMP3]], ptr @usa, align 2
  83 // SIGNED-NEXT:    ret void
  84 //
  85 // UNSIGNED-LABEL: @half_fix5(
  86 // UNSIGNED-NEXT:  entry:
  87 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
  88 // UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
  89 // UNSIGNED-NEXT:    [[TMP2:%.*]] = fptosi half [[TMP1]] to i16
  90 // UNSIGNED-NEXT:    store i16 [[TMP2]], ptr @usa, align 2
  91 // UNSIGNED-NEXT:    ret void
  92 //
  93 void half_fix5(void) {
  94   usa = h;
  95 }
  96
  97 // SIGNED-LABEL: @half_fix6(
  98 // SIGNED-NEXT:  entry:
  99 // SIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 100 // SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 101 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
 102 // SIGNED-NEXT:    [[TMP3:%.*]] = fptoui float [[TMP2]] to i64
 103 // SIGNED-NEXT:    store i64 [[TMP3]], ptr @ula, align 8
 104 // SIGNED-NEXT:    ret void
 105 //
 106 // UNSIGNED-LABEL: @half_fix6(
 107 // UNSIGNED-NEXT:  entry:
 108 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 109 // UNSIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 110 // UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
 111 // UNSIGNED-NEXT:    [[TMP3:%.*]] = fptosi float [[TMP2]] to i64
 112 // UNSIGNED-NEXT:    store i64 [[TMP3]], ptr @ula, align 8
 113 // UNSIGNED-NEXT:    ret void
 114 //
 115 void half_fix6(void) {
 116   ula = h;
 117 }
 118
 119
 120 // CHECK-LABEL: @half_sat1(
 121 // CHECK-NEXT:  entry:
 122 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 123 // CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
 124 // CHECK-NEXT:    [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f16(half [[TMP1]])
 125 // CHECK-NEXT:    store i8 [[TMP2]], ptr @sf_sat, align 1
 126 // CHECK-NEXT:    ret void
 127 //
 128 void half_sat1(void) {
 129   sf_sat = h;
 130 }
 131
 132 // CHECK-LABEL: @half_sat2(
 133 // CHECK-NEXT:  entry:
 134 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 135 // CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 136 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
 137 // CHECK-NEXT:    [[TMP3:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP2]])
 138 // CHECK-NEXT:    store i32 [[TMP3]], ptr @lf_sat, align 4
 139 // CHECK-NEXT:    ret void
 140 //
 141 void half_sat2(void) {
 142   lf_sat = h;
 143 }
 144
 145 // CHECK-LABEL: @half_sat3(
 146 // CHECK-NEXT:  entry:
 147 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 148 // CHECK-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
 149 // CHECK-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
 150 // CHECK-NEXT:    store i16 [[TMP2]], ptr @sa_sat, align 2
 151 // CHECK-NEXT:    ret void
 152 //
 153 void half_sat3(void) {
 154   sa_sat = h;
 155 }
 156
 157 // CHECK-LABEL: @half_sat4(
 158 // CHECK-NEXT:  entry:
 159 // CHECK-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 160 // CHECK-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 161 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
 162 // CHECK-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
 163 // CHECK-NEXT:    store i64 [[TMP3]], ptr @la_sat, align 8
 164 // CHECK-NEXT:    ret void
 165 //
 166 void half_sat4(void) {
 167   la_sat = h;
 168 }
 169
 170 // SIGNED-LABEL: @half_sat5(
 171 // SIGNED-NEXT:  entry:
 172 // SIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 173 // SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 174 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02
 175 // SIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP2]])
 176 // SIGNED-NEXT:    store i16 [[TMP3]], ptr @usa_sat, align 2
 177 // SIGNED-NEXT:    ret void
 178 //
 179 // UNSIGNED-LABEL: @half_sat5(
 180 // UNSIGNED-NEXT:  entry:
 181 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 182 // UNSIGNED-NEXT:    [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800
 183 // UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]])
 184 // UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
 185 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
 186 // UNSIGNED-NEXT:    store i16 [[SATMIN]], ptr @usa_sat, align 2
 187 // UNSIGNED-NEXT:    ret void
 188 //
 189 void half_sat5(void) {
 190   usa_sat = h;
 191 }
 192
 193 // SIGNED-LABEL: @half_sat6(
 194 // SIGNED-NEXT:  entry:
 195 // SIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 196 // SIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 197 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000
 198 // SIGNED-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptoui.sat.i64.f32(float [[TMP2]])
 199 // SIGNED-NEXT:    store i64 [[TMP3]], ptr @ula_sat, align 8
 200 // SIGNED-NEXT:    ret void
 201 //
 202 // UNSIGNED-LABEL: @half_sat6(
 203 // UNSIGNED-NEXT:  entry:
 204 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load half, ptr @h, align 2
 205 // UNSIGNED-NEXT:    [[TMP1:%.*]] = fpext half [[TMP0]] to float
 206 // UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000
 207 // UNSIGNED-NEXT:    [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]])
 208 // UNSIGNED-NEXT:    [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
 209 // UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]]
 210 // UNSIGNED-NEXT:    store i64 [[SATMIN]], ptr @ula_sat, align 8
 211 // UNSIGNED-NEXT:    ret void
 212 //
 213 void half_sat6(void) {
 214   ula_sat = h;
 215 }
 216
 217
 218 // CHECK-LABEL: @fix_half1(
 219 // CHECK-NEXT:  entry:
 220 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @sf, align 1
 221 // CHECK-NEXT:    [[TMP1:%.*]] = sitofp i8 [[TMP0]] to half
 222 // CHECK-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
 223 // CHECK-NEXT:    store half [[TMP2]], ptr @h, align 2
 224 // CHECK-NEXT:    ret void
 225 //
 226 void fix_half1(void) {
 227   h = sf;
 228 }
 229
 230 // CHECK-LABEL: @fix_half2(
 231 // CHECK-NEXT:  entry:
 232 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @lf, align 4
 233 // CHECK-NEXT:    [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float
 234 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
 235 // CHECK-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
 236 // CHECK-NEXT:    store half [[TMP3]], ptr @h, align 2
 237 // CHECK-NEXT:    ret void
 238 //
 239 void fix_half2(void) {
 240   h = lf;
 241 }
 242
 243 // CHECK-LABEL: @fix_half3(
 244 // CHECK-NEXT:  entry:
 245 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @sa, align 2
 246 // CHECK-NEXT:    [[TMP1:%.*]] = sitofp i16 [[TMP0]] to half
 247 // CHECK-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
 248 // CHECK-NEXT:    store half [[TMP2]], ptr @h, align 2
 249 // CHECK-NEXT:    ret void
 250 //
 251 void fix_half3(void) {
 252   h = sa;
 253 }
 254
 255 // CHECK-LABEL: @fix_half4(
 256 // CHECK-NEXT:  entry:
 257 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @la, align 8
 258 // CHECK-NEXT:    [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float
 259 // CHECK-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
 260 // CHECK-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
 261 // CHECK-NEXT:    store half [[TMP3]], ptr @h, align 2
 262 // CHECK-NEXT:    ret void
 263 //
 264 void fix_half4(void) {
 265   h = la;
 266 }
 267
 268 // SIGNED-LABEL: @fix_half5(
 269 // SIGNED-NEXT:  entry:
 270 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa, align 2
 271 // SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float
 272 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 3.906250e-03
 273 // SIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
 274 // SIGNED-NEXT:    store half [[TMP3]], ptr @h, align 2
 275 // SIGNED-NEXT:    ret void
 276 //
 277 // UNSIGNED-LABEL: @fix_half5(
 278 // UNSIGNED-NEXT:  entry:
 279 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa, align 2
 280 // UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i16 [[TMP0]] to half
 281 // UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000
 282 // UNSIGNED-NEXT:    store half [[TMP2]], ptr @h, align 2
 283 // UNSIGNED-NEXT:    ret void
 284 //
 285 void fix_half5(void) {
 286   h = usa;
 287 }
 288
 289 // SIGNED-LABEL: @fix_half6(
 290 // SIGNED-NEXT:  entry:
 291 // SIGNED-NEXT:    [[TMP0:%.*]] = load i64, ptr @ula, align 8
 292 // SIGNED-NEXT:    [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
 293 // SIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3DF0000000000000
 294 // SIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
 295 // SIGNED-NEXT:    store half [[TMP3]], ptr @h, align 2
 296 // SIGNED-NEXT:    ret void
 297 //
 298 // UNSIGNED-LABEL: @fix_half6(
 299 // UNSIGNED-NEXT:  entry:
 300 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i64, ptr @ula, align 8
 301 // UNSIGNED-NEXT:    [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float
 302 // UNSIGNED-NEXT:    [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000
 303 // UNSIGNED-NEXT:    [[TMP3:%.*]] = fptrunc float [[TMP2]] to half
 304 // UNSIGNED-NEXT:    store half [[TMP3]], ptr @h, align 2
 305 // UNSIGNED-NEXT:    ret void
 306 //
 307 void fix_half6(void) {
 308   h = ula;
 309 }