clang/test/Headers/wasm.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --force-update
   2 // REQUIRES: webassembly-registered-target, asserts
   3
   4 // FIXME: This should not be using -O2 and implicitly testing the entire IR opt pipeline.
   5
   6 // RUN: %clang %s -O2 -emit-llvm -S -o - -target wasm32-unknown-unknown -msimd128 -Wall -Weverything -Wno-missing-prototypes -fno-lax-vector-conversions -Werror | FileCheck %s
   7
   8 #include <wasm_simd128.h>
   9
  10 // CHECK-LABEL: @test_v128_load(
  11 // CHECK-NEXT:  entry:
  12 // CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2:![0-9]+]]
  13 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
  14 //
  15 v128_t test_v128_load(const void *mem) {
  16   return wasm_v128_load(mem);
  17 }
  18
  19 // CHECK-LABEL: @test_v128_load8_splat(
  20 // CHECK-NEXT:  entry:
  21 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  22 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i64 0
  23 // CHECK-NEXT:    [[VECINIT16_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer
  24 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[VECINIT16_I]] to <4 x i32>
  25 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
  26 //
  27 v128_t test_v128_load8_splat(const void *mem) {
  28   return wasm_v128_load8_splat(mem);
  29 }
  30
  31 // CHECK-LABEL: @test_v128_load16_splat(
  32 // CHECK-NEXT:  entry:
  33 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  34 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i64 0
  35 // CHECK-NEXT:    [[VECINIT8_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer
  36 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[VECINIT8_I]] to <4 x i32>
  37 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
  38 //
  39 v128_t test_v128_load16_splat(const void *mem) {
  40   return wasm_v128_load16_splat(mem);
  41 }
  42
  43 // CHECK-LABEL: @test_v128_load32_splat(
  44 // CHECK-NEXT:  entry:
  45 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  46 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i64 0
  47 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
  48 // CHECK-NEXT:    ret <4 x i32> [[VECINIT4_I]]
  49 //
  50 v128_t test_v128_load32_splat(const void *mem) {
  51   return wasm_v128_load32_splat(mem);
  52 }
  53
  54 // CHECK-LABEL: @test_v128_load64_splat(
  55 // CHECK-NEXT:  entry:
  56 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  57 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0
  58 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
  59 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32>
  60 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
  61 //
  62 v128_t test_v128_load64_splat(const void *mem) {
  63   return wasm_v128_load64_splat(mem);
  64 }
  65
  66 // CHECK-LABEL: @test_i16x8_load8x8(
  67 // CHECK-NEXT:  entry:
  68 // CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  69 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <8 x i8> [[TMP0]] to <8 x i16>
  70 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
  71 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
  72 //
  73 v128_t test_i16x8_load8x8(const void *mem) {
  74   return wasm_i16x8_load8x8(mem);
  75 }
  76
  77 // CHECK-LABEL: @test_u16x8_load8x8(
  78 // CHECK-NEXT:  entry:
  79 // CHECK-NEXT:    [[TMP0:%.*]] = load <8 x i8>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  80 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16>
  81 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
  82 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
  83 //
  84 v128_t test_u16x8_load8x8(const void *mem) {
  85   return wasm_u16x8_load8x8(mem);
  86 }
  87
  88 // CHECK-LABEL: @test_i32x4_load16x4(
  89 // CHECK-NEXT:  entry:
  90 // CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
  91 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <4 x i16> [[TMP0]] to <4 x i32>
  92 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
  93 //
  94 v128_t test_i32x4_load16x4(const void *mem) {
  95   return wasm_i32x4_load16x4(mem);
  96 }
  97
  98 // CHECK-LABEL: @test_u32x4_load16x4(
  99 // CHECK-NEXT:  entry:
 100 // CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 101 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <4 x i16> [[TMP0]] to <4 x i32>
 102 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
 103 //
 104 v128_t test_u32x4_load16x4(const void *mem) {
 105   return wasm_u32x4_load16x4(mem);
 106 }
 107
 108 // CHECK-LABEL: @test_i64x2_load32x2(
 109 // CHECK-NEXT:  entry:
 110 // CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 111 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <2 x i32> [[TMP0]] to <2 x i64>
 112 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
 113 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 114 //
 115 v128_t test_i64x2_load32x2(const void *mem) {
 116   return wasm_i64x2_load32x2(mem);
 117 }
 118
 119 // CHECK-LABEL: @test_u64x2_load32x2(
 120 // CHECK-NEXT:  entry:
 121 // CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 122 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <2 x i32> [[TMP0]] to <2 x i64>
 123 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
 124 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 125 //
 126 v128_t test_u64x2_load32x2(const void *mem) {
 127   return wasm_u64x2_load32x2(mem);
 128 }
 129
 130 // CHECK-LABEL: @test_v128_load32_zero(
 131 // CHECK-NEXT:  entry:
 132 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 133 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 [[TMP0]], i64 0
 134 // CHECK-NEXT:    ret <4 x i32> [[VECINIT4_I]]
 135 //
 136 v128_t test_v128_load32_zero(const void *mem) {
 137   return wasm_v128_load32_zero(mem);
 138 }
 139
 140 // CHECK-LABEL: @test_v128_load64_zero(
 141 // CHECK-NEXT:  entry:
 142 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 143 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <2 x i64> <i64 poison, i64 0>, i64 [[TMP0]], i64 0
 144 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32>
 145 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 146 //
 147 v128_t test_v128_load64_zero(const void *mem) {
 148   return wasm_v128_load64_zero(mem);
 149 }
 150
 151 // CHECK-LABEL: @test_v128_load8_lane(
 152 // CHECK-NEXT:  entry:
 153 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 154 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8>
 155 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[TMP0]], i64 15
 156 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32>
 157 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 158 //
 159 v128_t test_v128_load8_lane(const uint8_t *ptr, v128_t vec) {
 160   return wasm_v128_load8_lane(ptr, vec, 15);
 161 }
 162
 163 // CHECK-LABEL: @test_v128_load16_lane(
 164 // CHECK-NEXT:  entry:
 165 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 166 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16>
 167 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[TMP0]], i64 7
 168 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32>
 169 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 170 //
 171 v128_t test_v128_load16_lane(const uint16_t *ptr, v128_t vec) {
 172   return wasm_v128_load16_lane(ptr, vec, 7);
 173 }
 174
 175 // CHECK-LABEL: @test_v128_load32_lane(
 176 // CHECK-NEXT:  entry:
 177 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 178 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <4 x i32> [[VEC:%.*]], i32 [[TMP0]], i64 3
 179 // CHECK-NEXT:    ret <4 x i32> [[VECINS_I]]
 180 //
 181 v128_t test_v128_load32_lane(const uint32_t *ptr, v128_t vec) {
 182   return wasm_v128_load32_lane(ptr, vec, 3);
 183 }
 184
 185 // CHECK-LABEL: @test_v128_load64_lane(
 186 // CHECK-NEXT:  entry:
 187 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 188 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64>
 189 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP0]], i64 1
 190 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32>
 191 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 192 //
 193 v128_t test_v128_load64_lane(const uint64_t *ptr, v128_t vec) {
 194   return wasm_v128_load64_lane(ptr, vec, 1);
 195 }
 196
 197 // CHECK-LABEL: @test_v128_store(
 198 // CHECK-NEXT:  entry:
 199 // CHECK-NEXT:    store <4 x i32> [[A:%.*]], ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]]
 200 // CHECK-NEXT:    ret void
 201 //
 202 void test_v128_store(void *mem, v128_t a) {
 203   wasm_v128_store(mem, a);
 204 }
 205
 206 // CHECK-LABEL: @test_v128_store8_lane(
 207 // CHECK-NEXT:  entry:
 208 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8>
 209 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15
 210 // CHECK-NEXT:    store i8 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 211 // CHECK-NEXT:    ret void
 212 //
 213 void test_v128_store8_lane(uint8_t *ptr, v128_t vec) {
 214   wasm_v128_store8_lane(ptr, vec, 15);
 215 }
 216
 217 // CHECK-LABEL: @test_v128_store16_lane(
 218 // CHECK-NEXT:  entry:
 219 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16>
 220 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7
 221 // CHECK-NEXT:    store i16 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 222 // CHECK-NEXT:    ret void
 223 //
 224 void test_v128_store16_lane(uint16_t *ptr, v128_t vec) {
 225   wasm_v128_store16_lane(ptr, vec, 7);
 226 }
 227
 228 // CHECK-LABEL: @test_v128_store32_lane(
 229 // CHECK-NEXT:  entry:
 230 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x i32> [[VEC:%.*]], i64 3
 231 // CHECK-NEXT:    store i32 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 232 // CHECK-NEXT:    ret void
 233 //
 234 void test_v128_store32_lane(uint32_t *ptr, v128_t vec) {
 235   wasm_v128_store32_lane(ptr, vec, 3);
 236 }
 237
 238 // CHECK-LABEL: @test_v128_store64_lane(
 239 // CHECK-NEXT:  entry:
 240 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64>
 241 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1
 242 // CHECK-NEXT:    store i64 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]]
 243 // CHECK-NEXT:    ret void
 244 //
 245 void test_v128_store64_lane(uint64_t *ptr, v128_t vec) {
 246   wasm_v128_store64_lane(ptr, vec, 1);
 247 }
 248
 249 // CHECK-LABEL: @test_i8x16_make(
 250 // CHECK-NEXT:  entry:
 251 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i64 0
 252 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i64 1
 253 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i64 2
 254 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i64 3
 255 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i64 4
 256 // CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i64 5
 257 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i64 6
 258 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i64 7
 259 // CHECK-NEXT:    [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i64 8
 260 // CHECK-NEXT:    [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i64 9
 261 // CHECK-NEXT:    [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i64 10
 262 // CHECK-NEXT:    [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i64 11
 263 // CHECK-NEXT:    [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i64 12
 264 // CHECK-NEXT:    [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i64 13
 265 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i64 14
 266 // CHECK-NEXT:    [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i64 15
 267 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32>
 268 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 269 //
 270 v128_t test_i8x16_make(int8_t c0, int8_t c1, int8_t c2, int8_t c3, int8_t c4, int8_t c5, int8_t c6, int8_t c7, int8_t c8, int8_t c9, int8_t c10, int8_t c11, int8_t c12, int8_t c13, int8_t c14, int8_t c15) {
 271   return wasm_i8x16_make(c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15);
 272 }
 273
 274 // CHECK-LABEL: @test_u8x16_make(
 275 // CHECK-NEXT:  entry:
 276 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[C0:%.*]], i64 0
 277 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], i8 [[C1:%.*]], i64 1
 278 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], i8 [[C2:%.*]], i64 2
 279 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], i8 [[C3:%.*]], i64 3
 280 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], i8 [[C4:%.*]], i64 4
 281 // CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], i8 [[C5:%.*]], i64 5
 282 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], i8 [[C6:%.*]], i64 6
 283 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], i8 [[C7:%.*]], i64 7
 284 // CHECK-NEXT:    [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], i8 [[C8:%.*]], i64 8
 285 // CHECK-NEXT:    [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], i8 [[C9:%.*]], i64 9
 286 // CHECK-NEXT:    [[VECINIT10_I:%.*]] = insertelement <16 x i8> [[VECINIT9_I]], i8 [[C10:%.*]], i64 10
 287 // CHECK-NEXT:    [[VECINIT11_I:%.*]] = insertelement <16 x i8> [[VECINIT10_I]], i8 [[C11:%.*]], i64 11
 288 // CHECK-NEXT:    [[VECINIT12_I:%.*]] = insertelement <16 x i8> [[VECINIT11_I]], i8 [[C12:%.*]], i64 12
 289 // CHECK-NEXT:    [[VECINIT13_I:%.*]] = insertelement <16 x i8> [[VECINIT12_I]], i8 [[C13:%.*]], i64 13
 290 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = insertelement <16 x i8> [[VECINIT13_I]], i8 [[C14:%.*]], i64 14
 291 // CHECK-NEXT:    [[VECINIT15_I:%.*]] = insertelement <16 x i8> [[VECINIT14_I]], i8 [[C15:%.*]], i64 15
 292 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32>
 293 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 294 //
 295 v128_t test_u8x16_make(uint8_t c0, uint8_t c1, uint8_t c2, uint8_t c3, uint8_t c4, uint8_t c5, uint8_t c6, uint8_t c7, uint8_t c8, uint8_t c9, uint8_t c10, uint8_t c11, uint8_t c12, uint8_t c13, uint8_t c14, uint8_t c15) {
 296   return wasm_u8x16_make(c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15);
 297 }
 298
 299 // CHECK-LABEL: @test_i16x8_make(
 300 // CHECK-NEXT:  entry:
 301 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i64 0
 302 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i64 1
 303 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i64 2
 304 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i64 3
 305 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i64 4
 306 // CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i64 5
 307 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i64 6
 308 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i64 7
 309 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32>
 310 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 311 //
 312 v128_t test_i16x8_make(int16_t c0, int16_t c1, int16_t c2, int16_t c3, int16_t c4, int16_t c5, int16_t c6, int16_t c7) {
 313   return wasm_i16x8_make(c0, c1, c2, c3, c4, c5, c6, c7);
 314 }
 315
 316 // CHECK-LABEL: @test_u16x8_make(
 317 // CHECK-NEXT:  entry:
 318 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[C0:%.*]], i64 0
 319 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <8 x i16> [[VECINIT_I]], i16 [[C1:%.*]], i64 1
 320 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <8 x i16> [[VECINIT1_I]], i16 [[C2:%.*]], i64 2
 321 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <8 x i16> [[VECINIT2_I]], i16 [[C3:%.*]], i64 3
 322 // CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <8 x i16> [[VECINIT3_I]], i16 [[C4:%.*]], i64 4
 323 // CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <8 x i16> [[VECINIT4_I]], i16 [[C5:%.*]], i64 5
 324 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <8 x i16> [[VECINIT5_I]], i16 [[C6:%.*]], i64 6
 325 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <8 x i16> [[VECINIT6_I]], i16 [[C7:%.*]], i64 7
 326 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32>
 327 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 328 //
 329 v128_t test_u16x8_make(uint16_t c0, uint16_t c1, uint16_t c2, uint16_t c3, uint16_t c4, uint16_t c5, uint16_t c6, uint16_t c7) {
 330   return wasm_u16x8_make(c0, c1, c2, c3, c4, c5, c6, c7);
 331 }
 332
 333 // CHECK-LABEL: @test_i32x4_make(
 334 // CHECK-NEXT:  entry:
 335 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i64 0
 336 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i64 1
 337 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i64 2
 338 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i64 3
 339 // CHECK-NEXT:    ret <4 x i32> [[VECINIT3_I]]
 340 //
 341 v128_t test_i32x4_make(int32_t c0, int32_t c1, int32_t c2, int32_t c3) {
 342   return wasm_i32x4_make(c0, c1, c2, c3);
 343 }
 344
 345 // CHECK-LABEL: @test_u32x4_make(
 346 // CHECK-NEXT:  entry:
 347 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[C0:%.*]], i64 0
 348 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <4 x i32> [[VECINIT_I]], i32 [[C1:%.*]], i64 1
 349 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <4 x i32> [[VECINIT1_I]], i32 [[C2:%.*]], i64 2
 350 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <4 x i32> [[VECINIT2_I]], i32 [[C3:%.*]], i64 3
 351 // CHECK-NEXT:    ret <4 x i32> [[VECINIT3_I]]
 352 //
 353 v128_t test_u32x4_make(uint32_t c0, uint32_t c1, uint32_t c2, uint32_t c3) {
 354   return wasm_u32x4_make(c0, c1, c2, c3);
 355 }
 356
 357 // CHECK-LABEL: @test_i64x2_make(
 358 // CHECK-NEXT:  entry:
 359 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i64 0
 360 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i64 1
 361 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32>
 362 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 363 //
 364 v128_t test_i64x2_make(int64_t c0, int64_t c1) {
 365   return wasm_i64x2_make(c0, c1);
 366 }
 367
 368 // CHECK-LABEL: @test_u64x2_make(
 369 // CHECK-NEXT:  entry:
 370 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[C0:%.*]], i64 0
 371 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 [[C1:%.*]], i64 1
 372 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32>
 373 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 374 //
 375 v128_t test_u64x2_make(uint64_t c0, uint64_t c1) {
 376   return wasm_u64x2_make(c0, c1);
 377 }
 378
 379 // CHECK-LABEL: @test_f32x4_make(
 380 // CHECK-NEXT:  entry:
 381 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[C0:%.*]], i64 0
 382 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float [[C1:%.*]], i64 1
 383 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float [[C2:%.*]], i64 2
 384 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <4 x float> [[VECINIT2_I]], float [[C3:%.*]], i64 3
 385 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[VECINIT3_I]] to <4 x i32>
 386 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 387 //
 388 v128_t test_f32x4_make(float c0, float c1, float c2, float c3) {
 389   return wasm_f32x4_make(c0, c1, c2, c3);
 390 }
 391
 392 // CHECK-LABEL: @test_f64x2_make(
 393 // CHECK-NEXT:  entry:
 394 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[C0:%.*]], i64 0
 395 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double [[C1:%.*]], i64 1
 396 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[VECINIT1_I]] to <4 x i32>
 397 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 398 //
 399 v128_t test_f64x2_make(double c0, double c1) {
 400   return wasm_f64x2_make(c0, c1);
 401 }
 402
 403 // CHECK-LABEL: @test_i8x16_const(
 404 // CHECK-NEXT:  entry:
 405 // CHECK-NEXT:    ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
 406 //
 407 v128_t test_i8x16_const(void) {
 408   return wasm_i8x16_const(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
 409 }
 410
 411 // CHECK-LABEL: @test_u8x16_const(
 412 // CHECK-NEXT:  entry:
 413 // CHECK-NEXT:    ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
 414 //
 415 v128_t test_u8x16_const(void) {
 416   return wasm_u8x16_const(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
 417 }
 418
 419 // CHECK-LABEL: @test_i16x8_const(
 420 // CHECK-NEXT:  entry:
 421 // CHECK-NEXT:    ret <4 x i32> <i32 65536, i32 196610, i32 327684, i32 458758>
 422 //
 423 v128_t test_i16x8_const(void) {
 424   return wasm_i16x8_const(0, 1, 2, 3, 4, 5, 6, 7);
 425 }
 426
 427 // CHECK-LABEL: @test_u16x8_const(
 428 // CHECK-NEXT:  entry:
 429 // CHECK-NEXT:    ret <4 x i32> <i32 65536, i32 196610, i32 327684, i32 458758>
 430 //
 431 v128_t test_u16x8_const(void) {
 432   return wasm_u16x8_const(0, 1, 2, 3, 4, 5, 6, 7);
 433 }
 434
 435 // CHECK-LABEL: @test_i32x4_const(
 436 // CHECK-NEXT:  entry:
 437 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 1, i32 2, i32 3>
 438 //
 439 v128_t test_i32x4_const(void) {
 440   return wasm_i32x4_const(0, 1, 2, 3);
 441 }
 442
 443 // CHECK-LABEL: @test_u32x4_const(
 444 // CHECK-NEXT:  entry:
 445 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 1, i32 2, i32 3>
 446 //
 447 v128_t test_u32x4_const(void) {
 448   return wasm_u32x4_const(0, 1, 2, 3);
 449 }
 450
 451 // CHECK-LABEL: @test_i64x2_const(
 452 // CHECK-NEXT:  entry:
 453 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 0, i32 1, i32 0>
 454 //
 455 v128_t test_i64x2_const(void) {
 456   return wasm_i64x2_const(0, 1);
 457 }
 458
 459 // CHECK-LABEL: @test_u64x2_const(
 460 // CHECK-NEXT:  entry:
 461 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 0, i32 1, i32 0>
 462 //
 463 v128_t test_u64x2_const(void) {
 464   return wasm_u64x2_const(0, 1);
 465 }
 466
 467 // CHECK-LABEL: @test_f32x4_const(
 468 // CHECK-NEXT:  entry:
 469 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 1065353216, i32 1073741824, i32 1077936128>
 470 //
 471 v128_t test_f32x4_const(void) {
 472   return wasm_f32x4_const(0, 1, 2, 3);
 473 }
 474
 475 // CHECK-LABEL: @test_f64x2_const(
 476 // CHECK-NEXT:  entry:
 477 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 0, i32 0, i32 1072693248>
 478 //
 479 v128_t test_f64x2_const(void) {
 480   return wasm_f64x2_const(0, 1);
 481 }
 482
 483 // CHECK-LABEL: @test_i8x16_const_splat(
 484 // CHECK-NEXT:  entry:
 485 // CHECK-NEXT:    ret <4 x i32> <i32 707406378, i32 707406378, i32 707406378, i32 707406378>
 486 //
 487 v128_t test_i8x16_const_splat(void) {
 488   return wasm_i8x16_const_splat(42);
 489 }
 490
 491 // CHECK-LABEL: @test_u8x16_const_splat(
 492 // CHECK-NEXT:  entry:
 493 // CHECK-NEXT:    ret <4 x i32> <i32 707406378, i32 707406378, i32 707406378, i32 707406378>
 494 //
 495 v128_t test_u8x16_const_splat(void) {
 496   return wasm_u8x16_const_splat(42);
 497 }
 498
 499 // CHECK-LABEL: @test_i16x8_const_splat(
 500 // CHECK-NEXT:  entry:
 501 // CHECK-NEXT:    ret <4 x i32> <i32 2752554, i32 2752554, i32 2752554, i32 2752554>
 502 //
 503 v128_t test_i16x8_const_splat(void) {
 504   return wasm_i16x8_const_splat(42);
 505 }
 506
 507 // CHECK-LABEL: @test_u16x8_const_splat(
 508 // CHECK-NEXT:  entry:
 509 // CHECK-NEXT:    ret <4 x i32> <i32 2752554, i32 2752554, i32 2752554, i32 2752554>
 510 //
 511 v128_t test_u16x8_const_splat(void) {
 512   return wasm_u16x8_const_splat(42);
 513 }
 514
 515 // CHECK-LABEL: @test_i32x4_const_splat(
 516 // CHECK-NEXT:  entry:
 517 // CHECK-NEXT:    ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
 518 //
 519 v128_t test_i32x4_const_splat(void) {
 520   return wasm_i32x4_const_splat(42);
 521 }
 522
 523 // CHECK-LABEL: @test_u32x4_const_splat(
 524 // CHECK-NEXT:  entry:
 525 // CHECK-NEXT:    ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
 526 //
 527 v128_t test_u32x4_const_splat(void) {
 528   return wasm_u32x4_const_splat(42);
 529 }
 530
 531 // CHECK-LABEL: @test_i64x2_const_splat(
 532 // CHECK-NEXT:  entry:
 533 // CHECK-NEXT:    ret <4 x i32> <i32 42, i32 0, i32 42, i32 0>
 534 //
 535 v128_t test_i64x2_const_splat(void) {
 536   return wasm_i64x2_const_splat(42);
 537 }
 538
 539 // CHECK-LABEL: @test_u64x2_const_splat(
 540 // CHECK-NEXT:  entry:
 541 // CHECK-NEXT:    ret <4 x i32> <i32 42, i32 0, i32 42, i32 0>
 542 //
 543 v128_t test_u64x2_const_splat(void) {
 544   return wasm_u64x2_const_splat(42);
 545 }
 546
 547 // CHECK-LABEL: @test_f32x4_const_splat(
 548 // CHECK-NEXT:  entry:
 549 // CHECK-NEXT:    ret <4 x i32> <i32 1109917696, i32 1109917696, i32 1109917696, i32 1109917696>
 550 //
 551 v128_t test_f32x4_const_splat(void) {
 552   return wasm_f32x4_const_splat(42);
 553 }
 554
 555 // CHECK-LABEL: @test_f64x2_const_splat(
 556 // CHECK-NEXT:  entry:
 557 // CHECK-NEXT:    ret <4 x i32> <i32 0, i32 1078263808, i32 0, i32 1078263808>
 558 //
 559 v128_t test_f64x2_const_splat(void) {
 560   return wasm_f64x2_const_splat(42);
 561 }
 562
 563 // CHECK-LABEL: @test_i8x16_splat(
 564 // CHECK-NEXT:  entry:
 565 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i64 0
 566 // CHECK-NEXT:    [[VECINIT15_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer
 567 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32>
 568 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 569 //
 570 v128_t test_i8x16_splat(int8_t a) {
 571   return wasm_i8x16_splat(a);
 572 }
 573
 574 // CHECK-LABEL: @test_u8x16_splat(
 575 // CHECK-NEXT:  entry:
 576 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i64 0
 577 // CHECK-NEXT:    [[VECINIT15_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer
 578 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[VECINIT15_I]] to <4 x i32>
 579 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 580 //
 581 v128_t test_u8x16_splat(uint8_t a) {
 582   return wasm_u8x16_splat(a);
 583 }
 584
 585 // CHECK-LABEL: @test_i8x16_extract_lane(
 586 // CHECK-NEXT:  entry:
 587 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 588 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15
 589 // CHECK-NEXT:    ret i8 [[VECEXT_I]]
 590 //
 591 int8_t test_i8x16_extract_lane(v128_t a) {
 592   return wasm_i8x16_extract_lane(a, 15);
 593 }
 594
 595 // CHECK-LABEL: @test_u8x16_extract_lane(
 596 // CHECK-NEXT:  entry:
 597 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 598 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15
 599 // CHECK-NEXT:    ret i8 [[VECEXT_I]]
 600 //
 601 uint8_t test_u8x16_extract_lane(v128_t a) {
 602   return wasm_u8x16_extract_lane(a, 15);
 603 }
 604
 605 // CHECK-LABEL: @test_i8x16_replace_lane(
 606 // CHECK-NEXT:  entry:
 607 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 608 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i64 15
 609 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32>
 610 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 611 //
 612 v128_t test_i8x16_replace_lane(v128_t a, int8_t b) {
 613   return wasm_i8x16_replace_lane(a, 15, b);
 614 }
 615
 616 // CHECK-LABEL: @test_u8x16_replace_lane(
 617 // CHECK-NEXT:  entry:
 618 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 619 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[B:%.*]], i64 15
 620 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32>
 621 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 622 //
 623 v128_t test_u8x16_replace_lane(v128_t a, uint8_t b) {
 624   return wasm_u8x16_replace_lane(a, 15, b);
 625 }
 626
 627 // CHECK-LABEL: @test_i16x8_splat(
 628 // CHECK-NEXT:  entry:
 629 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i64 0
 630 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer
 631 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32>
 632 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 633 //
 634 v128_t test_i16x8_splat(int16_t a) {
 635   return wasm_i16x8_splat(a);
 636 }
 637
 638 // CHECK-LABEL: @test_u16x8_splat(
 639 // CHECK-NEXT:  entry:
 640 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[A:%.*]], i64 0
 641 // CHECK-NEXT:    [[VECINIT7_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer
 642 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i16> [[VECINIT7_I]] to <4 x i32>
 643 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 644 //
 645 v128_t test_u16x8_splat(uint16_t a) {
 646   return wasm_u16x8_splat(a);
 647 }
 648
 649 // CHECK-LABEL: @test_i16x8_extract_lane(
 650 // CHECK-NEXT:  entry:
 651 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
 652 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7
 653 // CHECK-NEXT:    ret i16 [[VECEXT_I]]
 654 //
 655 int16_t test_i16x8_extract_lane(v128_t a) {
 656   return wasm_i16x8_extract_lane(a, 7);
 657 }
 658
 659 // CHECK-LABEL: @test_u16x8_extract_lane(
 660 // CHECK-NEXT:  entry:
 661 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
 662 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7
 663 // CHECK-NEXT:    ret i16 [[VECEXT_I]]
 664 //
 665 uint16_t test_u16x8_extract_lane(v128_t a) {
 666   return wasm_u16x8_extract_lane(a, 7);
 667 }
 668
 669 // CHECK-LABEL: @test_i16x8_replace_lane(
 670 // CHECK-NEXT:  entry:
 671 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
 672 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i64 7
 673 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32>
 674 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 675 //
 676 v128_t test_i16x8_replace_lane(v128_t a, int16_t b) {
 677   return wasm_i16x8_replace_lane(a, 7, b);
 678 }
 679
 680 // CHECK-LABEL: @test_u16x8_replace_lane(
 681 // CHECK-NEXT:  entry:
 682 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
 683 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[B:%.*]], i64 7
 684 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32>
 685 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 686 //
 687 v128_t test_u16x8_replace_lane(v128_t a, uint16_t b) {
 688   return wasm_u16x8_replace_lane(a, 7, b);
 689 }
 690
 691 // CHECK-LABEL: @test_i32x4_splat(
 692 // CHECK-NEXT:  entry:
 693 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i64 0
 694 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
 695 // CHECK-NEXT:    ret <4 x i32> [[VECINIT3_I]]
 696 //
 697 v128_t test_i32x4_splat(int32_t a) {
 698   return wasm_i32x4_splat(a);
 699 }
 700
 701 // CHECK-LABEL: @test_u32x4_splat(
 702 // CHECK-NEXT:  entry:
 703 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[A:%.*]], i64 0
 704 // CHECK-NEXT:    [[VECINIT3_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
 705 // CHECK-NEXT:    ret <4 x i32> [[VECINIT3_I]]
 706 //
 707 v128_t test_u32x4_splat(uint32_t a) {
 708   return wasm_u32x4_splat(a);
 709 }
 710
 711 // CHECK-LABEL: @test_i32x4_extract_lane(
 712 // CHECK-NEXT:  entry:
 713 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i64 3
 714 // CHECK-NEXT:    ret i32 [[VECEXT_I]]
 715 //
 716 int32_t test_i32x4_extract_lane(v128_t a) {
 717   return wasm_i32x4_extract_lane(a, 3);
 718 }
 719
 720 // CHECK-LABEL: @test_u32x4_extract_lane(
 721 // CHECK-NEXT:  entry:
 722 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x i32> [[A:%.*]], i64 3
 723 // CHECK-NEXT:    ret i32 [[VECEXT_I]]
 724 //
 725 uint32_t test_u32x4_extract_lane(v128_t a) {
 726   return wasm_u32x4_extract_lane(a, 3);
 727 }
 728
 729 // CHECK-LABEL: @test_i32x4_replace_lane(
 730 // CHECK-NEXT:  entry:
 731 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i64 3
 732 // CHECK-NEXT:    ret <4 x i32> [[VECINS_I]]
 733 //
 734 v128_t test_i32x4_replace_lane(v128_t a, int32_t b) {
 735   return wasm_i32x4_replace_lane(a, 3, b);
 736 }
 737
 738 // CHECK-LABEL: @test_u32x4_replace_lane(
 739 // CHECK-NEXT:  entry:
 740 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <4 x i32> [[A:%.*]], i32 [[B:%.*]], i64 3
 741 // CHECK-NEXT:    ret <4 x i32> [[VECINS_I]]
 742 //
 743 v128_t test_u32x4_replace_lane(v128_t a, uint32_t b) {
 744   return wasm_u32x4_replace_lane(a, 3, b);
 745 }
 746
 747 // CHECK-LABEL: @test_i64x2_splat(
 748 // CHECK-NEXT:  entry:
 749 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i64 0
 750 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
 751 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32>
 752 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 753 //
 754 v128_t test_i64x2_splat(int64_t a) {
 755   return wasm_i64x2_splat(a);
 756 }
 757
 758 // CHECK-LABEL: @test_u64x2_splat(
 759 // CHECK-NEXT:  entry:
 760 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[A:%.*]], i64 0
 761 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
 762 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[VECINIT1_I]] to <4 x i32>
 763 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 764 //
 765 v128_t test_u64x2_splat(uint64_t a) {
 766   return wasm_u64x2_splat(a);
 767 }
 768
 769 // CHECK-LABEL: @test_i64x2_extract_lane(
 770 // CHECK-NEXT:  entry:
 771 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
 772 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1
 773 // CHECK-NEXT:    ret i64 [[VECEXT_I]]
 774 //
 775 int64_t test_i64x2_extract_lane(v128_t a) {
 776   return wasm_i64x2_extract_lane(a, 1);
 777 }
 778
 779 // CHECK-LABEL: @test_u64x2_extract_lane(
 780 // CHECK-NEXT:  entry:
 781 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
 782 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1
 783 // CHECK-NEXT:    ret i64 [[VECEXT_I]]
 784 //
 785 uint64_t test_u64x2_extract_lane(v128_t a) {
 786   return wasm_u64x2_extract_lane(a, 1);
 787 }
 788
 789 // CHECK-LABEL: @test_i64x2_replace_lane(
 790 // CHECK-NEXT:  entry:
 791 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
 792 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
 793 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32>
 794 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 795 //
 796 v128_t test_i64x2_replace_lane(v128_t a, int64_t b) {
 797   return wasm_i64x2_replace_lane(a, 1, b);
 798 }
 799
 800 // CHECK-LABEL: @test_u64x2_replace_lane(
 801 // CHECK-NEXT:  entry:
 802 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
 803 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[B:%.*]], i64 1
 804 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32>
 805 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 806 //
 807 v128_t test_u64x2_replace_lane(v128_t a, uint64_t b) {
 808   return wasm_u64x2_replace_lane(a, 1, b);
 809 }
 810
 811 // CHECK-LABEL: @test_f32x4_splat(
 812 // CHECK-NEXT:  entry:
 813 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i64 0
 814 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[VECINIT_I]] to <4 x i32>
 815 // CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> zeroinitializer
 816 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 817 //
 818 v128_t test_f32x4_splat(float a) {
 819   return wasm_f32x4_splat(a);
 820 }
 821
 822 // CHECK-LABEL: @test_f32x4_extract_lane(
 823 // CHECK-NEXT:  entry:
 824 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
 825 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
 826 // CHECK-NEXT:    ret float [[VECEXT_I]]
 827 //
 828 float test_f32x4_extract_lane(v128_t a) {
 829   return wasm_f32x4_extract_lane(a, 3);
 830 }
 831
 832 // CHECK-LABEL: @test_f32x4_replace_lane(
 833 // CHECK-NEXT:  entry:
 834 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
 835 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <4 x float> [[TMP0]], float [[B:%.*]], i64 3
 836 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[VECINS_I]] to <4 x i32>
 837 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 838 //
 839 v128_t test_f32x4_replace_lane(v128_t a, float b) {
 840   return wasm_f32x4_replace_lane(a, 3, b);
 841 }
 842
 843 // CHECK-LABEL: @test_f64x2_splat(
 844 // CHECK-NEXT:  entry:
 845 // CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i64 0
 846 // CHECK-NEXT:    [[VECINIT1_I:%.*]] = shufflevector <2 x double> [[VECINIT_I]], <2 x double> poison, <2 x i32> zeroinitializer
 847 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[VECINIT1_I]] to <4 x i32>
 848 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 849 //
 850 v128_t test_f64x2_splat(double a) {
 851   return wasm_f64x2_splat(a);
 852 }
 853
 854 // CHECK-LABEL: @test_f64x2_extract_lane(
 855 // CHECK-NEXT:  entry:
 856 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
 857 // CHECK-NEXT:    [[VECEXT_I:%.*]] = extractelement <2 x double> [[TMP0]], i64 1
 858 // CHECK-NEXT:    ret double [[VECEXT_I]]
 859 //
 860 double test_f64x2_extract_lane(v128_t a) {
 861   return wasm_f64x2_extract_lane(a, 1);
 862 }
 863
 864 // CHECK-LABEL: @test_f64x2_replace_lane(
 865 // CHECK-NEXT:  entry:
 866 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
 867 // CHECK-NEXT:    [[VECINS_I:%.*]] = insertelement <2 x double> [[TMP0]], double [[B:%.*]], i64 1
 868 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[VECINS_I]] to <4 x i32>
 869 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
 870 //
 871 v128_t test_f64x2_replace_lane(v128_t a, double b) {
 872   return wasm_f64x2_replace_lane(a, 1, b);
 873 }
 874
 875 // CHECK-LABEL: @test_i8x16_eq(
 876 // CHECK-NEXT:  entry:
 877 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 878 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 879 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
 880 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 881 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 882 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 883 //
 884 v128_t test_i8x16_eq(v128_t a, v128_t b) {
 885   return wasm_i8x16_eq(a, b);
 886 }
 887
 888 // CHECK-LABEL: @test_i8x16_ne(
 889 // CHECK-NEXT:  entry:
 890 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 891 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 892 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ne <16 x i8> [[TMP0]], [[TMP1]]
 893 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 894 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 895 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 896 //
 897 v128_t test_i8x16_ne(v128_t a, v128_t b) {
 898   return wasm_i8x16_ne(a, b);
 899 }
 900
 901 // CHECK-LABEL: @test_i8x16_lt(
 902 // CHECK-NEXT:  entry:
 903 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 904 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 905 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <16 x i8> [[TMP0]], [[TMP1]]
 906 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 907 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 908 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 909 //
 910 v128_t test_i8x16_lt(v128_t a, v128_t b) {
 911   return wasm_i8x16_lt(a, b);
 912 }
 913
 914 // CHECK-LABEL: @test_u8x16_lt(
 915 // CHECK-NEXT:  entry:
 916 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 917 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 918 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <16 x i8> [[TMP0]], [[TMP1]]
 919 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 920 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 921 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 922 //
 923 v128_t test_u8x16_lt(v128_t a, v128_t b) {
 924   return wasm_u8x16_lt(a, b);
 925 }
 926
 927 // CHECK-LABEL: @test_i8x16_gt(
 928 // CHECK-NEXT:  entry:
 929 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 930 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 931 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <16 x i8> [[TMP0]], [[TMP1]]
 932 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 933 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 934 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 935 //
 936 v128_t test_i8x16_gt(v128_t a, v128_t b) {
 937   return wasm_i8x16_gt(a, b);
 938 }
 939
 940 // CHECK-LABEL: @test_u8x16_gt(
 941 // CHECK-NEXT:  entry:
 942 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 943 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 944 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <16 x i8> [[TMP0]], [[TMP1]]
 945 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 946 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 947 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 948 //
 949 v128_t test_u8x16_gt(v128_t a, v128_t b) {
 950   return wasm_u8x16_gt(a, b);
 951 }
 952
 953 // CHECK-LABEL: @test_i8x16_le(
 954 // CHECK-NEXT:  entry:
 955 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 956 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 957 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <16 x i8> [[TMP0]], [[TMP1]]
 958 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 959 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 960 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 961 //
 962 v128_t test_i8x16_le(v128_t a, v128_t b) {
 963   return wasm_i8x16_le(a, b);
 964 }
 965
 966 // CHECK-LABEL: @test_u8x16_le(
 967 // CHECK-NEXT:  entry:
 968 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 969 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 970 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <16 x i8> [[TMP0]], [[TMP1]]
 971 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 972 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 973 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 974 //
 975 v128_t test_u8x16_le(v128_t a, v128_t b) {
 976   return wasm_u8x16_le(a, b);
 977 }
 978
 979 // CHECK-LABEL: @test_i8x16_ge(
 980 // CHECK-NEXT:  entry:
 981 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 982 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 983 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <16 x i8> [[TMP0]], [[TMP1]]
 984 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 985 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 986 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
 987 //
 988 v128_t test_i8x16_ge(v128_t a, v128_t b) {
 989   return wasm_i8x16_ge(a, b);
 990 }
 991
 992 // CHECK-LABEL: @test_u8x16_ge(
 993 // CHECK-NEXT:  entry:
 994 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
 995 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
 996 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <16 x i8> [[TMP0]], [[TMP1]]
 997 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <16 x i1> [[CMP_I]] to <16 x i8>
 998 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SEXT_I]] to <4 x i32>
 999 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1000 //
1001 v128_t test_u8x16_ge(v128_t a, v128_t b) {
1002   return wasm_u8x16_ge(a, b);
1003 }
1004
1005 // CHECK-LABEL: @test_i16x8_eq(
1006 // CHECK-NEXT:  entry:
1007 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1008 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1009 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]
1010 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1011 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1012 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1013 //
1014 v128_t test_i16x8_eq(v128_t a, v128_t b) {
1015   return wasm_i16x8_eq(a, b);
1016 }
1017
1018 // CHECK-LABEL: @test_i16x8_ne(
1019 // CHECK-NEXT:  entry:
1020 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1021 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1022 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ne <8 x i16> [[TMP0]], [[TMP1]]
1023 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1024 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1025 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1026 //
1027 v128_t test_i16x8_ne(v128_t a, v128_t b) {
1028   return wasm_i16x8_ne(a, b);
1029 }
1030
1031 // CHECK-LABEL: @test_i16x8_lt(
1032 // CHECK-NEXT:  entry:
1033 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1034 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1035 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <8 x i16> [[TMP0]], [[TMP1]]
1036 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1037 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1038 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1039 //
1040 v128_t test_i16x8_lt(v128_t a, v128_t b) {
1041   return wasm_i16x8_lt(a, b);
1042 }
1043
1044 // CHECK-LABEL: @test_u16x8_lt(
1045 // CHECK-NEXT:  entry:
1046 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1047 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1048 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <8 x i16> [[TMP0]], [[TMP1]]
1049 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1050 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1051 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1052 //
1053 v128_t test_u16x8_lt(v128_t a, v128_t b) {
1054   return wasm_u16x8_lt(a, b);
1055 }
1056
1057 // CHECK-LABEL: @test_i16x8_gt(
1058 // CHECK-NEXT:  entry:
1059 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1060 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1061 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <8 x i16> [[TMP0]], [[TMP1]]
1062 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1063 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1064 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1065 //
1066 v128_t test_i16x8_gt(v128_t a, v128_t b) {
1067   return wasm_i16x8_gt(a, b);
1068 }
1069
1070 // CHECK-LABEL: @test_u16x8_gt(
1071 // CHECK-NEXT:  entry:
1072 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1073 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1074 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <8 x i16> [[TMP0]], [[TMP1]]
1075 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1076 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1077 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1078 //
1079 v128_t test_u16x8_gt(v128_t a, v128_t b) {
1080   return wasm_u16x8_gt(a, b);
1081 }
1082
1083 // CHECK-LABEL: @test_i16x8_le(
1084 // CHECK-NEXT:  entry:
1085 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1086 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1087 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <8 x i16> [[TMP0]], [[TMP1]]
1088 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1089 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1090 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1091 //
1092 v128_t test_i16x8_le(v128_t a, v128_t b) {
1093   return wasm_i16x8_le(a, b);
1094 }
1095
1096 // CHECK-LABEL: @test_u16x8_le(
1097 // CHECK-NEXT:  entry:
1098 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1099 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1100 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <8 x i16> [[TMP0]], [[TMP1]]
1101 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1102 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1103 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1104 //
1105 v128_t test_u16x8_le(v128_t a, v128_t b) {
1106   return wasm_u16x8_le(a, b);
1107 }
1108
1109 // CHECK-LABEL: @test_i16x8_ge(
1110 // CHECK-NEXT:  entry:
1111 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1112 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1113 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <8 x i16> [[TMP0]], [[TMP1]]
1114 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1115 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1116 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1117 //
1118 v128_t test_i16x8_ge(v128_t a, v128_t b) {
1119   return wasm_i16x8_ge(a, b);
1120 }
1121
1122 // CHECK-LABEL: @test_u16x8_ge(
1123 // CHECK-NEXT:  entry:
1124 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1125 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1126 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <8 x i16> [[TMP0]], [[TMP1]]
1127 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <8 x i1> [[CMP_I]] to <8 x i16>
1128 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SEXT_I]] to <4 x i32>
1129 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1130 //
1131 v128_t test_u16x8_ge(v128_t a, v128_t b) {
1132   return wasm_u16x8_ge(a, b);
1133 }
1134
1135 // CHECK-LABEL: @test_i32x4_eq(
1136 // CHECK-NEXT:  entry:
1137 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <4 x i32> [[A:%.*]], [[B:%.*]]
1138 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1139 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1140 //
1141 v128_t test_i32x4_eq(v128_t a, v128_t b) {
1142   return wasm_i32x4_eq(a, b);
1143 }
1144
1145 // CHECK-LABEL: @test_i32x4_ne(
1146 // CHECK-NEXT:  entry:
1147 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ne <4 x i32> [[A:%.*]], [[B:%.*]]
1148 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1149 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1150 //
1151 v128_t test_i32x4_ne(v128_t a, v128_t b) {
1152   return wasm_i32x4_ne(a, b);
1153 }
1154
1155 // CHECK-LABEL: @test_i32x4_lt(
1156 // CHECK-NEXT:  entry:
1157 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <4 x i32> [[A:%.*]], [[B:%.*]]
1158 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1159 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1160 //
1161 v128_t test_i32x4_lt(v128_t a, v128_t b) {
1162   return wasm_i32x4_lt(a, b);
1163 }
1164
1165 // CHECK-LABEL: @test_u32x4_lt(
1166 // CHECK-NEXT:  entry:
1167 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ult <4 x i32> [[A:%.*]], [[B:%.*]]
1168 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1169 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1170 //
1171 v128_t test_u32x4_lt(v128_t a, v128_t b) {
1172   return wasm_u32x4_lt(a, b);
1173 }
1174
1175 // CHECK-LABEL: @test_i32x4_gt(
1176 // CHECK-NEXT:  entry:
1177 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <4 x i32> [[A:%.*]], [[B:%.*]]
1178 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1179 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1180 //
1181 v128_t test_i32x4_gt(v128_t a, v128_t b) {
1182   return wasm_i32x4_gt(a, b);
1183 }
1184
1185 // CHECK-LABEL: @test_u32x4_gt(
1186 // CHECK-NEXT:  entry:
1187 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ugt <4 x i32> [[A:%.*]], [[B:%.*]]
1188 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1189 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1190 //
1191 v128_t test_u32x4_gt(v128_t a, v128_t b) {
1192   return wasm_u32x4_gt(a, b);
1193 }
1194
1195 // CHECK-LABEL: @test_i32x4_le(
1196 // CHECK-NEXT:  entry:
1197 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <4 x i32> [[A:%.*]], [[B:%.*]]
1198 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1199 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1200 //
1201 v128_t test_i32x4_le(v128_t a, v128_t b) {
1202   return wasm_i32x4_le(a, b);
1203 }
1204
1205 // CHECK-LABEL: @test_u32x4_le(
1206 // CHECK-NEXT:  entry:
1207 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]
1208 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1209 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1210 //
1211 v128_t test_u32x4_le(v128_t a, v128_t b) {
1212   return wasm_u32x4_le(a, b);
1213 }
1214
1215 // CHECK-LABEL: @test_i32x4_ge(
1216 // CHECK-NEXT:  entry:
1217 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <4 x i32> [[A:%.*]], [[B:%.*]]
1218 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1219 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1220 //
1221 v128_t test_i32x4_ge(v128_t a, v128_t b) {
1222   return wasm_i32x4_ge(a, b);
1223 }
1224
1225 // CHECK-LABEL: @test_u32x4_ge(
1226 // CHECK-NEXT:  entry:
1227 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp uge <4 x i32> [[A:%.*]], [[B:%.*]]
1228 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1229 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1230 //
1231 v128_t test_u32x4_ge(v128_t a, v128_t b) {
1232   return wasm_u32x4_ge(a, b);
1233 }
1234
1235 // CHECK-LABEL: @test_i64x2_eq(
1236 // CHECK-NEXT:  entry:
1237 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1238 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1239 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]]
1240 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1241 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1242 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1243 //
1244 v128_t test_i64x2_eq(v128_t a, v128_t b) {
1245   return wasm_i64x2_eq(a, b);
1246 }
1247
1248 // CHECK-LABEL: @test_i64x2_ne(
1249 // CHECK-NEXT:  entry:
1250 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1251 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1252 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp ne <2 x i64> [[TMP0]], [[TMP1]]
1253 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1254 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1255 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1256 //
1257 v128_t test_i64x2_ne(v128_t a, v128_t b) {
1258   return wasm_i64x2_ne(a, b);
1259 }
1260
1261 // CHECK-LABEL: @test_i64x2_lt(
1262 // CHECK-NEXT:  entry:
1263 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1264 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1265 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp slt <2 x i64> [[TMP0]], [[TMP1]]
1266 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1267 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1268 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1269 //
1270 v128_t test_i64x2_lt(v128_t a, v128_t b) {
1271   return wasm_i64x2_lt(a, b);
1272 }
1273
1274 // CHECK-LABEL: @test_i64x2_gt(
1275 // CHECK-NEXT:  entry:
1276 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1277 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1278 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sgt <2 x i64> [[TMP0]], [[TMP1]]
1279 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1280 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1281 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1282 //
1283 v128_t test_i64x2_gt(v128_t a, v128_t b) {
1284   return wasm_i64x2_gt(a, b);
1285 }
1286
1287 // CHECK-LABEL: @test_i64x2_le(
1288 // CHECK-NEXT:  entry:
1289 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1290 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1291 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sle <2 x i64> [[TMP0]], [[TMP1]]
1292 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1293 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1294 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1295 //
1296 v128_t test_i64x2_le(v128_t a, v128_t b) {
1297   return wasm_i64x2_le(a, b);
1298 }
1299
1300 // CHECK-LABEL: @test_i64x2_ge(
1301 // CHECK-NEXT:  entry:
1302 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
1303 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
1304 // CHECK-NEXT:    [[CMP_I:%.*]] = icmp sge <2 x i64> [[TMP0]], [[TMP1]]
1305 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1306 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1307 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1308 //
1309 v128_t test_i64x2_ge(v128_t a, v128_t b) {
1310   return wasm_i64x2_ge(a, b);
1311 }
1312
1313 // CHECK-LABEL: @test_f32x4_eq(
1314 // CHECK-NEXT:  entry:
1315 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1316 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1317 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <4 x float> [[TMP0]], [[TMP1]]
1318 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1319 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1320 //
1321 v128_t test_f32x4_eq(v128_t a, v128_t b) {
1322   return wasm_f32x4_eq(a, b);
1323 }
1324
1325 // CHECK-LABEL: @test_f32x4_ne(
1326 // CHECK-NEXT:  entry:
1327 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1328 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1329 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp une <4 x float> [[TMP0]], [[TMP1]]
1330 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1331 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1332 //
1333 v128_t test_f32x4_ne(v128_t a, v128_t b) {
1334   return wasm_f32x4_ne(a, b);
1335 }
1336
1337 // CHECK-LABEL: @test_f32x4_lt(
1338 // CHECK-NEXT:  entry:
1339 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1340 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1341 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <4 x float> [[TMP0]], [[TMP1]]
1342 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1343 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1344 //
1345 v128_t test_f32x4_lt(v128_t a, v128_t b) {
1346   return wasm_f32x4_lt(a, b);
1347 }
1348
1349 // CHECK-LABEL: @test_f32x4_gt(
1350 // CHECK-NEXT:  entry:
1351 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1352 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1353 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <4 x float> [[TMP0]], [[TMP1]]
1354 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1355 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1356 //
1357 v128_t test_f32x4_gt(v128_t a, v128_t b) {
1358   return wasm_f32x4_gt(a, b);
1359 }
1360
1361 // CHECK-LABEL: @test_f32x4_le(
1362 // CHECK-NEXT:  entry:
1363 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1364 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1365 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <4 x float> [[TMP0]], [[TMP1]]
1366 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1367 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1368 //
1369 v128_t test_f32x4_le(v128_t a, v128_t b) {
1370   return wasm_f32x4_le(a, b);
1371 }
1372
1373 // CHECK-LABEL: @test_f32x4_ge(
1374 // CHECK-NEXT:  entry:
1375 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
1376 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
1377 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <4 x float> [[TMP0]], [[TMP1]]
1378 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i32>
1379 // CHECK-NEXT:    ret <4 x i32> [[SEXT_I]]
1380 //
1381 v128_t test_f32x4_ge(v128_t a, v128_t b) {
1382   return wasm_f32x4_ge(a, b);
1383 }
1384
1385 // CHECK-LABEL: @test_f64x2_eq(
1386 // CHECK-NEXT:  entry:
1387 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1388 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1389 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oeq <2 x double> [[TMP0]], [[TMP1]]
1390 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1391 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1392 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1393 //
1394 v128_t test_f64x2_eq(v128_t a, v128_t b) {
1395   return wasm_f64x2_eq(a, b);
1396 }
1397
1398 // CHECK-LABEL: @test_f64x2_ne(
1399 // CHECK-NEXT:  entry:
1400 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1401 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1402 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp une <2 x double> [[TMP0]], [[TMP1]]
1403 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1404 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1405 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1406 //
1407 v128_t test_f64x2_ne(v128_t a, v128_t b) {
1408   return wasm_f64x2_ne(a, b);
1409 }
1410
1411 // CHECK-LABEL: @test_f64x2_lt(
1412 // CHECK-NEXT:  entry:
1413 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1414 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1415 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp olt <2 x double> [[TMP0]], [[TMP1]]
1416 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1417 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1418 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1419 //
1420 v128_t test_f64x2_lt(v128_t a, v128_t b) {
1421   return wasm_f64x2_lt(a, b);
1422 }
1423
1424 // CHECK-LABEL: @test_f64x2_gt(
1425 // CHECK-NEXT:  entry:
1426 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1427 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1428 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ogt <2 x double> [[TMP0]], [[TMP1]]
1429 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1430 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1431 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1432 //
1433 v128_t test_f64x2_gt(v128_t a, v128_t b) {
1434   return wasm_f64x2_gt(a, b);
1435 }
1436
1437 // CHECK-LABEL: @test_f64x2_le(
1438 // CHECK-NEXT:  entry:
1439 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1440 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1441 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp ole <2 x double> [[TMP0]], [[TMP1]]
1442 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1443 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1444 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1445 //
1446 v128_t test_f64x2_le(v128_t a, v128_t b) {
1447   return wasm_f64x2_le(a, b);
1448 }
1449
1450 // CHECK-LABEL: @test_f64x2_ge(
1451 // CHECK-NEXT:  entry:
1452 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
1453 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
1454 // CHECK-NEXT:    [[CMP_I:%.*]] = fcmp oge <2 x double> [[TMP0]], [[TMP1]]
1455 // CHECK-NEXT:    [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
1456 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SEXT_I]] to <4 x i32>
1457 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1458 //
1459 v128_t test_f64x2_ge(v128_t a, v128_t b) {
1460   return wasm_f64x2_ge(a, b);
1461 }
1462
1463 // CHECK-LABEL: @test_v128_not(
1464 // CHECK-NEXT:  entry:
1465 // CHECK-NEXT:    [[NEG_I:%.*]] = xor <4 x i32> [[A:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
1466 // CHECK-NEXT:    ret <4 x i32> [[NEG_I]]
1467 //
1468 v128_t test_v128_not(v128_t a) {
1469   return wasm_v128_not(a);
1470 }
1471
1472 // CHECK-LABEL: @test_v128_and(
1473 // CHECK-NEXT:  entry:
1474 // CHECK-NEXT:    [[AND_I:%.*]] = and <4 x i32> [[B:%.*]], [[A:%.*]]
1475 // CHECK-NEXT:    ret <4 x i32> [[AND_I]]
1476 //
1477 v128_t test_v128_and(v128_t a, v128_t b) {
1478   return wasm_v128_and(a, b);
1479 }
1480
1481 // CHECK-LABEL: @test_v128_or(
1482 // CHECK-NEXT:  entry:
1483 // CHECK-NEXT:    [[OR_I:%.*]] = or <4 x i32> [[B:%.*]], [[A:%.*]]
1484 // CHECK-NEXT:    ret <4 x i32> [[OR_I]]
1485 //
1486 v128_t test_v128_or(v128_t a, v128_t b) {
1487   return wasm_v128_or(a, b);
1488 }
1489
1490 // CHECK-LABEL: @test_v128_xor(
1491 // CHECK-NEXT:  entry:
1492 // CHECK-NEXT:    [[XOR_I:%.*]] = xor <4 x i32> [[B:%.*]], [[A:%.*]]
1493 // CHECK-NEXT:    ret <4 x i32> [[XOR_I]]
1494 //
1495 v128_t test_v128_xor(v128_t a, v128_t b) {
1496   return wasm_v128_xor(a, b);
1497 }
1498
1499 // CHECK-LABEL: @test_v128_andnot(
1500 // CHECK-NEXT:  entry:
1501 // CHECK-NEXT:    [[NEG_I:%.*]] = xor <4 x i32> [[B:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
1502 // CHECK-NEXT:    [[AND_I:%.*]] = and <4 x i32> [[NEG_I]], [[A:%.*]]
1503 // CHECK-NEXT:    ret <4 x i32> [[AND_I]]
1504 //
1505 v128_t test_v128_andnot(v128_t a, v128_t b) {
1506   return wasm_v128_andnot(a, b);
1507 }
1508
1509 // CHECK-LABEL: @test_v128_any_true(
1510 // CHECK-NEXT:  entry:
1511 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1512 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> [[TMP0]])
1513 // CHECK-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0
1514 // CHECK-NEXT:    ret i1 [[TOBOOL_I]]
1515 //
1516 bool test_v128_any_true(v128_t a) {
1517   return wasm_v128_any_true(a);
1518 }
1519
1520 // CHECK-LABEL: @test_v128_bitselect(
1521 // CHECK-NEXT:  entry:
1522 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.wasm.bitselect.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[MASK:%.*]])
1523 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
1524 //
1525 v128_t test_v128_bitselect(v128_t a, v128_t b, v128_t mask) {
1526   return wasm_v128_bitselect(a, b, mask);
1527 }
1528
1529 // CHECK-LABEL: @test_i8x16_abs(
1530 // CHECK-NEXT:  entry:
1531 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1532 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <16 x i8> @llvm.abs.v16i8(<16 x i8> [[TMP0]], i1 false)
1533 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
1534 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1535 //
1536 v128_t test_i8x16_abs(v128_t a) {
1537   return wasm_i8x16_abs(a);
1538 }
1539
1540 // CHECK-LABEL: @test_i8x16_neg(
1541 // CHECK-NEXT:  entry:
1542 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1543 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> zeroinitializer, [[TMP0]]
1544 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[SUB_I]] to <4 x i32>
1545 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
1546 //
1547 v128_t test_i8x16_neg(v128_t a) {
1548   return wasm_i8x16_neg(a);
1549 }
1550
1551 // CHECK-LABEL: @test_i8x16_all_true(
1552 // CHECK-NEXT:  entry:
1553 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1554 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v16i8(<16 x i8> [[TMP0]])
1555 // CHECK-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0
1556 // CHECK-NEXT:    ret i1 [[TOBOOL_I]]
1557 //
1558 bool test_i8x16_all_true(v128_t a) {
1559   return wasm_i8x16_all_true(a);
1560 }
1561
1562 // CHECK-LABEL: @test_i8x16_bitmask(
1563 // CHECK-NEXT:  entry:
1564 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1565 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v16i8(<16 x i8> [[TMP0]])
1566 // CHECK-NEXT:    ret i32 [[TMP1]]
1567 //
1568 uint32_t test_i8x16_bitmask(v128_t a) {
1569   return wasm_i8x16_bitmask(a);
1570 }
1571
1572 // CHECK-LABEL: @test_i8x16_popcnt(
1573 // CHECK-NEXT:  entry:
1574 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1575 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> [[TMP0]])
1576 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
1577 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1578 //
1579 v128_t test_i8x16_popcnt(v128_t a) {
1580   return wasm_i8x16_popcnt(a);
1581 }
1582
1583 // CHECK-LABEL: @test_i8x16_shl(
1584 // CHECK-NEXT:  entry:
1585 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1586 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8
1587 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0
1588 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer
1589 // CHECK-NEXT:    [[SHL_I:%.*]] = shl <16 x i8> [[TMP0]], [[SH_PROM_I]]
1590 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[SHL_I]] to <4 x i32>
1591 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1592 //
1593 v128_t test_i8x16_shl(v128_t a, uint32_t b) {
1594   return wasm_i8x16_shl(a, b);
1595 }
1596
1597 // CHECK-LABEL: @test_i8x16_shr(
1598 // CHECK-NEXT:  entry:
1599 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1600 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8
1601 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0
1602 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer
1603 // CHECK-NEXT:    [[SHR_I:%.*]] = ashr <16 x i8> [[TMP0]], [[SH_PROM_I]]
1604 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32>
1605 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1606 //
1607 v128_t test_i8x16_shr(v128_t a, uint32_t b) {
1608   return wasm_i8x16_shr(a, b);
1609 }
1610
1611 // CHECK-LABEL: @test_u8x16_shr(
1612 // CHECK-NEXT:  entry:
1613 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1614 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i8
1615 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <16 x i8> undef, i8 [[TMP1]], i64 0
1616 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> poison, <16 x i32> zeroinitializer
1617 // CHECK-NEXT:    [[SHR_I:%.*]] = lshr <16 x i8> [[TMP0]], [[SH_PROM_I]]
1618 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32>
1619 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1620 //
1621 v128_t test_u8x16_shr(v128_t a, uint32_t b) {
1622   return wasm_u8x16_shr(a, b);
1623 }
1624
1625 // CHECK-LABEL: @test_i8x16_add(
1626 // CHECK-NEXT:  entry:
1627 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1628 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1629 // CHECK-NEXT:    [[ADD_I:%.*]] = add <16 x i8> [[TMP1]], [[TMP0]]
1630 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[ADD_I]] to <4 x i32>
1631 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1632 //
1633 v128_t test_i8x16_add(v128_t a, v128_t b) {
1634   return wasm_i8x16_add(a, b);
1635 }
1636
1637 // CHECK-LABEL: @test_i8x16_add_sat(
1638 // CHECK-NEXT:  entry:
1639 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1640 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1641 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1642 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1643 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1644 //
1645 v128_t test_i8x16_add_sat(v128_t a, v128_t b) {
1646   return wasm_i8x16_add_sat(a, b);
1647 }
1648
1649 // CHECK-LABEL: @test_u8x16_add_sat(
1650 // CHECK-NEXT:  entry:
1651 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1652 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1653 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.uadd.sat.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1654 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1655 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1656 //
1657 v128_t test_u8x16_add_sat(v128_t a, v128_t b) {
1658   return wasm_u8x16_add_sat(a, b);
1659 }
1660
1661 // CHECK-LABEL: @test_i8x16_sub(
1662 // CHECK-NEXT:  entry:
1663 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1664 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1665 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <16 x i8> [[TMP0]], [[TMP1]]
1666 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[SUB_I]] to <4 x i32>
1667 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1668 //
1669 v128_t test_i8x16_sub(v128_t a, v128_t b) {
1670   return wasm_i8x16_sub(a, b);
1671 }
1672
1673 // CHECK-LABEL: @test_i8x16_sub_sat(
1674 // CHECK-NEXT:  entry:
1675 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1676 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1677 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.signed.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1678 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1679 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1680 //
1681 v128_t test_i8x16_sub_sat(v128_t a, v128_t b) {
1682   return wasm_i8x16_sub_sat(a, b);
1683 }
1684
1685 // CHECK-LABEL: @test_u8x16_sub_sat(
1686 // CHECK-NEXT:  entry:
1687 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1688 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1689 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.sub.sat.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1690 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1691 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1692 //
1693 v128_t test_u8x16_sub_sat(v128_t a, v128_t b) {
1694   return wasm_u8x16_sub_sat(a, b);
1695 }
1696
1697 // CHECK-LABEL: @test_i8x16_min(
1698 // CHECK-NEXT:  entry:
1699 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1700 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1701 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.smin.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1702 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1703 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1704 //
1705 v128_t test_i8x16_min(v128_t a, v128_t b) {
1706   return wasm_i8x16_min(a, b);
1707 }
1708
1709 // CHECK-LABEL: @test_u8x16_min(
1710 // CHECK-NEXT:  entry:
1711 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1712 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1713 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.umin.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1714 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1715 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1716 //
1717 v128_t test_u8x16_min(v128_t a, v128_t b) {
1718   return wasm_u8x16_min(a, b);
1719 }
1720
1721 // CHECK-LABEL: @test_i8x16_max(
1722 // CHECK-NEXT:  entry:
1723 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1724 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1725 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.smax.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1726 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1727 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1728 //
1729 v128_t test_i8x16_max(v128_t a, v128_t b) {
1730   return wasm_i8x16_max(a, b);
1731 }
1732
1733 // CHECK-LABEL: @test_u8x16_max(
1734 // CHECK-NEXT:  entry:
1735 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1736 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1737 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.umax.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1738 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1739 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1740 //
1741 v128_t test_u8x16_max(v128_t a, v128_t b) {
1742   return wasm_u8x16_max(a, b);
1743 }
1744
1745 // CHECK-LABEL: @test_u8x16_avgr(
1746 // CHECK-NEXT:  entry:
1747 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
1748 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
1749 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
1750 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
1751 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1752 //
1753 v128_t test_u8x16_avgr(v128_t a, v128_t b) {
1754   return wasm_u8x16_avgr(a, b);
1755 }
1756
1757 // CHECK-LABEL: @test_i16x8_abs(
1758 // CHECK-NEXT:  entry:
1759 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1760 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <8 x i16> @llvm.abs.v8i16(<8 x i16> [[TMP0]], i1 false)
1761 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32>
1762 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1763 //
1764 v128_t test_i16x8_abs(v128_t a) {
1765   return wasm_i16x8_abs(a);
1766 }
1767
1768 // CHECK-LABEL: @test_i16x8_neg(
1769 // CHECK-NEXT:  entry:
1770 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1771 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> zeroinitializer, [[TMP0]]
1772 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[SUB_I]] to <4 x i32>
1773 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
1774 //
1775 v128_t test_i16x8_neg(v128_t a) {
1776   return wasm_i16x8_neg(a);
1777 }
1778
1779 // CHECK-LABEL: @test_i16x8_all_true(
1780 // CHECK-NEXT:  entry:
1781 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1782 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v8i16(<8 x i16> [[TMP0]])
1783 // CHECK-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0
1784 // CHECK-NEXT:    ret i1 [[TOBOOL_I]]
1785 //
1786 bool test_i16x8_all_true(v128_t a) {
1787   return wasm_i16x8_all_true(a);
1788 }
1789
1790 // CHECK-LABEL: @test_i16x8_bitmask(
1791 // CHECK-NEXT:  entry:
1792 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1793 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v8i16(<8 x i16> [[TMP0]])
1794 // CHECK-NEXT:    ret i32 [[TMP1]]
1795 //
1796 uint32_t test_i16x8_bitmask(v128_t a) {
1797   return wasm_i16x8_bitmask(a);
1798 }
1799
1800 // CHECK-LABEL: @test_i16x8_shl(
1801 // CHECK-NEXT:  entry:
1802 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1803 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16
1804 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0
1805 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer
1806 // CHECK-NEXT:    [[SHL_I:%.*]] = shl <8 x i16> [[TMP0]], [[SH_PROM_I]]
1807 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[SHL_I]] to <4 x i32>
1808 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1809 //
1810 v128_t test_i16x8_shl(v128_t a, uint32_t b) {
1811   return wasm_i16x8_shl(a, b);
1812 }
1813
1814 // CHECK-LABEL: @test_i16x8_shr(
1815 // CHECK-NEXT:  entry:
1816 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1817 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16
1818 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0
1819 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer
1820 // CHECK-NEXT:    [[SHR_I:%.*]] = ashr <8 x i16> [[TMP0]], [[SH_PROM_I]]
1821 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32>
1822 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1823 //
1824 v128_t test_i16x8_shr(v128_t a, uint32_t b) {
1825   return wasm_i16x8_shr(a, b);
1826 }
1827
1828 // CHECK-LABEL: @test_u16x8_shr(
1829 // CHECK-NEXT:  entry:
1830 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1831 // CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[B:%.*]] to i16
1832 // CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i16> undef, i16 [[TMP1]], i64 0
1833 // CHECK-NEXT:    [[SH_PROM_I:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> poison, <8 x i32> zeroinitializer
1834 // CHECK-NEXT:    [[SHR_I:%.*]] = lshr <8 x i16> [[TMP0]], [[SH_PROM_I]]
1835 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32>
1836 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1837 //
1838 v128_t test_u16x8_shr(v128_t a, uint32_t b) {
1839   return wasm_u16x8_shr(a, b);
1840 }
1841
1842 // CHECK-LABEL: @test_i16x8_add(
1843 // CHECK-NEXT:  entry:
1844 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1845 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1846 // CHECK-NEXT:    [[ADD_I:%.*]] = add <8 x i16> [[TMP1]], [[TMP0]]
1847 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[ADD_I]] to <4 x i32>
1848 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1849 //
1850 v128_t test_i16x8_add(v128_t a, v128_t b) {
1851   return wasm_i16x8_add(a, b);
1852 }
1853
1854 // CHECK-LABEL: @test_i16x8_add_sat(
1855 // CHECK-NEXT:  entry:
1856 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1857 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1858 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1859 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1860 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1861 //
1862 v128_t test_i16x8_add_sat(v128_t a, v128_t b) {
1863   return wasm_i16x8_add_sat(a, b);
1864 }
1865
1866 // CHECK-LABEL: @test_u16x8_add_sat(
1867 // CHECK-NEXT:  entry:
1868 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1869 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1870 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.uadd.sat.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1871 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1872 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1873 //
1874 v128_t test_u16x8_add_sat(v128_t a, v128_t b) {
1875   return wasm_u16x8_add_sat(a, b);
1876 }
1877
1878 // CHECK-LABEL: @test_i16x8_sub(
1879 // CHECK-NEXT:  entry:
1880 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1881 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1882 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <8 x i16> [[TMP0]], [[TMP1]]
1883 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[SUB_I]] to <4 x i32>
1884 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1885 //
1886 v128_t test_i16x8_sub(v128_t a, v128_t b) {
1887   return wasm_i16x8_sub(a, b);
1888 }
1889
1890 // CHECK-LABEL: @test_i16x8_sub_sat(
1891 // CHECK-NEXT:  entry:
1892 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1893 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1894 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.signed.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1895 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1896 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1897 //
1898 v128_t test_i16x8_sub_sat(v128_t a, v128_t b) {
1899   return wasm_i16x8_sub_sat(a, b);
1900 }
1901
1902 // CHECK-LABEL: @test_u16x8_sub_sat(
1903 // CHECK-NEXT:  entry:
1904 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1905 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1906 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.sub.sat.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1907 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1908 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1909 //
1910 v128_t test_u16x8_sub_sat(v128_t a, v128_t b) {
1911   return wasm_u16x8_sub_sat(a, b);
1912 }
1913
1914 // CHECK-LABEL: @test_i16x8_mul(
1915 // CHECK-NEXT:  entry:
1916 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1917 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1918 // CHECK-NEXT:    [[MUL_I:%.*]] = mul <8 x i16> [[TMP1]], [[TMP0]]
1919 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[MUL_I]] to <4 x i32>
1920 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
1921 //
1922 v128_t test_i16x8_mul(v128_t a, v128_t b) {
1923   return wasm_i16x8_mul(a, b);
1924 }
1925
1926 // CHECK-LABEL: @test_i16x8_min(
1927 // CHECK-NEXT:  entry:
1928 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1929 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1930 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.smin.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1931 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1932 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1933 //
1934 v128_t test_i16x8_min(v128_t a, v128_t b) {
1935   return wasm_i16x8_min(a, b);
1936 }
1937
1938 // CHECK-LABEL: @test_u16x8_min(
1939 // CHECK-NEXT:  entry:
1940 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1941 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1942 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1943 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1944 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1945 //
1946 v128_t test_u16x8_min(v128_t a, v128_t b) {
1947   return wasm_u16x8_min(a, b);
1948 }
1949
1950 // CHECK-LABEL: @test_i16x8_max(
1951 // CHECK-NEXT:  entry:
1952 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1953 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1954 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.smax.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1955 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1956 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1957 //
1958 v128_t test_i16x8_max(v128_t a, v128_t b) {
1959   return wasm_i16x8_max(a, b);
1960 }
1961
1962 // CHECK-LABEL: @test_u16x8_max(
1963 // CHECK-NEXT:  entry:
1964 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1965 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1966 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.umax.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1967 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1968 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1969 //
1970 v128_t test_u16x8_max(v128_t a, v128_t b) {
1971   return wasm_u16x8_max(a, b);
1972 }
1973
1974 // CHECK-LABEL: @test_u16x8_avgr(
1975 // CHECK-NEXT:  entry:
1976 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
1977 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
1978 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.avgr.unsigned.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
1979 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
1980 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
1981 //
1982 v128_t test_u16x8_avgr(v128_t a, v128_t b) {
1983   return wasm_u16x8_avgr(a, b);
1984 }
1985
1986 // CHECK-LABEL: @test_i32x4_abs(
1987 // CHECK-NEXT:  entry:
1988 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[A:%.*]], i1 false)
1989 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
1990 //
1991 v128_t test_i32x4_abs(v128_t a) {
1992   return wasm_i32x4_abs(a);
1993 }
1994
1995 // CHECK-LABEL: @test_i32x4_neg(
1996 // CHECK-NEXT:  entry:
1997 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> zeroinitializer, [[A:%.*]]
1998 // CHECK-NEXT:    ret <4 x i32> [[SUB_I]]
1999 //
2000 v128_t test_i32x4_neg(v128_t a) {
2001   return wasm_i32x4_neg(a);
2002 }
2003
2004 // CHECK-LABEL: @test_i32x4_all_true(
2005 // CHECK-NEXT:  entry:
2006 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.wasm.alltrue.v4i32(<4 x i32> [[A:%.*]])
2007 // CHECK-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP0]], 0
2008 // CHECK-NEXT:    ret i1 [[TOBOOL_I]]
2009 //
2010 bool test_i32x4_all_true(v128_t a) {
2011   return wasm_i32x4_all_true(a);
2012 }
2013
2014 // CHECK-LABEL: @test_i32x4_bitmask(
2015 // CHECK-NEXT:  entry:
2016 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.wasm.bitmask.v4i32(<4 x i32> [[A:%.*]])
2017 // CHECK-NEXT:    ret i32 [[TMP0]]
2018 //
2019 uint32_t test_i32x4_bitmask(v128_t a) {
2020   return wasm_i32x4_bitmask(a);
2021 }
2022
2023 // CHECK-LABEL: @test_i32x4_shl(
2024 // CHECK-NEXT:  entry:
2025 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0
2026 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
2027 // CHECK-NEXT:    [[SHL_I:%.*]] = shl <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
2028 // CHECK-NEXT:    ret <4 x i32> [[SHL_I]]
2029 //
2030 v128_t test_i32x4_shl(v128_t a, uint32_t b) {
2031   return wasm_i32x4_shl(a, b);
2032 }
2033
2034 // CHECK-LABEL: @test_i32x4_shr(
2035 // CHECK-NEXT:  entry:
2036 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0
2037 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
2038 // CHECK-NEXT:    [[SHR_I:%.*]] = ashr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
2039 // CHECK-NEXT:    ret <4 x i32> [[SHR_I]]
2040 //
2041 v128_t test_i32x4_shr(v128_t a, uint32_t b) {
2042   return wasm_i32x4_shr(a, b);
2043 }
2044
2045 // CHECK-LABEL: @test_u32x4_shr(
2046 // CHECK-NEXT:  entry:
2047 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <4 x i32> poison, i32 [[B:%.*]], i64 0
2048 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <4 x i32> [[SPLAT_SPLATINSERT_I]], <4 x i32> poison, <4 x i32> zeroinitializer
2049 // CHECK-NEXT:    [[SHR_I:%.*]] = lshr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
2050 // CHECK-NEXT:    ret <4 x i32> [[SHR_I]]
2051 //
2052 v128_t test_u32x4_shr(v128_t a, uint32_t b) {
2053   return wasm_u32x4_shr(a, b);
2054 }
2055
2056 // CHECK-LABEL: @test_i32x4_add(
2057 // CHECK-NEXT:  entry:
2058 // CHECK-NEXT:    [[ADD_I:%.*]] = add <4 x i32> [[B:%.*]], [[A:%.*]]
2059 // CHECK-NEXT:    ret <4 x i32> [[ADD_I]]
2060 //
2061 v128_t test_i32x4_add(v128_t a, v128_t b) {
2062   return wasm_i32x4_add(a, b);
2063 }
2064
2065 // CHECK-LABEL: @test_i32x4_sub(
2066 // CHECK-NEXT:  entry:
2067 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <4 x i32> [[A:%.*]], [[B:%.*]]
2068 // CHECK-NEXT:    ret <4 x i32> [[SUB_I]]
2069 //
2070 v128_t test_i32x4_sub(v128_t a, v128_t b) {
2071   return wasm_i32x4_sub(a, b);
2072 }
2073
2074 // CHECK-LABEL: @test_i32x4_mul(
2075 // CHECK-NEXT:  entry:
2076 // CHECK-NEXT:    [[MUL_I:%.*]] = mul <4 x i32> [[B:%.*]], [[A:%.*]]
2077 // CHECK-NEXT:    ret <4 x i32> [[MUL_I]]
2078 //
2079 v128_t test_i32x4_mul(v128_t a, v128_t b) {
2080   return wasm_i32x4_mul(a, b);
2081 }
2082
2083 // CHECK-LABEL: @test_i32x4_min(
2084 // CHECK-NEXT:  entry:
2085 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2086 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2087 //
2088 v128_t test_i32x4_min(v128_t a, v128_t b) {
2089   return wasm_i32x4_min(a, b);
2090 }
2091
2092 // CHECK-LABEL: @test_u32x4_min(
2093 // CHECK-NEXT:  entry:
2094 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2095 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2096 //
2097 v128_t test_u32x4_min(v128_t a, v128_t b) {
2098   return wasm_u32x4_min(a, b);
2099 }
2100
2101 // CHECK-LABEL: @test_i32x4_max(
2102 // CHECK-NEXT:  entry:
2103 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2104 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2105 //
2106 v128_t test_i32x4_max(v128_t a, v128_t b) {
2107   return wasm_i32x4_max(a, b);
2108 }
2109
2110 // CHECK-LABEL: @test_u32x4_max(
2111 // CHECK-NEXT:  entry:
2112 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.umax.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2113 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2114 //
2115 v128_t test_u32x4_max(v128_t a, v128_t b) {
2116   return wasm_u32x4_max(a, b);
2117 }
2118
2119 // CHECK-LABEL: @test_i32x4_dot_i16x8(
2120 // CHECK-NEXT:  entry:
2121 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2122 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
2123 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x i32> @llvm.wasm.dot(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
2124 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2125 //
2126 v128_t test_i32x4_dot_i16x8(v128_t a, v128_t b) {
2127   return wasm_i32x4_dot_i16x8(a, b);
2128 }
2129
2130 // CHECK-LABEL: @test_i64x2_abs(
2131 // CHECK-NEXT:  entry:
2132 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2133 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i64> @llvm.abs.v2i64(<2 x i64> [[TMP0]], i1 false)
2134 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to <4 x i32>
2135 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2136 //
2137 v128_t test_i64x2_abs(v128_t a) {
2138   return wasm_i64x2_abs(a);
2139 }
2140
2141 // CHECK-LABEL: @test_i64x2_neg(
2142 // CHECK-NEXT:  entry:
2143 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2144 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> zeroinitializer, [[TMP0]]
2145 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[SUB_I]] to <4 x i32>
2146 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2147 //
2148 v128_t test_i64x2_neg(v128_t a) {
2149   return wasm_i64x2_neg(a);
2150 }
2151
2152 // CHECK-LABEL: @test_i64x2_all_true(
2153 // CHECK-NEXT:  entry:
2154 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2155 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.alltrue.v2i64(<2 x i64> [[TMP0]])
2156 // CHECK-NEXT:    [[TOBOOL_I:%.*]] = icmp ne i32 [[TMP1]], 0
2157 // CHECK-NEXT:    ret i1 [[TOBOOL_I]]
2158 //
2159 bool test_i64x2_all_true(v128_t a) {
2160   return wasm_i64x2_all_true(a);
2161 }
2162
2163 // CHECK-LABEL: @test_i64x2_bitmask(
2164 // CHECK-NEXT:  entry:
2165 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2166 // CHECK-NEXT:    [[TMP1:%.*]] = tail call i32 @llvm.wasm.bitmask.v2i64(<2 x i64> [[TMP0]])
2167 // CHECK-NEXT:    ret i32 [[TMP1]]
2168 //
2169 uint32_t test_i64x2_bitmask(v128_t a) {
2170   return wasm_i64x2_bitmask(a);
2171 }
2172
2173 // CHECK-LABEL: @test_i64x2_shl(
2174 // CHECK-NEXT:  entry:
2175 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2176 // CHECK-NEXT:    [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
2177 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0
2178 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
2179 // CHECK-NEXT:    [[SHL_I:%.*]] = shl <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
2180 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[SHL_I]] to <4 x i32>
2181 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2182 //
2183 v128_t test_i64x2_shl(v128_t a, uint32_t b) {
2184   return wasm_i64x2_shl(a, b);
2185 }
2186
2187 // CHECK-LABEL: @test_i64x2_shr(
2188 // CHECK-NEXT:  entry:
2189 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2190 // CHECK-NEXT:    [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
2191 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0
2192 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
2193 // CHECK-NEXT:    [[SHR_I:%.*]] = ashr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
2194 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32>
2195 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2196 //
2197 v128_t test_i64x2_shr(v128_t a, uint32_t b) {
2198   return wasm_i64x2_shr(a, b);
2199 }
2200
2201 // CHECK-LABEL: @test_u64x2_shr(
2202 // CHECK-NEXT:  entry:
2203 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2204 // CHECK-NEXT:    [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
2205 // CHECK-NEXT:    [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i64 0
2206 // CHECK-NEXT:    [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
2207 // CHECK-NEXT:    [[SHR_I:%.*]] = lshr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
2208 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32>
2209 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2210 //
2211 v128_t test_u64x2_shr(v128_t a, uint32_t b) {
2212   return wasm_u64x2_shr(a, b);
2213 }
2214
2215 // CHECK-LABEL: @test_i64x2_add(
2216 // CHECK-NEXT:  entry:
2217 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2218 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
2219 // CHECK-NEXT:    [[ADD_I:%.*]] = add <2 x i64> [[TMP1]], [[TMP0]]
2220 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[ADD_I]] to <4 x i32>
2221 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2222 //
2223 v128_t test_i64x2_add(v128_t a, v128_t b) {
2224   return wasm_i64x2_add(a, b);
2225 }
2226
2227 // CHECK-LABEL: @test_i64x2_sub(
2228 // CHECK-NEXT:  entry:
2229 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2230 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
2231 // CHECK-NEXT:    [[SUB_I:%.*]] = sub <2 x i64> [[TMP0]], [[TMP1]]
2232 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[SUB_I]] to <4 x i32>
2233 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2234 //
2235 v128_t test_i64x2_sub(v128_t a, v128_t b) {
2236   return wasm_i64x2_sub(a, b);
2237 }
2238
2239 // CHECK-LABEL: @test_i64x2_mul(
2240 // CHECK-NEXT:  entry:
2241 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2242 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x i64>
2243 // CHECK-NEXT:    [[MUL_I:%.*]] = mul <2 x i64> [[TMP1]], [[TMP0]]
2244 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i64> [[MUL_I]] to <4 x i32>
2245 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2246 //
2247 v128_t test_i64x2_mul(v128_t a, v128_t b) {
2248   return wasm_i64x2_mul(a, b);
2249 }
2250
2251 // CHECK-LABEL: @test_f32x4_abs(
2252 // CHECK-NEXT:  entry:
2253 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2254 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]])
2255 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2256 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2257 //
2258 v128_t test_f32x4_abs(v128_t a) {
2259   return wasm_f32x4_abs(a);
2260 }
2261
2262 // CHECK-LABEL: @test_f32x4_neg(
2263 // CHECK-NEXT:  entry:
2264 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2265 // CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <4 x float> [[TMP0]]
2266 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[FNEG_I]] to <4 x i32>
2267 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2268 //
2269 v128_t test_f32x4_neg(v128_t a) {
2270   return wasm_f32x4_neg(a);
2271 }
2272
2273 // CHECK-LABEL: @test_f32x4_sqrt(
2274 // CHECK-NEXT:  entry:
2275 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2276 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
2277 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2278 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2279 //
2280 v128_t test_f32x4_sqrt(v128_t a) {
2281   return wasm_f32x4_sqrt(a);
2282 }
2283
2284 // CHECK-LABEL: @test_f32x4_ceil(
2285 // CHECK-NEXT:  entry:
2286 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2287 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.ceil.v4f32(<4 x float> [[TMP0]])
2288 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2289 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2290 //
2291 v128_t test_f32x4_ceil(v128_t a) {
2292   return wasm_f32x4_ceil(a);
2293 }
2294
2295 // CHECK-LABEL: @test_f32x4_floor(
2296 // CHECK-NEXT:  entry:
2297 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2298 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.floor.v4f32(<4 x float> [[TMP0]])
2299 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2300 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2301 //
2302 v128_t test_f32x4_floor(v128_t a) {
2303   return wasm_f32x4_floor(a);
2304 }
2305
2306 // CHECK-LABEL: @test_f32x4_trunc(
2307 // CHECK-NEXT:  entry:
2308 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2309 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.trunc.v4f32(<4 x float> [[TMP0]])
2310 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2311 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2312 //
2313 v128_t test_f32x4_trunc(v128_t a) {
2314   return wasm_f32x4_trunc(a);
2315 }
2316
2317 // CHECK-LABEL: @test_f32x4_nearest(
2318 // CHECK-NEXT:  entry:
2319 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2320 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x float> @llvm.nearbyint.v4f32(<4 x float> [[TMP0]])
2321 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[TMP1]] to <4 x i32>
2322 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2323 //
2324 v128_t test_f32x4_nearest(v128_t a) {
2325   return wasm_f32x4_nearest(a);
2326 }
2327
2328 // CHECK-LABEL: @test_f32x4_add(
2329 // CHECK-NEXT:  entry:
2330 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2331 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2332 // CHECK-NEXT:    [[ADD_I:%.*]] = fadd <4 x float> [[TMP0]], [[TMP1]]
2333 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[ADD_I]] to <4 x i32>
2334 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2335 //
2336 v128_t test_f32x4_add(v128_t a, v128_t b) {
2337   return wasm_f32x4_add(a, b);
2338 }
2339
2340 // CHECK-LABEL: @test_f32x4_sub(
2341 // CHECK-NEXT:  entry:
2342 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2343 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2344 // CHECK-NEXT:    [[SUB_I:%.*]] = fsub <4 x float> [[TMP0]], [[TMP1]]
2345 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[SUB_I]] to <4 x i32>
2346 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2347 //
2348 v128_t test_f32x4_sub(v128_t a, v128_t b) {
2349   return wasm_f32x4_sub(a, b);
2350 }
2351
2352 // CHECK-LABEL: @test_f32x4_mul(
2353 // CHECK-NEXT:  entry:
2354 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2355 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2356 // CHECK-NEXT:    [[MUL_I:%.*]] = fmul <4 x float> [[TMP0]], [[TMP1]]
2357 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[MUL_I]] to <4 x i32>
2358 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2359 //
2360 v128_t test_f32x4_mul(v128_t a, v128_t b) {
2361   return wasm_f32x4_mul(a, b);
2362 }
2363
2364 // CHECK-LABEL: @test_f32x4_div(
2365 // CHECK-NEXT:  entry:
2366 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2367 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2368 // CHECK-NEXT:    [[DIV_I:%.*]] = fdiv <4 x float> [[TMP0]], [[TMP1]]
2369 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <4 x float> [[DIV_I]] to <4 x i32>
2370 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2371 //
2372 v128_t test_f32x4_div(v128_t a, v128_t b) {
2373   return wasm_f32x4_div(a, b);
2374 }
2375
2376 // CHECK-LABEL: @test_f32x4_min(
2377 // CHECK-NEXT:  entry:
2378 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2379 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2380 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.minimum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
2381 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32>
2382 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2383 //
2384 v128_t test_f32x4_min(v128_t a, v128_t b) {
2385   return wasm_f32x4_min(a, b);
2386 }
2387
2388 // CHECK-LABEL: @test_f32x4_max(
2389 // CHECK-NEXT:  entry:
2390 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2391 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2392 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.maximum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
2393 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32>
2394 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2395 //
2396 v128_t test_f32x4_max(v128_t a, v128_t b) {
2397   return wasm_f32x4_max(a, b);
2398 }
2399
2400 // CHECK-LABEL: @test_f32x4_pmin(
2401 // CHECK-NEXT:  entry:
2402 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2403 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2404 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmin.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
2405 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32>
2406 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2407 //
2408 v128_t test_f32x4_pmin(v128_t a, v128_t b) {
2409   return wasm_f32x4_pmin(a, b);
2410 }
2411
2412 // CHECK-LABEL: @test_f32x4_pmax(
2413 // CHECK-NEXT:  entry:
2414 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2415 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float>
2416 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <4 x float> @llvm.wasm.pmax.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
2417 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <4 x float> [[TMP2]] to <4 x i32>
2418 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2419 //
2420 v128_t test_f32x4_pmax(v128_t a, v128_t b) {
2421   return wasm_f32x4_pmax(a, b);
2422 }
2423
2424 // CHECK-LABEL: @test_f64x2_abs(
2425 // CHECK-NEXT:  entry:
2426 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2427 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.fabs.v2f64(<2 x double> [[TMP0]])
2428 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2429 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2430 //
2431 v128_t test_f64x2_abs(v128_t a) {
2432   return wasm_f64x2_abs(a);
2433 }
2434
2435 // CHECK-LABEL: @test_f64x2_neg(
2436 // CHECK-NEXT:  entry:
2437 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2438 // CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <2 x double> [[TMP0]]
2439 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[FNEG_I]] to <4 x i32>
2440 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2441 //
2442 v128_t test_f64x2_neg(v128_t a) {
2443   return wasm_f64x2_neg(a);
2444 }
2445
2446 // CHECK-LABEL: @test_f64x2_sqrt(
2447 // CHECK-NEXT:  entry:
2448 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2449 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP0]])
2450 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2451 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2452 //
2453 v128_t test_f64x2_sqrt(v128_t a) {
2454   return wasm_f64x2_sqrt(a);
2455 }
2456
2457 // CHECK-LABEL: @test_f64x2_ceil(
2458 // CHECK-NEXT:  entry:
2459 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2460 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.ceil.v2f64(<2 x double> [[TMP0]])
2461 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2462 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2463 //
2464 v128_t test_f64x2_ceil(v128_t a) {
2465   return wasm_f64x2_ceil(a);
2466 }
2467
2468 // CHECK-LABEL: @test_f64x2_floor(
2469 // CHECK-NEXT:  entry:
2470 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2471 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.floor.v2f64(<2 x double> [[TMP0]])
2472 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2473 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2474 //
2475 v128_t test_f64x2_floor(v128_t a) {
2476   return wasm_f64x2_floor(a);
2477 }
2478
2479 // CHECK-LABEL: @test_f64x2_trunc(
2480 // CHECK-NEXT:  entry:
2481 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2482 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.trunc.v2f64(<2 x double> [[TMP0]])
2483 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2484 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2485 //
2486 v128_t test_f64x2_trunc(v128_t a) {
2487   return wasm_f64x2_trunc(a);
2488 }
2489
2490 // CHECK-LABEL: @test_f64x2_nearest(
2491 // CHECK-NEXT:  entry:
2492 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2493 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x double> @llvm.nearbyint.v2f64(<2 x double> [[TMP0]])
2494 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[TMP1]] to <4 x i32>
2495 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2496 //
2497 v128_t test_f64x2_nearest(v128_t a) {
2498   return wasm_f64x2_nearest(a);
2499 }
2500
2501 // CHECK-LABEL: @test_f64x2_add(
2502 // CHECK-NEXT:  entry:
2503 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2504 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2505 // CHECK-NEXT:    [[ADD_I:%.*]] = fadd <2 x double> [[TMP0]], [[TMP1]]
2506 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[ADD_I]] to <4 x i32>
2507 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2508 //
2509 v128_t test_f64x2_add(v128_t a, v128_t b) {
2510   return wasm_f64x2_add(a, b);
2511 }
2512
2513 // CHECK-LABEL: @test_f64x2_sub(
2514 // CHECK-NEXT:  entry:
2515 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2516 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2517 // CHECK-NEXT:    [[SUB_I:%.*]] = fsub <2 x double> [[TMP0]], [[TMP1]]
2518 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[SUB_I]] to <4 x i32>
2519 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2520 //
2521 v128_t test_f64x2_sub(v128_t a, v128_t b) {
2522   return wasm_f64x2_sub(a, b);
2523 }
2524
2525 // CHECK-LABEL: @test_f64x2_mul(
2526 // CHECK-NEXT:  entry:
2527 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2528 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2529 // CHECK-NEXT:    [[MUL_I:%.*]] = fmul <2 x double> [[TMP0]], [[TMP1]]
2530 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[MUL_I]] to <4 x i32>
2531 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2532 //
2533 v128_t test_f64x2_mul(v128_t a, v128_t b) {
2534   return wasm_f64x2_mul(a, b);
2535 }
2536
2537 // CHECK-LABEL: @test_f64x2_div(
2538 // CHECK-NEXT:  entry:
2539 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2540 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2541 // CHECK-NEXT:    [[DIV_I:%.*]] = fdiv <2 x double> [[TMP0]], [[TMP1]]
2542 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x double> [[DIV_I]] to <4 x i32>
2543 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2544 //
2545 v128_t test_f64x2_div(v128_t a, v128_t b) {
2546   return wasm_f64x2_div(a, b);
2547 }
2548
2549 // CHECK-LABEL: @test_f64x2_min(
2550 // CHECK-NEXT:  entry:
2551 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2552 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2553 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.minimum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
2554 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32>
2555 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2556 //
2557 v128_t test_f64x2_min(v128_t a, v128_t b) {
2558   return wasm_f64x2_min(a, b);
2559 }
2560
2561 // CHECK-LABEL: @test_f64x2_max(
2562 // CHECK-NEXT:  entry:
2563 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2564 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2565 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.maximum.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
2566 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32>
2567 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2568 //
2569 v128_t test_f64x2_max(v128_t a, v128_t b) {
2570   return wasm_f64x2_max(a, b);
2571 }
2572
2573 // CHECK-LABEL: @test_f64x2_pmin(
2574 // CHECK-NEXT:  entry:
2575 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2576 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2577 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmin.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
2578 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32>
2579 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2580 //
2581 v128_t test_f64x2_pmin(v128_t a, v128_t b) {
2582   return wasm_f64x2_pmin(a, b);
2583 }
2584
2585 // CHECK-LABEL: @test_f64x2_pmax(
2586 // CHECK-NEXT:  entry:
2587 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2588 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <2 x double>
2589 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <2 x double> @llvm.wasm.pmax.v2f64(<2 x double> [[TMP0]], <2 x double> [[TMP1]])
2590 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <2 x double> [[TMP2]] to <4 x i32>
2591 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2592 //
2593 v128_t test_f64x2_pmax(v128_t a, v128_t b) {
2594   return wasm_f64x2_pmax(a, b);
2595 }
2596
2597 // CHECK-LABEL: @test_i32x4_trunc_sat_f32x4(
2598 // CHECK-NEXT:  entry:
2599 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2600 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]])
2601 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2602 //
2603 v128_t test_i32x4_trunc_sat_f32x4(v128_t a) {
2604   return wasm_i32x4_trunc_sat_f32x4(a);
2605 }
2606
2607 // CHECK-LABEL: @test_u32x4_trunc_sat_f32x4(
2608 // CHECK-NEXT:  entry:
2609 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2610 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x i32> @llvm.fptoui.sat.v4i32.v4f32(<4 x float> [[TMP0]])
2611 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2612 //
2613 v128_t test_u32x4_trunc_sat_f32x4(v128_t a) {
2614   return wasm_u32x4_trunc_sat_f32x4(a);
2615 }
2616
2617 // CHECK-LABEL: @test_f32x4_convert_i32x4(
2618 // CHECK-NEXT:  entry:
2619 // CHECK-NEXT:    [[CONV_I:%.*]] = sitofp <4 x i32> [[A:%.*]] to <4 x float>
2620 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[CONV_I]] to <4 x i32>
2621 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2622 //
2623 v128_t test_f32x4_convert_i32x4(v128_t a) {
2624   return wasm_f32x4_convert_i32x4(a);
2625 }
2626
2627 // CHECK-LABEL: @test_f32x4_convert_u32x4(
2628 // CHECK-NEXT:  entry:
2629 // CHECK-NEXT:    [[CONV_I:%.*]] = uitofp <4 x i32> [[A:%.*]] to <4 x float>
2630 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x float> [[CONV_I]] to <4 x i32>
2631 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2632 //
2633 v128_t test_f32x4_convert_u32x4(v128_t a) {
2634   return wasm_f32x4_convert_u32x4(a);
2635 }
2636
2637 // CHECK-LABEL: @test_f64x2_convert_low_i32x4(
2638 // CHECK-NEXT:  entry:
2639 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
2640 // CHECK-NEXT:    [[CONV_I:%.*]] = sitofp <2 x i32> [[VECINIT2_I]] to <2 x double>
2641 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[CONV_I]] to <4 x i32>
2642 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2643 //
2644 v128_t test_f64x2_convert_low_i32x4(v128_t a) {
2645   return wasm_f64x2_convert_low_i32x4(a);
2646 }
2647
2648 // CHECK-LABEL: @test_f64x2_convert_low_u32x4(
2649 // CHECK-NEXT:  entry:
2650 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
2651 // CHECK-NEXT:    [[CONV_I:%.*]] = uitofp <2 x i32> [[VECINIT2_I]] to <2 x double>
2652 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x double> [[CONV_I]] to <4 x i32>
2653 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2654 //
2655 v128_t test_f64x2_convert_low_u32x4(v128_t a) {
2656   return wasm_f64x2_convert_low_u32x4(a);
2657 }
2658
2659 // CHECK-LABEL: @test_i32x4_trunc_sat_f64x2_zero(
2660 // CHECK-NEXT:  entry:
2661 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2662 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptosi.sat.v2i32.v2f64(<2 x double> [[TMP0]])
2663 // CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2664 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2665 //
2666 v128_t test_i32x4_trunc_sat_f64x2_zero(v128_t a) {
2667   return wasm_i32x4_trunc_sat_f64x2_zero(a);
2668 }
2669
2670 // CHECK-LABEL: @test_u32x4_trunc_sat_f64x2_zero(
2671 // CHECK-NEXT:  entry:
2672 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2673 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <2 x i32> @llvm.fptoui.sat.v2i32.v2f64(<2 x double> [[TMP0]])
2674 // CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2675 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2676 //
2677 v128_t test_u32x4_trunc_sat_f64x2_zero(v128_t a) {
2678   return wasm_u32x4_trunc_sat_f64x2_zero(a);
2679 }
2680
2681 // CHECK-LABEL: @test_f32x4_demote_f64x2_zero(
2682 // CHECK-NEXT:  entry:
2683 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x double>
2684 // CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2685 // CHECK-NEXT:    [[CONV_I:%.*]] = fptrunc <4 x double> [[SHUFFLE_I]] to <4 x float>
2686 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x float> [[CONV_I]] to <4 x i32>
2687 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2688 //
2689 v128_t test_f32x4_demote_f64x2_zero(v128_t a) {
2690   return wasm_f32x4_demote_f64x2_zero(a);
2691 }
2692
2693 // CHECK-LABEL: @test_f64x2_promote_low_f32x4(
2694 // CHECK-NEXT:  entry:
2695 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <4 x float>
2696 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> undef, <2 x i32> <i32 0, i32 1>
2697 // CHECK-NEXT:    [[CONV_I:%.*]] = fpext <2 x float> [[VECINIT2_I]] to <2 x double>
2698 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <2 x double> [[CONV_I]] to <4 x i32>
2699 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2700 //
2701 v128_t test_f64x2_promote_low_f32x4(v128_t a) {
2702   return wasm_f64x2_promote_low_f32x4(a);
2703 }
2704
2705 // CHECK-LABEL: @test_i8x16_shuffle(
2706 // CHECK-NEXT:  entry:
2707 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2708 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2709 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.shuffle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]], i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0)
2710 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2711 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2712 //
2713 v128_t test_i8x16_shuffle(v128_t a, v128_t b) {
2714   return wasm_i8x16_shuffle(a, b, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
2715 }
2716
2717 // CHECK-LABEL: @test_i16x8_shuffle(
2718 // CHECK-NEXT:  entry:
2719 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2720 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2721 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.shuffle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]], i32 14, i32 15, i32 12, i32 13, i32 10, i32 11, i32 8, i32 9, i32 6, i32 7, i32 4, i32 5, i32 2, i32 3, i32 0, i32 1)
2722 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2723 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2724 //
2725 v128_t test_i16x8_shuffle(v128_t a, v128_t b) {
2726   return wasm_i16x8_shuffle(a, b, 7, 6, 5, 4, 3, 2, 1, 0);
2727 }
2728
2729 // CHECK-LABEL: @test_i32x4_shuffle(
2730 // CHECK-NEXT:  entry:
2731 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2732 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2733 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.shuffle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]], i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3)
2734 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2735 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2736 //
2737 v128_t test_i32x4_shuffle(v128_t a, v128_t b) {
2738   return wasm_i32x4_shuffle(a, b, 3, 2, 1, 0);
2739 }
2740
2741 // CHECK-LABEL: @test_i64x2_shuffle(
2742 // CHECK-NEXT:  entry:
2743 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2744 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2745 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.shuffle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]], i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7)
2746 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2747 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2748 //
2749 v128_t test_i64x2_shuffle(v128_t a, v128_t b) {
2750   return wasm_i64x2_shuffle(a, b, 1, 0);
2751 }
2752
2753 // CHECK-LABEL: @test_i8x16_swizzle(
2754 // CHECK-NEXT:  entry:
2755 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2756 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2757 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.swizzle(<16 x i8> [[TMP0]], <16 x i8> [[TMP1]])
2758 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2759 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2760 //
2761 v128_t test_i8x16_swizzle(v128_t a, v128_t b) {
2762   return wasm_i8x16_swizzle(a, b);
2763 }
2764
2765 // CHECK-LABEL: @test_i8x16_narrow_i16x8(
2766 // CHECK-NEXT:  entry:
2767 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2768 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
2769 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
2770 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2771 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2772 //
2773 v128_t test_i8x16_narrow_i16x8(v128_t a, v128_t b) {
2774   return wasm_i8x16_narrow_i16x8(a, b);
2775 }
2776
2777 // CHECK-LABEL: @test_u8x16_narrow_i16x8(
2778 // CHECK-NEXT:  entry:
2779 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2780 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
2781 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
2782 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
2783 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
2784 //
2785 v128_t test_u8x16_narrow_i16x8(v128_t a, v128_t b) {
2786   return wasm_u8x16_narrow_i16x8(a, b);
2787 }
2788
2789 // CHECK-LABEL: @test_i16x8_narrow_i32x4(
2790 // CHECK-NEXT:  entry:
2791 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2792 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <4 x i32>
2793 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2794 //
2795 v128_t test_i16x8_narrow_i32x4(v128_t a, v128_t b) {
2796   return wasm_i16x8_narrow_i32x4(a, b);
2797 }
2798
2799 // CHECK-LABEL: @test_u16x8_narrow_i32x4(
2800 // CHECK-NEXT:  entry:
2801 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]])
2802 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[TMP0]] to <4 x i32>
2803 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2804 //
2805 v128_t test_u16x8_narrow_i32x4(v128_t a, v128_t b) {
2806   return wasm_u16x8_narrow_i32x4(a, b);
2807 }
2808
2809 // CHECK-LABEL: @test_i16x8_extend_low_i8x16(
2810 // CHECK-NEXT:  entry:
2811 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2812 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2813 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <8 x i8> [[VECINIT14_I]] to <8 x i16>
2814 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
2815 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2816 //
2817 v128_t test_i16x8_extend_low_i8x16(v128_t a) {
2818   return wasm_i16x8_extend_low_i8x16(a);
2819 }
2820
2821 // CHECK-LABEL: @test_i16x8_extend_high_i8x16(
2822 // CHECK-NEXT:  entry:
2823 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2824 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
2825 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <8 x i8> [[VECINIT14_I]] to <8 x i16>
2826 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
2827 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2828 //
2829 v128_t test_i16x8_extend_high_i8x16(v128_t a) {
2830   return wasm_i16x8_extend_high_i8x16(a);
2831 }
2832
2833 // CHECK-LABEL: @test_u16x8_extend_low_u8x16(
2834 // CHECK-NEXT:  entry:
2835 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2836 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2837 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <8 x i8> [[VECINIT14_I]] to <8 x i16>
2838 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
2839 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2840 //
2841 v128_t test_u16x8_extend_low_u8x16(v128_t a) {
2842   return wasm_u16x8_extend_low_u8x16(a);
2843 }
2844
2845 // CHECK-LABEL: @test_u16x8_extend_high_u8x16(
2846 // CHECK-NEXT:  entry:
2847 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2848 // CHECK-NEXT:    [[VECINIT14_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
2849 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <8 x i8> [[VECINIT14_I]] to <8 x i16>
2850 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32>
2851 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2852 //
2853 v128_t test_u16x8_extend_high_u8x16(v128_t a) {
2854   return wasm_u16x8_extend_high_u8x16(a);
2855 }
2856
2857 // CHECK-LABEL: @test_i32x4_extend_low_i16x8(
2858 // CHECK-NEXT:  entry:
2859 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2860 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2861 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <4 x i16> [[VECINIT6_I]] to <4 x i32>
2862 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
2863 //
2864 v128_t test_i32x4_extend_low_i16x8(v128_t a) {
2865   return wasm_i32x4_extend_low_i16x8(a);
2866 }
2867
2868 // CHECK-LABEL: @test_i32x4_extend_high_i16x8(
2869 // CHECK-NEXT:  entry:
2870 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2871 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
2872 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <4 x i16> [[VECINIT6_I]] to <4 x i32>
2873 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
2874 //
2875 v128_t test_i32x4_extend_high_i16x8(v128_t a) {
2876   return wasm_i32x4_extend_high_i16x8(a);
2877 }
2878
2879 // CHECK-LABEL: @test_u32x4_extend_low_u16x8(
2880 // CHECK-NEXT:  entry:
2881 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2882 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2883 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <4 x i16> [[VECINIT6_I]] to <4 x i32>
2884 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
2885 //
2886 v128_t test_u32x4_extend_low_u16x8(v128_t a) {
2887   return wasm_u32x4_extend_low_u16x8(a);
2888 }
2889
2890 // CHECK-LABEL: @test_u32x4_extend_high_u16x8(
2891 // CHECK-NEXT:  entry:
2892 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2893 // CHECK-NEXT:    [[VECINIT6_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
2894 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <4 x i16> [[VECINIT6_I]] to <4 x i32>
2895 // CHECK-NEXT:    ret <4 x i32> [[CONV_I]]
2896 //
2897 v128_t test_u32x4_extend_high_u16x8(v128_t a) {
2898   return wasm_u32x4_extend_high_u16x8(a);
2899 }
2900
2901 // CHECK-LABEL: @test_i64x2_extend_low_i32x4(
2902 // CHECK-NEXT:  entry:
2903 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
2904 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <2 x i32> [[VECINIT2_I]] to <2 x i64>
2905 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
2906 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2907 //
2908 v128_t test_i64x2_extend_low_i32x4(v128_t a) {
2909   return wasm_i64x2_extend_low_i32x4(a);
2910 }
2911
2912 // CHECK-LABEL: @test_i64x2_extend_high_i32x4(
2913 // CHECK-NEXT:  entry:
2914 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
2915 // CHECK-NEXT:    [[CONV_I:%.*]] = sext <2 x i32> [[VECINIT2_I]] to <2 x i64>
2916 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
2917 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2918 //
2919 v128_t test_i64x2_extend_high_i32x4(v128_t a) {
2920   return wasm_i64x2_extend_high_i32x4(a);
2921 }
2922
2923 // CHECK-LABEL: @test_u64x2_extend_low_u32x4(
2924 // CHECK-NEXT:  entry:
2925 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
2926 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <2 x i32> [[VECINIT2_I]] to <2 x i64>
2927 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
2928 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2929 //
2930 v128_t test_u64x2_extend_low_u32x4(v128_t a) {
2931   return wasm_u64x2_extend_low_u32x4(a);
2932 }
2933
2934 // CHECK-LABEL: @test_u64x2_extend_high_u32x4(
2935 // CHECK-NEXT:  entry:
2936 // CHECK-NEXT:    [[VECINIT2_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
2937 // CHECK-NEXT:    [[CONV_I:%.*]] = zext <2 x i32> [[VECINIT2_I]] to <2 x i64>
2938 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32>
2939 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
2940 //
2941 v128_t test_u64x2_extend_high_u32x4(v128_t a) {
2942   return wasm_u64x2_extend_high_u32x4(a);
2943 }
2944
2945 // CHECK-LABEL: @test_i16x8_extadd_pairwise_i8x16(
2946 // CHECK-NEXT:  entry:
2947 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2948 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(<16 x i8> [[TMP0]])
2949 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32>
2950 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2951 //
2952 v128_t test_i16x8_extadd_pairwise_i8x16(v128_t a) {
2953   return wasm_i16x8_extadd_pairwise_i8x16(a);
2954 }
2955
2956 // CHECK-LABEL: @test_u16x8_extadd_pairwise_u8x16(
2957 // CHECK-NEXT:  entry:
2958 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2959 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(<16 x i8> [[TMP0]])
2960 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[TMP1]] to <4 x i32>
2961 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2962 //
2963 v128_t test_u16x8_extadd_pairwise_u8x16(v128_t a) {
2964   return wasm_u16x8_extadd_pairwise_u8x16(a);
2965 }
2966
2967 // CHECK-LABEL: @test_i32x4_extadd_pairwise_i16x8(
2968 // CHECK-NEXT:  entry:
2969 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2970 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(<8 x i16> [[TMP0]])
2971 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2972 //
2973 v128_t test_i32x4_extadd_pairwise_i16x8(v128_t a) {
2974   return wasm_i32x4_extadd_pairwise_i16x8(a);
2975 }
2976
2977 // CHECK-LABEL: @test_u32x4_extadd_pairwise_u16x8(
2978 // CHECK-NEXT:  entry:
2979 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
2980 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32(<8 x i16> [[TMP0]])
2981 // CHECK-NEXT:    ret <4 x i32> [[TMP1]]
2982 //
2983 v128_t test_u32x4_extadd_pairwise_u16x8(v128_t a) {
2984   return wasm_u32x4_extadd_pairwise_u16x8(a);
2985 }
2986
2987 // CHECK-LABEL: @test_i16x8_extmul_low_i8x16(
2988 // CHECK-NEXT:  entry:
2989 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
2990 // CHECK-NEXT:    [[VECINIT14_I_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2991 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <8 x i8> [[VECINIT14_I_I]] to <8 x i16>
2992 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
2993 // CHECK-NEXT:    [[VECINIT14_I2_I:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2994 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <8 x i8> [[VECINIT14_I2_I]] to <8 x i16>
2995 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <8 x i16> [[CONV_I3_I]], [[CONV_I_I]]
2996 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[MUL_I]] to <4 x i32>
2997 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
2998 //
2999 v128_t test_i16x8_extmul_low_i8x16(v128_t a, v128_t b) {
3000   return wasm_i16x8_extmul_low_i8x16(a, b);
3001 }
3002
3003 // CHECK-LABEL: @test_i16x8_extmul_high_i8x16(
3004 // CHECK-NEXT:  entry:
3005 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
3006 // CHECK-NEXT:    [[VECINIT14_I_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
3007 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <8 x i8> [[VECINIT14_I_I]] to <8 x i16>
3008 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
3009 // CHECK-NEXT:    [[VECINIT14_I2_I:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
3010 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <8 x i8> [[VECINIT14_I2_I]] to <8 x i16>
3011 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <8 x i16> [[CONV_I3_I]], [[CONV_I_I]]
3012 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[MUL_I]] to <4 x i32>
3013 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
3014 //
3015 v128_t test_i16x8_extmul_high_i8x16(v128_t a, v128_t b) {
3016   return wasm_i16x8_extmul_high_i8x16(a, b);
3017 }
3018
3019 // CHECK-LABEL: @test_u16x8_extmul_low_u8x16(
3020 // CHECK-NEXT:  entry:
3021 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
3022 // CHECK-NEXT:    [[VECINIT14_I_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
3023 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <8 x i8> [[VECINIT14_I_I]] to <8 x i16>
3024 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
3025 // CHECK-NEXT:    [[VECINIT14_I2_I:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
3026 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <8 x i8> [[VECINIT14_I2_I]] to <8 x i16>
3027 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <8 x i16> [[CONV_I3_I]], [[CONV_I_I]]
3028 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[MUL_I]] to <4 x i32>
3029 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
3030 //
3031 v128_t test_u16x8_extmul_low_u8x16(v128_t a, v128_t b) {
3032   return wasm_u16x8_extmul_low_u8x16(a, b);
3033 }
3034
3035 // CHECK-LABEL: @test_u16x8_extmul_high_u8x16(
3036 // CHECK-NEXT:  entry:
3037 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
3038 // CHECK-NEXT:    [[VECINIT14_I_I:%.*]] = shufflevector <16 x i8> [[TMP0]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
3039 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <8 x i8> [[VECINIT14_I_I]] to <8 x i16>
3040 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <16 x i8>
3041 // CHECK-NEXT:    [[VECINIT14_I2_I:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
3042 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <8 x i8> [[VECINIT14_I2_I]] to <8 x i16>
3043 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <8 x i16> [[CONV_I3_I]], [[CONV_I_I]]
3044 // CHECK-NEXT:    [[TMP2:%.*]] = bitcast <8 x i16> [[MUL_I]] to <4 x i32>
3045 // CHECK-NEXT:    ret <4 x i32> [[TMP2]]
3046 //
3047 v128_t test_u16x8_extmul_high_u8x16(v128_t a, v128_t b) {
3048   return wasm_u16x8_extmul_high_u8x16(a, b);
3049 }
3050
3051 // CHECK-LABEL: @test_i32x4_extmul_low_i16x8(
3052 // CHECK-NEXT:  entry:
3053 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
3054 // CHECK-NEXT:    [[VECINIT6_I_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
3055 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <4 x i16> [[VECINIT6_I_I]] to <4 x i32>
3056 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
3057 // CHECK-NEXT:    [[VECINIT6_I2_I:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
3058 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <4 x i16> [[VECINIT6_I2_I]] to <4 x i32>
3059 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <4 x i32> [[CONV_I3_I]], [[CONV_I_I]]
3060 // CHECK-NEXT:    ret <4 x i32> [[MUL_I]]
3061 //
3062 v128_t test_i32x4_extmul_low_i16x8(v128_t a, v128_t b) {
3063   return wasm_i32x4_extmul_low_i16x8(a, b);
3064 }
3065
3066 // CHECK-LABEL: @test_i32x4_extmul_high_i16x8(
3067 // CHECK-NEXT:  entry:
3068 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
3069 // CHECK-NEXT:    [[VECINIT6_I_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
3070 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <4 x i16> [[VECINIT6_I_I]] to <4 x i32>
3071 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
3072 // CHECK-NEXT:    [[VECINIT6_I2_I:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
3073 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <4 x i16> [[VECINIT6_I2_I]] to <4 x i32>
3074 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <4 x i32> [[CONV_I3_I]], [[CONV_I_I]]
3075 // CHECK-NEXT:    ret <4 x i32> [[MUL_I]]
3076 //
3077 v128_t test_i32x4_extmul_high_i16x8(v128_t a, v128_t b) {
3078   return wasm_i32x4_extmul_high_i16x8(a, b);
3079 }
3080
3081 // CHECK-LABEL: @test_u32x4_extmul_low_u16x8(
3082 // CHECK-NEXT:  entry:
3083 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
3084 // CHECK-NEXT:    [[VECINIT6_I_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
3085 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <4 x i16> [[VECINIT6_I_I]] to <4 x i32>
3086 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
3087 // CHECK-NEXT:    [[VECINIT6_I2_I:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
3088 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <4 x i16> [[VECINIT6_I2_I]] to <4 x i32>
3089 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <4 x i32> [[CONV_I3_I]], [[CONV_I_I]]
3090 // CHECK-NEXT:    ret <4 x i32> [[MUL_I]]
3091 //
3092 v128_t test_u32x4_extmul_low_u16x8(v128_t a, v128_t b) {
3093   return wasm_u32x4_extmul_low_u16x8(a, b);
3094 }
3095
3096 // CHECK-LABEL: @test_u32x4_extmul_high_u16x8(
3097 // CHECK-NEXT:  entry:
3098 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
3099 // CHECK-NEXT:    [[VECINIT6_I_I:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
3100 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <4 x i16> [[VECINIT6_I_I]] to <4 x i32>
3101 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
3102 // CHECK-NEXT:    [[VECINIT6_I2_I:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
3103 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <4 x i16> [[VECINIT6_I2_I]] to <4 x i32>
3104 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <4 x i32> [[CONV_I3_I]], [[CONV_I_I]]
3105 // CHECK-NEXT:    ret <4 x i32> [[MUL_I]]
3106 //
3107 v128_t test_u32x4_extmul_high_u16x8(v128_t a, v128_t b) {
3108   return wasm_u32x4_extmul_high_u16x8(a, b);
3109 }
3110
3111 // CHECK-LABEL: @test_i64x2_extmul_low_i32x4(
3112 // CHECK-NEXT:  entry:
3113 // CHECK-NEXT:    [[VECINIT2_I_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
3114 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <2 x i32> [[VECINIT2_I_I]] to <2 x i64>
3115 // CHECK-NEXT:    [[VECINIT2_I2_I:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
3116 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <2 x i32> [[VECINIT2_I2_I]] to <2 x i64>
3117 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <2 x i64> [[CONV_I3_I]], [[CONV_I_I]]
3118 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[MUL_I]] to <4 x i32>
3119 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
3120 //
3121 v128_t test_i64x2_extmul_low_i32x4(v128_t a, v128_t b) {
3122   return wasm_i64x2_extmul_low_i32x4(a, b);
3123 }
3124
3125 // CHECK-LABEL: @test_i64x2_extmul_high_i32x4(
3126 // CHECK-NEXT:  entry:
3127 // CHECK-NEXT:    [[VECINIT2_I_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
3128 // CHECK-NEXT:    [[CONV_I_I:%.*]] = sext <2 x i32> [[VECINIT2_I_I]] to <2 x i64>
3129 // CHECK-NEXT:    [[VECINIT2_I2_I:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
3130 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = sext <2 x i32> [[VECINIT2_I2_I]] to <2 x i64>
3131 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nsw <2 x i64> [[CONV_I3_I]], [[CONV_I_I]]
3132 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[MUL_I]] to <4 x i32>
3133 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
3134 //
3135 v128_t test_i64x2_extmul_high_i32x4(v128_t a, v128_t b) {
3136   return wasm_i64x2_extmul_high_i32x4(a, b);
3137 }
3138
3139 // CHECK-LABEL: @test_u64x2_extmul_low_u32x4(
3140 // CHECK-NEXT:  entry:
3141 // CHECK-NEXT:    [[VECINIT2_I_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
3142 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <2 x i32> [[VECINIT2_I_I]] to <2 x i64>
3143 // CHECK-NEXT:    [[VECINIT2_I2_I:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1>
3144 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <2 x i32> [[VECINIT2_I2_I]] to <2 x i64>
3145 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <2 x i64> [[CONV_I3_I]], [[CONV_I_I]]
3146 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[MUL_I]] to <4 x i32>
3147 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
3148 //
3149 v128_t test_u64x2_extmul_low_u32x4(v128_t a, v128_t b) {
3150   return wasm_u64x2_extmul_low_u32x4(a, b);
3151 }
3152
3153 // CHECK-LABEL: @test_u64x2_extmul_high_u32x4(
3154 // CHECK-NEXT:  entry:
3155 // CHECK-NEXT:    [[VECINIT2_I_I:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
3156 // CHECK-NEXT:    [[CONV_I_I:%.*]] = zext <2 x i32> [[VECINIT2_I_I]] to <2 x i64>
3157 // CHECK-NEXT:    [[VECINIT2_I2_I:%.*]] = shufflevector <4 x i32> [[B:%.*]], <4 x i32> undef, <2 x i32> <i32 2, i32 3>
3158 // CHECK-NEXT:    [[CONV_I3_I:%.*]] = zext <2 x i32> [[VECINIT2_I2_I]] to <2 x i64>
3159 // CHECK-NEXT:    [[MUL_I:%.*]] = mul nuw <2 x i64> [[CONV_I3_I]], [[CONV_I_I]]
3160 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <2 x i64> [[MUL_I]] to <4 x i32>
3161 // CHECK-NEXT:    ret <4 x i32> [[TMP0]]
3162 //
3163 v128_t test_u64x2_extmul_high_u32x4(v128_t a, v128_t b) {
3164   return wasm_u64x2_extmul_high_u32x4(a, b);
3165 }
3166
3167 // CHECK-LABEL: @test_i16x8_q15mulr_sat(
3168 // CHECK-NEXT:  entry:
3169 // CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <8 x i16>
3170 // CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[B:%.*]] to <8 x i16>
3171 // CHECK-NEXT:    [[TMP2:%.*]] = tail call <8 x i16> @llvm.wasm.q15mulr.sat.signed(<8 x i16> [[TMP0]], <8 x i16> [[TMP1]])
3172 // CHECK-NEXT:    [[TMP3:%.*]] = bitcast <8 x i16> [[TMP2]] to <4 x i32>
3173 // CHECK-NEXT:    ret <4 x i32> [[TMP3]]
3174 //
3175 v128_t test_i16x8_q15mulr_sat(v128_t a, v128_t b) {
3176   return wasm_i16x8_q15mulr_sat(a, b);
3177 }