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1 //===- SplitKit.h - Toolkit for splitting live ranges -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the SplitAnalysis class as well as mutator functions for
10 // live range splitting.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
15 #define LLVM_LIB_CODEGEN_SPLITKIT_H
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/DenseSet.h"
21 #include "llvm/ADT/IntervalMap.h"
22 #include "llvm/ADT/PointerIntPair.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/CodeGen/LiveIntervalCalc.h"
26 #include "llvm/CodeGen/LiveIntervals.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineFunction.h"
29 #include "llvm/CodeGen/SlotIndexes.h"
30 #include "llvm/Support/Compiler.h"
31 #include <utility>
33 namespace llvm {
35 class AAResults;
36 class LiveInterval;
37 class LiveRange;
38 class LiveIntervals;
39 class LiveRangeEdit;
40 class MachineBlockFrequencyInfo;
41 class MachineDominatorTree;
42 class MachineLoopInfo;
43 class MachineRegisterInfo;
44 class TargetInstrInfo;
45 class TargetRegisterInfo;
46 class VirtRegMap;
47 class VirtRegAuxInfo;
49 /// Determines the latest safe point in a block in which we can insert a split,
50 /// spill or other instruction related with CurLI.
51 class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
52 private:
53 const LiveIntervals &LIS;
55 /// Last legal insert point in each basic block in the current function.
56 /// The first entry is the first terminator, the second entry is the
57 /// last valid point to insert a split or spill for a variable that is
58 /// live into a landing pad or inlineasm_br successor.
59 SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint;
61 SlotIndex computeLastInsertPoint(const LiveInterval &CurLI,
62 const MachineBasicBlock &MBB);
64 public:
65 InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
67 /// Return the base index of the last valid insert point for \pCurLI in \pMBB.
68 SlotIndex getLastInsertPoint(const LiveInterval &CurLI,
69 const MachineBasicBlock &MBB) {
70 unsigned Num = MBB.getNumber();
71 // Inline the common simple case.
72 if (LastInsertPoint[Num].first.isValid() &&
73 !LastInsertPoint[Num].second.isValid())
74 return LastInsertPoint[Num].first;
75 return computeLastInsertPoint(CurLI, MBB);
78 /// Returns the last insert point as an iterator for \pCurLI in \pMBB.
79 MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI,
80 MachineBasicBlock &MBB);
82 /// Return the base index of the first insert point in \pMBB.
83 SlotIndex getFirstInsertPoint(MachineBasicBlock &MBB) {
84 SlotIndex Res = LIS.getMBBStartIdx(&MBB);
85 if (!MBB.empty()) {
86 MachineBasicBlock::iterator MII = MBB.SkipPHIsLabelsAndDebug(MBB.begin());
87 if (MII != MBB.end())
88 Res = LIS.getInstructionIndex(*MII);
90 return Res;
95 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
96 /// opportunities.
97 class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
98 public:
99 const MachineFunction &MF;
100 const VirtRegMap &VRM;
101 const LiveIntervals &LIS;
102 const MachineLoopInfo &Loops;
103 const TargetInstrInfo &TII;
105 /// Additional information about basic blocks where the current variable is
106 /// live. Such a block will look like one of these templates:
108 /// 1. | o---x | Internal to block. Variable is only live in this block.
109 /// 2. |---x | Live-in, kill.
110 /// 3. | o---| Def, live-out.
111 /// 4. |---x o---| Live-in, kill, def, live-out. Counted by NumGapBlocks.
112 /// 5. |---o---o---| Live-through with uses or defs.
113 /// 6. |-----------| Live-through without uses. Counted by NumThroughBlocks.
115 /// Two BlockInfo entries are created for template 4. One for the live-in
116 /// segment, and one for the live-out segment. These entries look as if the
117 /// block were split in the middle where the live range isn't live.
119 /// Live-through blocks without any uses don't get BlockInfo entries. They
120 /// are simply listed in ThroughBlocks instead.
122 struct BlockInfo {
123 MachineBasicBlock *MBB;
124 SlotIndex FirstInstr; ///< First instr accessing current reg.
125 SlotIndex LastInstr; ///< Last instr accessing current reg.
126 SlotIndex FirstDef; ///< First non-phi valno->def, or SlotIndex().
127 bool LiveIn; ///< Current reg is live in.
128 bool LiveOut; ///< Current reg is live out.
130 /// isOneInstr - Returns true when this BlockInfo describes a single
131 /// instruction.
132 bool isOneInstr() const {
133 return SlotIndex::isSameInstr(FirstInstr, LastInstr);
136 void print(raw_ostream &OS) const;
137 void dump() const;
140 private:
141 // Current live interval.
142 const LiveInterval *CurLI = nullptr;
144 /// Insert Point Analysis.
145 InsertPointAnalysis IPA;
147 // Sorted slot indexes of using instructions.
148 SmallVector<SlotIndex, 8> UseSlots;
150 /// UseBlocks - Blocks where CurLI has uses.
151 SmallVector<BlockInfo, 8> UseBlocks;
153 /// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where
154 /// the live range has a gap.
155 unsigned NumGapBlocks;
157 /// ThroughBlocks - Block numbers where CurLI is live through without uses.
158 BitVector ThroughBlocks;
160 /// NumThroughBlocks - Number of live-through blocks.
161 unsigned NumThroughBlocks;
163 // Sumarize statistics by counting instructions using CurLI.
164 void analyzeUses();
166 /// calcLiveBlockInfo - Compute per-block information about CurLI.
167 void calcLiveBlockInfo();
169 public:
170 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
171 const MachineLoopInfo &mli);
173 /// analyze - set CurLI to the specified interval, and analyze how it may be
174 /// split.
175 void analyze(const LiveInterval *li);
177 /// clear - clear all data structures so SplitAnalysis is ready to analyze a
178 /// new interval.
179 void clear();
181 /// getParent - Return the last analyzed interval.
182 const LiveInterval &getParent() const { return *CurLI; }
184 /// isOriginalEndpoint - Return true if the original live range was killed or
185 /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
186 /// and 'use' for an early-clobber def.
187 /// This can be used to recognize code inserted by earlier live range
188 /// splitting.
189 bool isOriginalEndpoint(SlotIndex Idx) const;
191 /// getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
192 /// This include both use and def operands, at most one entry per instruction.
193 ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; }
195 /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
196 /// where CurLI has uses.
197 ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; }
199 /// getNumThroughBlocks - Return the number of through blocks.
200 unsigned getNumThroughBlocks() const { return NumThroughBlocks; }
202 /// isThroughBlock - Return true if CurLI is live through MBB without uses.
203 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
205 /// getThroughBlocks - Return the set of through blocks.
206 const BitVector &getThroughBlocks() const { return ThroughBlocks; }
208 /// getNumLiveBlocks - Return the number of blocks where CurLI is live.
209 unsigned getNumLiveBlocks() const {
210 return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
213 /// countLiveBlocks - Return the number of blocks where li is live. This is
214 /// guaranteed to return the same number as getNumLiveBlocks() after calling
215 /// analyze(li).
216 unsigned countLiveBlocks(const LiveInterval *li) const;
218 using BlockPtrSet = SmallPtrSet<const MachineBasicBlock *, 16>;
220 /// shouldSplitSingleBlock - Returns true if it would help to create a local
221 /// live range for the instructions in BI. There is normally no benefit to
222 /// creating a live range for a single instruction, but it does enable
223 /// register class inflation if the instruction has a restricted register
224 /// class.
226 /// @param BI The block to be isolated.
227 /// @param SingleInstrs True when single instructions should be isolated.
228 bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const;
230 SlotIndex getLastSplitPoint(unsigned Num) {
231 return IPA.getLastInsertPoint(*CurLI, *MF.getBlockNumbered(Num));
234 SlotIndex getLastSplitPoint(MachineBasicBlock *BB) {
235 return IPA.getLastInsertPoint(*CurLI, *BB);
238 MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) {
239 return IPA.getLastInsertPointIter(*CurLI, *BB);
242 SlotIndex getFirstSplitPoint(unsigned Num) {
243 return IPA.getFirstInsertPoint(*MF.getBlockNumbered(Num));
247 /// SplitEditor - Edit machine code and LiveIntervals for live range
248 /// splitting.
250 /// - Create a SplitEditor from a SplitAnalysis.
251 /// - Start a new live interval with openIntv.
252 /// - Mark the places where the new interval is entered using enterIntv*
253 /// - Mark the ranges where the new interval is used with useIntv*
254 /// - Mark the places where the interval is exited with exitIntv*.
255 /// - Finish the current interval with closeIntv and repeat from 2.
256 /// - Rewrite instructions with finish().
258 class LLVM_LIBRARY_VISIBILITY SplitEditor {
259 SplitAnalysis &SA;
260 LiveIntervals &LIS;
261 VirtRegMap &VRM;
262 MachineRegisterInfo &MRI;
263 MachineDominatorTree &MDT;
264 const TargetInstrInfo &TII;
265 const TargetRegisterInfo &TRI;
266 const MachineBlockFrequencyInfo &MBFI;
267 VirtRegAuxInfo &VRAI;
269 public:
270 /// ComplementSpillMode - Select how the complement live range should be
271 /// created. SplitEditor automatically creates interval 0 to contain
272 /// anything that isn't added to another interval. This complement interval
273 /// can get quite complicated, and it can sometimes be an advantage to allow
274 /// it to overlap the other intervals. If it is going to spill anyway, no
275 /// registers are wasted by keeping a value in two places at the same time.
276 enum ComplementSpillMode {
277 /// SM_Partition(Default) - Try to create the complement interval so it
278 /// doesn't overlap any other intervals, and the original interval is
279 /// partitioned. This may require a large number of back copies and extra
280 /// PHI-defs. Only segments marked with overlapIntv will be overlapping.
281 SM_Partition,
283 /// SM_Size - Overlap intervals to minimize the number of inserted COPY
284 /// instructions. Copies to the complement interval are hoisted to their
285 /// common dominator, so only one COPY is required per value in the
286 /// complement interval. This also means that no extra PHI-defs need to be
287 /// inserted in the complement interval.
288 SM_Size,
290 /// SM_Speed - Overlap intervals to minimize the expected execution
291 /// frequency of the inserted copies. This is very similar to SM_Size, but
292 /// the complement interval may get some extra PHI-defs.
293 SM_Speed
296 private:
297 /// Edit - The current parent register and new intervals created.
298 LiveRangeEdit *Edit = nullptr;
300 /// Index into Edit of the currently open interval.
301 /// The index 0 is used for the complement, so the first interval started by
302 /// openIntv will be 1.
303 unsigned OpenIdx = 0;
305 /// The current spill mode, selected by reset().
306 ComplementSpillMode SpillMode = SM_Partition;
308 using RegAssignMap = IntervalMap<SlotIndex, unsigned>;
310 /// Allocator for the interval map. This will eventually be shared with
311 /// SlotIndexes and LiveIntervals.
312 RegAssignMap::Allocator Allocator;
314 /// RegAssign - Map of the assigned register indexes.
315 /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
316 /// Idx.
317 RegAssignMap RegAssign;
319 using ValueForcePair = PointerIntPair<VNInfo *, 1>;
320 using ValueMap = DenseMap<std::pair<unsigned, unsigned>, ValueForcePair>;
322 /// Values - keep track of the mapping from parent values to values in the new
323 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
325 /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
326 /// 2. (Null, false) - the value is mapped to multiple values in
327 /// Edit.get(RegIdx). Each value is represented by a minimal live range at
328 /// its def. The full live range can be inferred exactly from the range
329 /// of RegIdx in RegAssign.
330 /// 3. (Null, true). As above, but the ranges in RegAssign are too large, and
331 /// the live range must be recomputed using ::extend().
332 /// 4. (VNI, false) The value is mapped to a single new value.
333 /// The new value has no live ranges anywhere.
334 ValueMap Values;
336 /// LICalc - Cache for computing live ranges and SSA update. Each instance
337 /// can only handle non-overlapping live ranges, so use a separate
338 /// LiveIntervalCalc instance for the complement interval when in spill mode.
339 LiveIntervalCalc LICalc[2];
341 /// getLICalc - Return the LICalc to use for RegIdx. In spill mode, the
342 /// complement interval can overlap the other intervals, so it gets its own
343 /// LICalc instance. When not in spill mode, all intervals can share one.
344 LiveIntervalCalc &getLICalc(unsigned RegIdx) {
345 return LICalc[SpillMode != SM_Partition && RegIdx != 0];
348 /// Add a segment to the interval LI for the value number VNI. If LI has
349 /// subranges, corresponding segments will be added to them as well, but
350 /// with newly created value numbers. If Original is true, dead def will
351 /// only be added a subrange of LI if the corresponding subrange of the
352 /// original interval has a def at this index. Otherwise, all subranges
353 /// of LI will be updated.
354 void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original);
356 /// defValue - define a value in RegIdx from ParentVNI at Idx.
357 /// Idx does not have to be ParentVNI->def, but it must be contained within
358 /// ParentVNI's live range in ParentLI. The new value is added to the value
359 /// map. The value being defined may either come from rematerialization
360 /// (or an inserted copy), or it may be coming from the original interval.
361 /// The parameter Original should be true in the latter case, otherwise
362 /// it should be false.
363 /// Return the new LI value.
364 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx,
365 bool Original);
367 /// forceRecompute - Force the live range of ParentVNI in RegIdx to be
368 /// recomputed by LiveRangeCalc::extend regardless of the number of defs.
369 /// This is used for values whose live range doesn't match RegAssign exactly.
370 /// They could have rematerialized, or back-copies may have been moved.
371 void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI);
373 /// Calls forceRecompute() on any affected regidx and on ParentVNI
374 /// predecessors in case of a phi definition.
375 void forceRecomputeVNI(const VNInfo &ParentVNI);
377 /// defFromParent - Define Reg from ParentVNI at UseIdx using either
378 /// rematerialization or a COPY from parent. Return the new value.
379 VNInfo *defFromParent(unsigned RegIdx, const VNInfo *ParentVNI,
380 SlotIndex UseIdx, MachineBasicBlock &MBB,
381 MachineBasicBlock::iterator I);
383 /// removeBackCopies - Remove the copy instructions that defines the values
384 /// in the vector in the complement interval.
385 void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
387 /// getShallowDominator - Returns the least busy dominator of MBB that is
388 /// also dominated by DefMBB. Busy is measured by loop depth.
389 MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
390 MachineBasicBlock *DefMBB);
392 /// Find out all the backCopies dominated by others.
393 void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
394 SmallVectorImpl<VNInfo *> &BackCopies);
396 /// Hoist back-copies to the complement interval. It tries to hoist all
397 /// the back-copies to one BB if it is beneficial, or else simply remove
398 /// redundant backcopies dominated by others.
399 void hoistCopies();
401 /// transferValues - Transfer values to the new ranges.
402 /// Return true if any ranges were skipped.
403 bool transferValues();
405 /// Live range @p LR corresponding to the lane Mask @p LM has a live
406 /// PHI def at the beginning of block @p B. Extend the range @p LR of
407 /// all predecessor values that reach this def. If @p LR is a subrange,
408 /// the array @p Undefs is the set of all locations where it is undefined
409 /// via <def,read-undef> in other subranges for the same register.
410 void extendPHIRange(MachineBasicBlock &B, LiveIntervalCalc &LIC,
411 LiveRange &LR, LaneBitmask LM,
412 ArrayRef<SlotIndex> Undefs);
414 /// extendPHIKillRanges - Extend the ranges of all values killed by original
415 /// parent PHIDefs.
416 void extendPHIKillRanges();
418 /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
419 void rewriteAssigned(bool ExtendRanges);
421 /// deleteRematVictims - Delete defs that are dead after rematerializing.
422 void deleteRematVictims();
424 /// Add a copy instruction copying \p FromReg to \p ToReg before
425 /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
426 /// necessary to construct a sequence of copies to cover it exactly.
427 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
428 MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
429 bool Late, unsigned RegIdx);
431 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
432 MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore,
433 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def);
435 public:
436 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
437 /// Newly created intervals will be appended to newIntervals.
438 SplitEditor(SplitAnalysis &SA, LiveIntervals &LIS, VirtRegMap &VRM,
439 MachineDominatorTree &MDT, MachineBlockFrequencyInfo &MBFI,
440 VirtRegAuxInfo &VRAI);
442 /// reset - Prepare for a new split.
443 void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
445 /// Create a new virtual register and live interval.
446 /// Return the interval index, starting from 1. Interval index 0 is the
447 /// implicit complement interval.
448 unsigned openIntv();
450 /// currentIntv - Return the current interval index.
451 unsigned currentIntv() const { return OpenIdx; }
453 /// selectIntv - Select a previously opened interval index.
454 void selectIntv(unsigned Idx);
456 /// enterIntvBefore - Enter the open interval before the instruction at Idx.
457 /// If the parent interval is not live before Idx, a COPY is not inserted.
458 /// Return the beginning of the new live range.
459 SlotIndex enterIntvBefore(SlotIndex Idx);
461 /// enterIntvAfter - Enter the open interval after the instruction at Idx.
462 /// Return the beginning of the new live range.
463 SlotIndex enterIntvAfter(SlotIndex Idx);
465 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
466 /// Use the open interval from the inserted copy to the MBB end.
467 /// Return the beginning of the new live range.
468 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
470 /// useIntv - indicate that all instructions in MBB should use OpenLI.
471 void useIntv(const MachineBasicBlock &MBB);
473 /// useIntv - indicate that all instructions in range should use OpenLI.
474 void useIntv(SlotIndex Start, SlotIndex End);
476 /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
477 /// Return the end of the live range.
478 SlotIndex leaveIntvAfter(SlotIndex Idx);
480 /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
481 /// Return the end of the live range.
482 SlotIndex leaveIntvBefore(SlotIndex Idx);
484 /// leaveIntvAtTop - Leave the interval at the top of MBB.
485 /// Add liveness from the MBB top to the copy.
486 /// Return the end of the live range.
487 SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
489 /// overlapIntv - Indicate that all instructions in range should use the open
490 /// interval if End does not have tied-def usage of the register and in this
491 /// case compliment interval is used. Let the complement interval be live.
493 /// This doubles the register pressure, but is sometimes required to deal with
494 /// register uses after the last valid split point.
496 /// The Start index should be a return value from a leaveIntv* call, and End
497 /// should be in the same basic block. The parent interval must have the same
498 /// value across the range.
500 void overlapIntv(SlotIndex Start, SlotIndex End);
502 /// finish - after all the new live ranges have been created, compute the
503 /// remaining live range, and rewrite instructions to use the new registers.
504 /// @param LRMap When not null, this vector will map each live range in Edit
505 /// back to the indices returned by openIntv.
506 /// There may be extra indices created by dead code elimination.
507 void finish(SmallVectorImpl<unsigned> *LRMap = nullptr);
509 /// dump - print the current interval mapping to dbgs().
510 void dump() const;
512 // ===--- High level methods ---===
514 /// splitSingleBlock - Split CurLI into a separate live interval around the
515 /// uses in a single block. This is intended to be used as part of a larger
516 /// split, and doesn't call finish().
517 void splitSingleBlock(const SplitAnalysis::BlockInfo &BI);
519 /// splitLiveThroughBlock - Split CurLI in the given block such that it
520 /// enters the block in IntvIn and leaves it in IntvOut. There may be uses in
521 /// the block, but they will be ignored when placing split points.
523 /// @param MBBNum Block number.
524 /// @param IntvIn Interval index entering the block.
525 /// @param LeaveBefore When set, leave IntvIn before this point.
526 /// @param IntvOut Interval index leaving the block.
527 /// @param EnterAfter When set, enter IntvOut after this point.
528 void splitLiveThroughBlock(unsigned MBBNum,
529 unsigned IntvIn, SlotIndex LeaveBefore,
530 unsigned IntvOut, SlotIndex EnterAfter);
532 /// splitRegInBlock - Split CurLI in the given block such that it enters the
533 /// block in IntvIn and leaves it on the stack (or not at all). Split points
534 /// are placed in a way that avoids putting uses in the stack interval. This
535 /// may require creating a local interval when there is interference.
537 /// @param BI Block descriptor.
538 /// @param IntvIn Interval index entering the block. Not 0.
539 /// @param LeaveBefore When set, leave IntvIn before this point.
540 void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
541 unsigned IntvIn, SlotIndex LeaveBefore);
543 /// splitRegOutBlock - Split CurLI in the given block such that it enters the
544 /// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
545 /// Split points are placed to avoid interference and such that the uses are
546 /// not in the stack interval. This may require creating a local interval
547 /// when there is interference.
549 /// @param BI Block descriptor.
550 /// @param IntvOut Interval index leaving the block.
551 /// @param EnterAfter When set, enter IntvOut after this point.
552 void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
553 unsigned IntvOut, SlotIndex EnterAfter);
556 } // end namespace llvm
558 #endif // LLVM_LIB_CODEGEN_SPLITKIT_H