[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / clang / test / CodeGen / 2008-01-28-UnionSize.c
blob14f363dbc05c84a61f85e73950b8f674e08cc696
1 // RUN: %clang_cc1 %s -emit-llvm -o -
2 // PR 1861
4 typedef unsigned char __u8;
5 typedef unsigned int __u32;
6 typedef unsigned short u16;
7 typedef __u32 __le32;
8 struct bcm43xx_plcp_hdr6 {
9 union {
10 __le32 data;
11 __u8 raw[6];
13 __attribute__((__packed__));
15 __attribute__((__packed__));
16 struct bcm43xx_txhdr {
17 union {
18 struct {
19 struct bcm43xx_plcp_hdr6 plcp;
23 __attribute__((__packed__));
24 static void bcm43xx_generate_rts(struct bcm43xx_txhdr *txhdr ) { }