clang/test/CodeGen/X86/avx512-kconstraints-att_inline_asm.c

   1 // RUN: %clang_cc1 %s -O0 -ffreestanding -triple=x86_64-apple-darwin -target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror | FileCheck %s
   2 // This test checks validity of att\gcc style inline assmebly for avx512 k and Yk constraints.
   3 // Also checks mask register allows flexible type (size <= 64 bit)
   4
   5 #include <x86intrin.h>
   6
   7 __m512i mask_Yk_i8(char msk, __m512i x, __m512i y){
   8 // CHECK: <8 x i64> asm "vpaddq\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i8 %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}})
   9   __m512i dst;
  10   asm ("vpaddq\t%3, %2, %0 %{%1%}"
  11        : "=x" (dst)      //output
  12        : "Yk" (msk), "x" (x), "x" (y));   //inputs
  13   return dst;
  14 }
  15
  16 __m512i mask_Yk_i16(short msk, __m512i x, __m512i y){
  17 // CHECK: <8 x i64> asm "vpaddd\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i16 %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}})
  18   __m512i dst;
  19   asm ("vpaddd\t%3, %2, %0 %{%1%}"
  20        : "=x" (dst)      //output
  21        : "Yk" (msk), "x" (x), "x" (y));   //inputs
  22   return dst;
  23 }
  24
  25 __m512i mask_Yk_i32(int msk, __m512i x, __m512i y){
  26 // CHECK: <8 x i64> asm "vpaddw\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}})
  27   __m512i dst;
  28   asm ("vpaddw\t%3, %2, %0 %{%1%}"
  29        : "=x" (dst)      //output
  30        : "Yk" (msk), "x" (x), "x" (y));   //inputs
  31   return dst;
  32 }
  33
  34 __m512i mask_Yk_i64(long long msk, __m512i x, __m512i y){
  35 // CHECK: <8 x i64> asm "vpaddb\09$3, $2, $0 {$1}", "=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i64 %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}})
  36   __m512i dst;
  37   asm ("vpaddb\t%3, %2, %0 %{%1%}"
  38        : "=x" (dst)      //output
  39        : "Yk" (msk), "x" (x), "x" (y));   //inputs
  40   return dst;
  41 }
  42
  43 char k_wise_op_i8(char msk_src1,char msk_src2){
  44 //CHECK: <8 x i1> asm "kandb\09$2, $1, $0", "=k,k,k,~{dirflag},~{fpsr},~{flags}"(<8 x i1> %{{.*}}, <8 x i1> %{{.*}})
  45   char msk_dst;
  46   asm ("kandb\t%2, %1, %0"
  47        : "=k" (msk_dst)
  48        : "k" (msk_src1), "k" (msk_src2));
  49   return msk_dst;
  50 }
  51
  52 short k_wise_op_i16(short msk_src1, short msk_src2){
  53 //CHECK: <16 x i1> asm "kandw\09$2, $1, $0", "=k,k,k,~{dirflag},~{fpsr},~{flags}"(<16 x i1> %{{.*}}, <16 x i1> %{{.*}})
  54   short msk_dst;
  55   asm ("kandw\t%2, %1, %0"
  56        : "=k" (msk_dst)
  57        : "k" (msk_src1), "k" (msk_src2));
  58   return msk_dst;
  59 }
  60
  61 int k_wise_op_i32(int msk_src1, int msk_src2){
  62 //CHECK: <32 x i1> asm "kandd\09$2, $1, $0", "=k,k,k,~{dirflag},~{fpsr},~{flags}"(<32 x i1> %{{.*}}, <32 x i1> %{{.*}})
  63   int msk_dst;
  64   asm ("kandd\t%2, %1, %0"
  65        : "=k" (msk_dst)
  66        : "k" (msk_src1), "k" (msk_src2));
  67   return msk_dst;
  68 }
  69
  70 long long k_wise_op_i64(long long msk_src1, long long msk_src2){
  71 //CHECK: <64 x i1> asm "kandq\09$2, $1, $0", "=k,k,k,~{dirflag},~{fpsr},~{flags}"(<64 x i1> %{{.*}}, <64 x i1> %{{.*}})
  72   long long msk_dst;
  73   asm ("kandq\t%2, %1, %0"
  74        : "=k" (msk_dst)
  75        : "k" (msk_src1), "k" (msk_src2));
  76   return msk_dst;
  77 }