clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  12 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  13 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  15
  16 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
  20 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  21 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  22
  23 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  26 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  27 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  28 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  29 // expected-no-diagnostics
  30 #ifndef HEADER
  31 #define HEADER
  32
  33 void fn1();
  34 void fn2();
  35 void fn3();
  36 void fn4();
  37 void fn5();
  38 void fn6();
  39
  40 int Arg;
  41
  42 void gtid_test() {
  43 #pragma omp target
  44 #pragma omp teams distribute parallel for simd
  45   for(int i = 0 ; i < 100; i++) {}
  46
  47 #pragma omp target
  48 #pragma omp teams distribute parallel for simd if (parallel: false)
  49   for(int i = 0 ; i < 100; i++) {
  50     gtid_test();
  51   }
  52 }
  53
  54
  55 template <typename T>
  56 int tmain(T Arg) {
  57 #pragma omp target
  58 #pragma omp teams distribute parallel for simd if (true)
  59   for(int i = 0 ; i < 100; i++) {
  60     fn1();
  61   }
  62 #pragma omp target
  63 #pragma omp teams distribute parallel for simd if (false)
  64   for(int i = 0 ; i < 100; i++) {
  65     fn2();
  66   }
  67 #pragma omp target
  68 #pragma omp teams distribute parallel for simd if (parallel: Arg)
  69   for(int i = 0 ; i < 100; i++) {
  70     fn3();
  71   }
  72   return 0;
  73 }
  74
  75 int main() {
  76 #pragma omp target
  77 #pragma omp teams distribute parallel for simd if (true)
  78   for(int i = 0 ; i < 100; i++) {
  79
  80
  81     fn4();
  82   }
  83
  84 #pragma omp target
  85 #pragma omp teams distribute parallel for simd if (false)
  86   for(int i = 0 ; i < 100; i++) {
  87
  88
  89     fn5();
  90   }
  91
  92 #pragma omp target
  93 #pragma omp teams distribute parallel for simd if (Arg)
  94   for(int i = 0 ; i < 100; i++) {
  95
  96
  97     fn6();
  98   }
  99
 100   return tmain(Arg);
 101 }
 102
 103
 104
 105
 106
 107
 108 // call void [[T_OUTLINE_FUN_3:@.+]](
 109
 110
 111
 112 #endif
 113 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
 114 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 115 // CHECK1-NEXT:  entry:
 116 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 117 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 118 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 119 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 120 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 121 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 122 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 123 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 124 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 125 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 126 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 127 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 128 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 129 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 130 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 131 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 132 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 133 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 134 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 135 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 136 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 137 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 138 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 139 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 140 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 141 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 142 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 143 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 144 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 145 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 146 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
 147 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 148 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 149 // CHECK1:       omp_offload.failed:
 150 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
 151 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 152 // CHECK1:       omp_offload.cont:
 153 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 154 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 155 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 156 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 157 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 158 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 159 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 160 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 161 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 162 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 163 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 164 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 165 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 166 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 167 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 168 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 169 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 170 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 171 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 172 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 173 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 174 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 175 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 176 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
 177 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 178 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 179 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS2]])
 180 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 181 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 182 // CHECK1:       omp_offload.failed3:
 183 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
 184 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 185 // CHECK1:       omp_offload.cont4:
 186 // CHECK1-NEXT:    ret void
 187 //
 188 //
 189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
 190 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
 191 // CHECK1-NEXT:  entry:
 192 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
 193 // CHECK1-NEXT:    ret void
 194 //
 195 //
 196 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
 197 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 198 // CHECK1-NEXT:  entry:
 199 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 200 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 201 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 202 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 203 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 204 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 205 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 206 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 207 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 208 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 209 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 210 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 211 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 212 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 213 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 214 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 215 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 216 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 217 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 218 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 219 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 220 // CHECK1:       cond.true:
 221 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 222 // CHECK1:       cond.false:
 223 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 224 // CHECK1-NEXT:    br label [[COND_END]]
 225 // CHECK1:       cond.end:
 226 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 227 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 228 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 229 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 230 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 231 // CHECK1:       omp.inner.for.cond:
 232 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
 233 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
 234 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 235 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 236 // CHECK1:       omp.inner.for.body:
 237 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
 238 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 239 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
 240 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 241 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
 242 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 243 // CHECK1:       omp.inner.for.inc:
 244 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
 245 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
 246 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 247 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
 248 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
 249 // CHECK1:       omp.inner.for.end:
 250 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 251 // CHECK1:       omp.loop.exit:
 252 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 253 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 254 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 255 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 256 // CHECK1:       .omp.final.then:
 257 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 258 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 259 // CHECK1:       .omp.final.done:
 260 // CHECK1-NEXT:    ret void
 261 //
 262 //
 263 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
 264 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 265 // CHECK1-NEXT:  entry:
 266 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 267 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 268 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 269 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 270 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 271 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 272 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 273 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 274 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 275 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 276 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 277 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 278 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 279 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 280 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 281 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 282 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 283 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 284 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 285 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 286 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 287 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 288 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 289 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 290 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 291 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 292 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 293 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 294 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 295 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 296 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 297 // CHECK1:       cond.true:
 298 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 299 // CHECK1:       cond.false:
 300 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 301 // CHECK1-NEXT:    br label [[COND_END]]
 302 // CHECK1:       cond.end:
 303 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 304 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 305 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 306 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 307 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 308 // CHECK1:       omp.inner.for.cond:
 309 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
 310 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
 311 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 312 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 313 // CHECK1:       omp.inner.for.body:
 314 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 315 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 316 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 317 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
 318 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 319 // CHECK1:       omp.body.continue:
 320 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 321 // CHECK1:       omp.inner.for.inc:
 322 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 323 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 324 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 325 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
 326 // CHECK1:       omp.inner.for.end:
 327 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 328 // CHECK1:       omp.loop.exit:
 329 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 330 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 331 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 332 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 333 // CHECK1:       .omp.final.then:
 334 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 335 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 336 // CHECK1:       .omp.final.done:
 337 // CHECK1-NEXT:    ret void
 338 //
 339 //
 340 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
 341 // CHECK1-SAME: () #[[ATTR1]] {
 342 // CHECK1-NEXT:  entry:
 343 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined)
 344 // CHECK1-NEXT:    ret void
 345 //
 346 //
 347 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined
 348 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 349 // CHECK1-NEXT:  entry:
 350 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 351 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 352 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 353 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 354 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 355 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 356 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 357 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 358 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 359 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 360 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 361 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 362 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 363 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 364 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 365 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 366 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 367 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 368 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 369 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 370 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 371 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 372 // CHECK1:       cond.true:
 373 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 374 // CHECK1:       cond.false:
 375 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 376 // CHECK1-NEXT:    br label [[COND_END]]
 377 // CHECK1:       cond.end:
 378 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 379 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 380 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 381 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 382 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 383 // CHECK1:       omp.inner.for.cond:
 384 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
 385 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
 386 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 387 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 388 // CHECK1:       omp.inner.for.body:
 389 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
 390 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 391 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
 392 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 393 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
 394 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
 395 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
 396 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
 397 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
 398 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 399 // CHECK1:       omp.inner.for.inc:
 400 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
 401 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
 402 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 403 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
 404 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
 405 // CHECK1:       omp.inner.for.end:
 406 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 407 // CHECK1:       omp.loop.exit:
 408 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 409 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 410 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 411 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 412 // CHECK1:       .omp.final.then:
 413 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 414 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 415 // CHECK1:       .omp.final.done:
 416 // CHECK1-NEXT:    ret void
 417 //
 418 //
 419 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined
 420 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 421 // CHECK1-NEXT:  entry:
 422 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 423 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 424 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 425 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 426 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 427 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 428 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 429 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 430 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 431 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 432 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 433 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 434 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 435 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 436 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 437 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 438 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 439 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 440 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 441 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 442 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 443 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 444 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 445 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 446 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 447 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 448 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 449 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 450 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 451 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 452 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 453 // CHECK1:       cond.true:
 454 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 455 // CHECK1:       cond.false:
 456 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 457 // CHECK1-NEXT:    br label [[COND_END]]
 458 // CHECK1:       cond.end:
 459 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 460 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 461 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 462 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 463 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 464 // CHECK1:       omp.inner.for.cond:
 465 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
 466 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
 467 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 468 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 469 // CHECK1:       omp.inner.for.body:
 470 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 471 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 472 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 473 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
 474 // CHECK1-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
 475 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 476 // CHECK1:       omp.body.continue:
 477 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 478 // CHECK1:       omp.inner.for.inc:
 479 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 480 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 481 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 482 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
 483 // CHECK1:       omp.inner.for.end:
 484 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 485 // CHECK1:       omp.loop.exit:
 486 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 487 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 488 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 489 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 490 // CHECK1:       .omp.final.then:
 491 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 492 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 493 // CHECK1:       .omp.final.done:
 494 // CHECK1-NEXT:    ret void
 495 //
 496 //
 497 // CHECK1-LABEL: define {{[^@]+}}@main
 498 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
 499 // CHECK1-NEXT:  entry:
 500 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 501 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 502 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 503 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 504 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 505 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
 506 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 507 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 508 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 509 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
 510 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
 511 // CHECK1-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 512 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 513 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 514 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 515 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 516 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 517 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 518 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 519 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 520 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 521 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 522 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 523 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 524 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 525 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 526 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 527 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 528 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 529 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 530 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 531 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 532 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 533 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 534 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 535 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 536 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 537 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 538 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 539 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, ptr [[KERNEL_ARGS]])
 540 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 541 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 542 // CHECK1:       omp_offload.failed:
 543 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
 544 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 545 // CHECK1:       omp_offload.cont:
 546 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 547 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 548 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 549 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 550 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 551 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 552 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 553 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 554 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 555 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 556 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 557 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 558 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 559 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 560 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 561 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 562 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 563 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 564 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 565 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 566 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 567 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 568 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 569 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
 570 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 571 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 572 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, ptr [[KERNEL_ARGS2]])
 573 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 574 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 575 // CHECK1:       omp_offload.failed3:
 576 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
 577 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 578 // CHECK1:       omp_offload.cont4:
 579 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
 580 // CHECK1-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
 581 // CHECK1-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
 582 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 583 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
 584 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 585 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
 586 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 587 // CHECK1-NEXT:    store ptr null, ptr [[TMP34]], align 8
 588 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 589 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 590 // CHECK1-NEXT:    [[TMP37:%.*]] = load i32, ptr @Arg, align 4
 591 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
 592 // CHECK1-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
 593 // CHECK1-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
 594 // CHECK1-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
 595 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
 596 // CHECK1-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
 597 // CHECK1-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
 598 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
 599 // CHECK1-NEXT:    store i32 3, ptr [[TMP41]], align 4
 600 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
 601 // CHECK1-NEXT:    store i32 1, ptr [[TMP42]], align 4
 602 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
 603 // CHECK1-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
 604 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
 605 // CHECK1-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
 606 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
 607 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP45]], align 8
 608 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
 609 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP46]], align 8
 610 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
 611 // CHECK1-NEXT:    store ptr null, ptr [[TMP47]], align 8
 612 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
 613 // CHECK1-NEXT:    store ptr null, ptr [[TMP48]], align 8
 614 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
 615 // CHECK1-NEXT:    store i64 100, ptr [[TMP49]], align 8
 616 // CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
 617 // CHECK1-NEXT:    store i64 0, ptr [[TMP50]], align 8
 618 // CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
 619 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
 620 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
 621 // CHECK1-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
 622 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
 623 // CHECK1-NEXT:    store i32 0, ptr [[TMP53]], align 4
 624 // CHECK1-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS6]])
 625 // CHECK1-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
 626 // CHECK1-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
 627 // CHECK1:       omp_offload.failed7:
 628 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP31]]) #[[ATTR2]]
 629 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
 630 // CHECK1:       omp_offload.cont8:
 631 // CHECK1-NEXT:    [[TMP56:%.*]] = load i32, ptr @Arg, align 4
 632 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP56]])
 633 // CHECK1-NEXT:    ret i32 [[CALL]]
 634 //
 635 //
 636 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
 637 // CHECK1-SAME: () #[[ATTR1]] {
 638 // CHECK1-NEXT:  entry:
 639 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined)
 640 // CHECK1-NEXT:    ret void
 641 //
 642 //
 643 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined
 644 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 645 // CHECK1-NEXT:  entry:
 646 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 647 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 648 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 649 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 650 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 651 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 652 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 653 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 654 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 655 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 656 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 657 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 658 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 659 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 660 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 661 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 662 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 663 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 664 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 665 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 666 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 667 // CHECK1:       cond.true:
 668 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 669 // CHECK1:       cond.false:
 670 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 671 // CHECK1-NEXT:    br label [[COND_END]]
 672 // CHECK1:       cond.end:
 673 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 674 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 675 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 676 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 677 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 678 // CHECK1:       omp.inner.for.cond:
 679 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
 680 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
 681 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 682 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 683 // CHECK1:       omp.inner.for.body:
 684 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
 685 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 686 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
 687 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 688 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
 689 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 690 // CHECK1:       omp.inner.for.inc:
 691 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
 692 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
 693 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 694 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
 695 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
 696 // CHECK1:       omp.inner.for.end:
 697 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 698 // CHECK1:       omp.loop.exit:
 699 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 700 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 701 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 702 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 703 // CHECK1:       .omp.final.then:
 704 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 705 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 706 // CHECK1:       .omp.final.done:
 707 // CHECK1-NEXT:    ret void
 708 //
 709 //
 710 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined
 711 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 712 // CHECK1-NEXT:  entry:
 713 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 714 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 715 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 716 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 717 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 718 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 719 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 720 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 721 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 722 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 723 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 724 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 725 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 726 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 727 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 728 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 729 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 730 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 731 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 732 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 733 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 734 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 735 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 736 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 737 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 738 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 739 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 740 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 741 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 742 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 743 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 744 // CHECK1:       cond.true:
 745 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 746 // CHECK1:       cond.false:
 747 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 748 // CHECK1-NEXT:    br label [[COND_END]]
 749 // CHECK1:       cond.end:
 750 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 751 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 752 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 753 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 754 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 755 // CHECK1:       omp.inner.for.cond:
 756 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
 757 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
 758 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 759 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 760 // CHECK1:       omp.inner.for.body:
 761 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 762 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 763 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 764 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
 765 // CHECK1-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
 766 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 767 // CHECK1:       omp.body.continue:
 768 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 769 // CHECK1:       omp.inner.for.inc:
 770 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 771 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 772 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 773 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
 774 // CHECK1:       omp.inner.for.end:
 775 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 776 // CHECK1:       omp.loop.exit:
 777 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 778 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 779 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 780 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 781 // CHECK1:       .omp.final.then:
 782 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 783 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 784 // CHECK1:       .omp.final.done:
 785 // CHECK1-NEXT:    ret void
 786 //
 787 //
 788 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
 789 // CHECK1-SAME: () #[[ATTR1]] {
 790 // CHECK1-NEXT:  entry:
 791 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined)
 792 // CHECK1-NEXT:    ret void
 793 //
 794 //
 795 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined
 796 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 797 // CHECK1-NEXT:  entry:
 798 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 799 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 800 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 801 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 802 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 803 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 804 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 805 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 806 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 807 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 808 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 809 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 810 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 811 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 812 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 813 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 814 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 815 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 816 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 817 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 818 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 819 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 820 // CHECK1:       cond.true:
 821 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 822 // CHECK1:       cond.false:
 823 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 824 // CHECK1-NEXT:    br label [[COND_END]]
 825 // CHECK1:       cond.end:
 826 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 827 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 828 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 829 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 830 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 831 // CHECK1:       omp.inner.for.cond:
 832 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
 833 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
 834 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 835 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 836 // CHECK1:       omp.inner.for.body:
 837 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
 838 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 839 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
 840 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 841 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
 842 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
 843 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
 844 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
 845 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
 846 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 847 // CHECK1:       omp.inner.for.inc:
 848 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
 849 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
 850 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 851 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
 852 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
 853 // CHECK1:       omp.inner.for.end:
 854 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 855 // CHECK1:       omp.loop.exit:
 856 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 857 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 858 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 859 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 860 // CHECK1:       .omp.final.then:
 861 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 862 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 863 // CHECK1:       .omp.final.done:
 864 // CHECK1-NEXT:    ret void
 865 //
 866 //
 867 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined
 868 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 869 // CHECK1-NEXT:  entry:
 870 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 871 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 872 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 873 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 874 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 875 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 876 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 877 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 878 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 879 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 880 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 881 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 882 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 883 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 884 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 885 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 886 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 887 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 888 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 889 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 890 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 891 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 892 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 893 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 894 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 895 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 896 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 897 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 898 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 899 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 900 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 901 // CHECK1:       cond.true:
 902 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 903 // CHECK1:       cond.false:
 904 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 905 // CHECK1-NEXT:    br label [[COND_END]]
 906 // CHECK1:       cond.end:
 907 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 908 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 909 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 910 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 911 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 912 // CHECK1:       omp.inner.for.cond:
 913 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
 914 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
 915 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 916 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 917 // CHECK1:       omp.inner.for.body:
 918 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 919 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 920 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 921 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
 922 // CHECK1-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
 923 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 924 // CHECK1:       omp.body.continue:
 925 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 926 // CHECK1:       omp.inner.for.inc:
 927 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 928 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 929 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 930 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
 931 // CHECK1:       omp.inner.for.end:
 932 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 933 // CHECK1:       omp.loop.exit:
 934 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 935 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 936 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 937 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 938 // CHECK1:       .omp.final.then:
 939 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 940 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 941 // CHECK1:       .omp.final.done:
 942 // CHECK1-NEXT:    ret void
 943 //
 944 //
 945 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
 946 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
 947 // CHECK1-NEXT:  entry:
 948 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
 949 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
 950 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
 951 // CHECK1-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
 952 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
 953 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
 954 // CHECK1-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
 955 // CHECK1-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
 956 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
 957 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
 958 // CHECK1-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
 959 // CHECK1-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
 960 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
 961 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP2]])
 962 // CHECK1-NEXT:    ret void
 963 //
 964 //
 965 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined
 966 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
 967 // CHECK1-NEXT:  entry:
 968 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 969 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 970 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
 971 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 972 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 973 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 974 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 975 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 976 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 977 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 978 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 979 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 980 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 981 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
 982 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 983 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 984 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 985 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 986 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 987 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 988 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 989 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 990 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 991 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 992 // CHECK1:       cond.true:
 993 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 994 // CHECK1:       cond.false:
 995 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 996 // CHECK1-NEXT:    br label [[COND_END]]
 997 // CHECK1:       cond.end:
 998 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 999 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1000 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1001 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1002 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1003 // CHECK1:       omp.inner.for.cond:
1004 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
1005 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
1006 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1007 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1008 // CHECK1:       omp.inner.for.body:
1009 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
1010 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1011 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
1012 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1013 // CHECK1-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP38]]
1014 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
1015 // CHECK1-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1016 // CHECK1:       omp_if.then:
1017 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP38]]
1018 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
1019 // CHECK1:       omp_if.else:
1020 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
1021 // CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
1022 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
1023 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
1024 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
1025 // CHECK1-NEXT:    br label [[OMP_IF_END]]
1026 // CHECK1:       omp_if.end:
1027 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1028 // CHECK1:       omp.inner.for.inc:
1029 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
1030 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
1031 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1032 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
1033 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
1034 // CHECK1:       omp.inner.for.end:
1035 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1036 // CHECK1:       omp.loop.exit:
1037 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1038 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1039 // CHECK1-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1040 // CHECK1-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1041 // CHECK1:       .omp.final.then:
1042 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1043 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1044 // CHECK1:       .omp.final.done:
1045 // CHECK1-NEXT:    ret void
1046 //
1047 //
1048 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined
1049 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1050 // CHECK1-NEXT:  entry:
1051 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1052 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1053 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1054 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1055 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1056 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1057 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1058 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1059 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1060 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1061 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1062 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1063 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1064 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1065 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1066 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1067 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1068 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1069 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1070 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1071 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1072 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1073 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1074 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1075 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1076 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1078 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1079 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1080 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1081 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1082 // CHECK1:       cond.true:
1083 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1084 // CHECK1:       cond.false:
1085 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1086 // CHECK1-NEXT:    br label [[COND_END]]
1087 // CHECK1:       cond.end:
1088 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1089 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1090 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1091 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1092 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1093 // CHECK1:       omp.inner.for.cond:
1094 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
1095 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
1096 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1097 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1098 // CHECK1:       omp.inner.for.body:
1099 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1100 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1101 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1102 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
1103 // CHECK1-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
1104 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1105 // CHECK1:       omp.body.continue:
1106 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1107 // CHECK1:       omp.inner.for.inc:
1108 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1109 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1110 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1111 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
1112 // CHECK1:       omp.inner.for.end:
1113 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1114 // CHECK1:       omp.loop.exit:
1115 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1116 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1117 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1118 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1119 // CHECK1:       .omp.final.then:
1120 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1121 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1122 // CHECK1:       .omp.final.done:
1123 // CHECK1-NEXT:    ret void
1124 //
1125 //
1126 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1127 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
1128 // CHECK1-NEXT:  entry:
1129 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
1130 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1131 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1132 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1133 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1134 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
1135 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
1136 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
1137 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
1138 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1139 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
1140 // CHECK1-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1141 // CHECK1-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
1142 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1143 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
1144 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1145 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
1146 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1147 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
1148 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1149 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
1150 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1151 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
1152 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1153 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
1154 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1155 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
1156 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1157 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
1158 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1159 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
1160 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1161 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
1162 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1163 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1164 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1165 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1166 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1167 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
1168 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, ptr [[KERNEL_ARGS]])
1169 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1170 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1171 // CHECK1:       omp_offload.failed:
1172 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
1173 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1174 // CHECK1:       omp_offload.cont:
1175 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1176 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
1177 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1178 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
1179 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1180 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
1181 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1182 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
1183 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1184 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
1185 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1186 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
1187 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1188 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
1189 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1190 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
1191 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1192 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
1193 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1194 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
1195 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1196 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1197 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1198 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
1199 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1200 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
1201 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS2]])
1202 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1203 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1204 // CHECK1:       omp_offload.failed3:
1205 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
1206 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1207 // CHECK1:       omp_offload.cont4:
1208 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
1209 // CHECK1-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
1210 // CHECK1-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
1211 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1212 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
1213 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1214 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
1215 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1216 // CHECK1-NEXT:    store ptr null, ptr [[TMP34]], align 8
1217 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1218 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1219 // CHECK1-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
1220 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
1221 // CHECK1-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
1222 // CHECK1-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
1223 // CHECK1-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1224 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
1225 // CHECK1-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
1226 // CHECK1-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
1227 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
1228 // CHECK1-NEXT:    store i32 3, ptr [[TMP41]], align 4
1229 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
1230 // CHECK1-NEXT:    store i32 1, ptr [[TMP42]], align 4
1231 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
1232 // CHECK1-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
1233 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
1234 // CHECK1-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
1235 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
1236 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP45]], align 8
1237 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
1238 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP46]], align 8
1239 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
1240 // CHECK1-NEXT:    store ptr null, ptr [[TMP47]], align 8
1241 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
1242 // CHECK1-NEXT:    store ptr null, ptr [[TMP48]], align 8
1243 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
1244 // CHECK1-NEXT:    store i64 100, ptr [[TMP49]], align 8
1245 // CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
1246 // CHECK1-NEXT:    store i64 0, ptr [[TMP50]], align 8
1247 // CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
1248 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
1249 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
1250 // CHECK1-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
1251 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
1252 // CHECK1-NEXT:    store i32 0, ptr [[TMP53]], align 4
1253 // CHECK1-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, ptr [[KERNEL_ARGS6]])
1254 // CHECK1-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
1255 // CHECK1-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1256 // CHECK1:       omp_offload.failed7:
1257 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP31]]) #[[ATTR2]]
1258 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1259 // CHECK1:       omp_offload.cont8:
1260 // CHECK1-NEXT:    ret i32 0
1261 //
1262 //
1263 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
1264 // CHECK1-SAME: () #[[ATTR1]] {
1265 // CHECK1-NEXT:  entry:
1266 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined)
1267 // CHECK1-NEXT:    ret void
1268 //
1269 //
1270 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined
1271 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1272 // CHECK1-NEXT:  entry:
1273 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1274 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1275 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1276 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1277 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1278 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1279 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1280 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1281 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1282 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1283 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1284 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1285 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1286 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1287 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1288 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1289 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1290 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1291 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1292 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1293 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1294 // CHECK1:       cond.true:
1295 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1296 // CHECK1:       cond.false:
1297 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1298 // CHECK1-NEXT:    br label [[COND_END]]
1299 // CHECK1:       cond.end:
1300 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1301 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1302 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1303 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1304 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1305 // CHECK1:       omp.inner.for.cond:
1306 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
1307 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1308 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1309 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1310 // CHECK1:       omp.inner.for.body:
1311 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
1312 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1313 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1314 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1315 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
1316 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1317 // CHECK1:       omp.inner.for.inc:
1318 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1319 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
1320 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1321 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1322 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
1323 // CHECK1:       omp.inner.for.end:
1324 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1325 // CHECK1:       omp.loop.exit:
1326 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1327 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1328 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1329 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1330 // CHECK1:       .omp.final.then:
1331 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1332 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1333 // CHECK1:       .omp.final.done:
1334 // CHECK1-NEXT:    ret void
1335 //
1336 //
1337 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined
1338 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1339 // CHECK1-NEXT:  entry:
1340 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1341 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1342 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1343 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1344 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1345 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1346 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1347 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1348 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1349 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1350 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1351 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1352 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1353 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1354 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1355 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1356 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1357 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1358 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1359 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1360 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1361 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1362 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1363 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1364 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1365 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1366 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1367 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1368 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1369 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1370 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1371 // CHECK1:       cond.true:
1372 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1373 // CHECK1:       cond.false:
1374 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1375 // CHECK1-NEXT:    br label [[COND_END]]
1376 // CHECK1:       cond.end:
1377 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1378 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1379 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1380 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1381 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1382 // CHECK1:       omp.inner.for.cond:
1383 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
1384 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
1385 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1386 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1387 // CHECK1:       omp.inner.for.body:
1388 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1389 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1390 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1391 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
1392 // CHECK1-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
1393 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1394 // CHECK1:       omp.body.continue:
1395 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1396 // CHECK1:       omp.inner.for.inc:
1397 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1398 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1399 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1400 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
1401 // CHECK1:       omp.inner.for.end:
1402 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1403 // CHECK1:       omp.loop.exit:
1404 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1405 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1406 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1407 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1408 // CHECK1:       .omp.final.then:
1409 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1410 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1411 // CHECK1:       .omp.final.done:
1412 // CHECK1-NEXT:    ret void
1413 //
1414 //
1415 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
1416 // CHECK1-SAME: () #[[ATTR1]] {
1417 // CHECK1-NEXT:  entry:
1418 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined)
1419 // CHECK1-NEXT:    ret void
1420 //
1421 //
1422 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined
1423 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1424 // CHECK1-NEXT:  entry:
1425 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1426 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1427 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1428 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1429 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1430 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1431 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1432 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1433 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1434 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1435 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1436 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1437 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1438 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1439 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1440 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1441 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1442 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1443 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1444 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1445 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1446 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1447 // CHECK1:       cond.true:
1448 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1449 // CHECK1:       cond.false:
1450 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1451 // CHECK1-NEXT:    br label [[COND_END]]
1452 // CHECK1:       cond.end:
1453 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1454 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1455 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1456 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1457 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1458 // CHECK1:       omp.inner.for.cond:
1459 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
1460 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1461 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1462 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1463 // CHECK1:       omp.inner.for.body:
1464 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
1465 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1466 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1467 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1468 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1469 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
1470 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
1471 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
1472 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1473 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1474 // CHECK1:       omp.inner.for.inc:
1475 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1476 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
1477 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1478 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1479 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
1480 // CHECK1:       omp.inner.for.end:
1481 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1482 // CHECK1:       omp.loop.exit:
1483 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1484 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1485 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1486 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1487 // CHECK1:       .omp.final.then:
1488 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1489 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1490 // CHECK1:       .omp.final.done:
1491 // CHECK1-NEXT:    ret void
1492 //
1493 //
1494 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined
1495 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1496 // CHECK1-NEXT:  entry:
1497 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1498 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1499 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1500 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1501 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1502 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1503 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1504 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1505 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1506 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1507 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1508 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1509 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1510 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1511 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1512 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1513 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1514 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1515 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1516 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1517 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1518 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1519 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1520 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1521 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1522 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1523 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1524 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1525 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1526 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1527 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1528 // CHECK1:       cond.true:
1529 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1530 // CHECK1:       cond.false:
1531 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1532 // CHECK1-NEXT:    br label [[COND_END]]
1533 // CHECK1:       cond.end:
1534 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1535 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1536 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1537 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1538 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1539 // CHECK1:       omp.inner.for.cond:
1540 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
1541 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
1542 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1543 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1544 // CHECK1:       omp.inner.for.body:
1545 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1546 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1547 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1548 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
1549 // CHECK1-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
1550 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1551 // CHECK1:       omp.body.continue:
1552 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1553 // CHECK1:       omp.inner.for.inc:
1554 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1555 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1556 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1557 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
1558 // CHECK1:       omp.inner.for.end:
1559 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1560 // CHECK1:       omp.loop.exit:
1561 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1562 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1563 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1564 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1565 // CHECK1:       .omp.final.then:
1566 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1567 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1568 // CHECK1:       .omp.final.done:
1569 // CHECK1-NEXT:    ret void
1570 //
1571 //
1572 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
1573 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1574 // CHECK1-NEXT:  entry:
1575 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
1576 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1577 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1578 // CHECK1-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
1579 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
1580 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
1581 // CHECK1-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
1582 // CHECK1-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
1583 // CHECK1-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1584 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
1585 // CHECK1-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
1586 // CHECK1-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
1587 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
1588 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined, i64 [[TMP2]])
1589 // CHECK1-NEXT:    ret void
1590 //
1591 //
1592 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined
1593 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1594 // CHECK1-NEXT:  entry:
1595 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1596 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1597 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1598 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1599 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1600 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1601 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1602 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1603 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1604 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1605 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1606 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1607 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1608 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1609 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1610 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1611 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1612 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1613 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1614 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1615 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1616 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1617 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1618 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1619 // CHECK1:       cond.true:
1620 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1621 // CHECK1:       cond.false:
1622 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1623 // CHECK1-NEXT:    br label [[COND_END]]
1624 // CHECK1:       cond.end:
1625 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1626 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1627 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1628 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1629 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1630 // CHECK1:       omp.inner.for.cond:
1631 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
1632 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1633 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1634 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1635 // CHECK1:       omp.inner.for.body:
1636 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
1637 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1638 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1639 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1640 // CHECK1-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP56]]
1641 // CHECK1-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
1642 // CHECK1-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1643 // CHECK1:       omp_if.then:
1644 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP56]]
1645 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
1646 // CHECK1:       omp_if.else:
1647 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
1648 // CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
1649 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
1650 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
1651 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
1652 // CHECK1-NEXT:    br label [[OMP_IF_END]]
1653 // CHECK1:       omp_if.end:
1654 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1655 // CHECK1:       omp.inner.for.inc:
1656 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1657 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
1658 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1659 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1660 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
1661 // CHECK1:       omp.inner.for.end:
1662 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1663 // CHECK1:       omp.loop.exit:
1664 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1665 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1666 // CHECK1-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1667 // CHECK1-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1668 // CHECK1:       .omp.final.then:
1669 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1670 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1671 // CHECK1:       .omp.final.done:
1672 // CHECK1-NEXT:    ret void
1673 //
1674 //
1675 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined
1676 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1677 // CHECK1-NEXT:  entry:
1678 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1679 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1680 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1681 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1682 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1683 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1684 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1685 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1686 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1687 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1688 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1689 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1690 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1691 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1692 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1693 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1694 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1695 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1696 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1697 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1698 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1699 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1700 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1701 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1702 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1703 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1704 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1705 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1706 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1707 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1708 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1709 // CHECK1:       cond.true:
1710 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1711 // CHECK1:       cond.false:
1712 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1713 // CHECK1-NEXT:    br label [[COND_END]]
1714 // CHECK1:       cond.end:
1715 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1716 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1717 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1718 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1719 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1720 // CHECK1:       omp.inner.for.cond:
1721 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
1722 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
1723 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1724 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1725 // CHECK1:       omp.inner.for.body:
1726 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1727 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1728 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1729 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
1730 // CHECK1-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
1731 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1732 // CHECK1:       omp.body.continue:
1733 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1734 // CHECK1:       omp.inner.for.inc:
1735 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1736 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1737 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1738 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
1739 // CHECK1:       omp.inner.for.end:
1740 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1741 // CHECK1:       omp.loop.exit:
1742 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1743 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1744 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1745 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1746 // CHECK1:       .omp.final.then:
1747 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1748 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1749 // CHECK1:       .omp.final.done:
1750 // CHECK1-NEXT:    ret void
1751 //
1752 //
1753 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
1754 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1755 // CHECK3-NEXT:  entry:
1756 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1757 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1758 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1759 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1760 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1761 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
1762 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1763 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
1764 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1765 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
1766 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1767 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
1768 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1769 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
1770 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1771 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
1772 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1773 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
1774 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1775 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
1776 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1777 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
1778 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1779 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
1780 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1781 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1782 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1783 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1784 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1785 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
1786 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
1787 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1788 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1789 // CHECK3:       omp_offload.failed:
1790 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
1791 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1792 // CHECK3:       omp_offload.cont:
1793 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1794 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
1795 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1796 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
1797 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1798 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
1799 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1800 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
1801 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1802 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
1803 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1804 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
1805 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1806 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
1807 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1808 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
1809 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1810 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
1811 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1812 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
1813 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1814 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1815 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1816 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
1817 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1818 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
1819 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS2]])
1820 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1821 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1822 // CHECK3:       omp_offload.failed3:
1823 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
1824 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1825 // CHECK3:       omp_offload.cont4:
1826 // CHECK3-NEXT:    ret void
1827 //
1828 //
1829 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
1830 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] {
1831 // CHECK3-NEXT:  entry:
1832 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
1833 // CHECK3-NEXT:    ret void
1834 //
1835 //
1836 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
1837 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1838 // CHECK3-NEXT:  entry:
1839 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1840 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1841 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1842 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1843 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1844 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1845 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1846 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1847 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1848 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1849 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1850 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1851 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1852 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1853 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1854 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1855 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1856 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1857 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1858 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1859 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1860 // CHECK3:       cond.true:
1861 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1862 // CHECK3:       cond.false:
1863 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1864 // CHECK3-NEXT:    br label [[COND_END]]
1865 // CHECK3:       cond.end:
1866 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1867 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1868 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1869 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1870 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1871 // CHECK3:       omp.inner.for.cond:
1872 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1873 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1874 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1875 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1876 // CHECK3:       omp.inner.for.body:
1877 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
1878 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1879 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1880 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1881 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
1882 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1883 // CHECK3:       omp.inner.for.inc:
1884 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1885 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
1886 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1887 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1888 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1889 // CHECK3:       omp.inner.for.end:
1890 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1891 // CHECK3:       omp.loop.exit:
1892 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1893 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1894 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1895 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1896 // CHECK3:       .omp.final.then:
1897 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
1898 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1899 // CHECK3:       .omp.final.done:
1900 // CHECK3-NEXT:    ret void
1901 //
1902 //
1903 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
1904 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1905 // CHECK3-NEXT:  entry:
1906 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1907 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1908 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1909 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1910 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1911 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1912 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1913 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1914 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1915 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1916 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1917 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1918 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1919 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1920 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1921 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1922 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1923 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1924 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1925 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1926 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1927 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1928 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1929 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1930 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1931 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1932 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1933 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1934 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1935 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1936 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1937 // CHECK3:       cond.true:
1938 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1939 // CHECK3:       cond.false:
1940 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1941 // CHECK3-NEXT:    br label [[COND_END]]
1942 // CHECK3:       cond.end:
1943 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1944 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1945 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1946 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1947 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1948 // CHECK3:       omp.inner.for.cond:
1949 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1950 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1951 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1952 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1953 // CHECK3:       omp.inner.for.body:
1954 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1955 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1956 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1957 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
1958 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1959 // CHECK3:       omp.body.continue:
1960 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1961 // CHECK3:       omp.inner.for.inc:
1962 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1963 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1964 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1965 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1966 // CHECK3:       omp.inner.for.end:
1967 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1968 // CHECK3:       omp.loop.exit:
1969 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1970 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1971 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1972 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1973 // CHECK3:       .omp.final.then:
1974 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
1975 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1976 // CHECK3:       .omp.final.done:
1977 // CHECK3-NEXT:    ret void
1978 //
1979 //
1980 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
1981 // CHECK3-SAME: () #[[ATTR1]] {
1982 // CHECK3-NEXT:  entry:
1983 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined)
1984 // CHECK3-NEXT:    ret void
1985 //
1986 //
1987 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined
1988 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1989 // CHECK3-NEXT:  entry:
1990 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1991 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1992 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1993 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1994 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1995 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1996 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1997 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1998 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1999 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2000 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2001 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2002 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2003 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2004 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2005 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2006 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2007 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2008 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2009 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2010 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2011 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2012 // CHECK3:       cond.true:
2013 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2014 // CHECK3:       cond.false:
2015 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2016 // CHECK3-NEXT:    br label [[COND_END]]
2017 // CHECK3:       cond.end:
2018 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2019 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2020 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2021 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2022 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2023 // CHECK3:       omp.inner.for.cond:
2024 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
2025 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
2026 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2027 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2028 // CHECK3:       omp.inner.for.body:
2029 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
2030 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2031 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
2032 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2033 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
2034 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
2035 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
2036 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
2037 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
2038 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2039 // CHECK3:       omp.inner.for.inc:
2040 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2041 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
2042 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2043 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2044 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
2045 // CHECK3:       omp.inner.for.end:
2046 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2047 // CHECK3:       omp.loop.exit:
2048 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2049 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2050 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2051 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2052 // CHECK3:       .omp.final.then:
2053 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2054 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2055 // CHECK3:       .omp.final.done:
2056 // CHECK3-NEXT:    ret void
2057 //
2058 //
2059 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined
2060 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2061 // CHECK3-NEXT:  entry:
2062 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2063 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2064 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2065 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2066 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2067 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2068 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2069 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2070 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2071 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2072 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2073 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2074 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2075 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2076 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2077 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2078 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2079 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2080 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2081 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2082 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2083 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2084 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2085 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2086 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2087 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2088 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2089 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2090 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2091 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2092 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2093 // CHECK3:       cond.true:
2094 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2095 // CHECK3:       cond.false:
2096 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2097 // CHECK3-NEXT:    br label [[COND_END]]
2098 // CHECK3:       cond.end:
2099 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2100 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2101 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2102 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2103 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2104 // CHECK3:       omp.inner.for.cond:
2105 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
2106 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
2107 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2108 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2109 // CHECK3:       omp.inner.for.body:
2110 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2111 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2112 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2113 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
2114 // CHECK3-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
2115 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2116 // CHECK3:       omp.body.continue:
2117 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2118 // CHECK3:       omp.inner.for.inc:
2119 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2120 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2121 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2122 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2123 // CHECK3:       omp.inner.for.end:
2124 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2125 // CHECK3:       omp.loop.exit:
2126 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2127 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2128 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2129 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2130 // CHECK3:       .omp.final.then:
2131 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2132 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2133 // CHECK3:       .omp.final.done:
2134 // CHECK3-NEXT:    ret void
2135 //
2136 //
2137 // CHECK3-LABEL: define {{[^@]+}}@main
2138 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2139 // CHECK3-NEXT:  entry:
2140 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2141 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2142 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2143 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2144 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2145 // CHECK3-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
2146 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2147 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2148 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2149 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2150 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
2151 // CHECK3-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2152 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2153 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2154 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
2155 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2156 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
2157 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2158 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
2159 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2160 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
2161 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2162 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
2163 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2164 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
2165 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2166 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
2167 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2168 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
2169 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2170 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
2171 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2172 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
2173 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2174 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
2175 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2176 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
2177 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2178 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
2179 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, ptr [[KERNEL_ARGS]])
2180 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2181 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2182 // CHECK3:       omp_offload.failed:
2183 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
2184 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2185 // CHECK3:       omp_offload.cont:
2186 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
2187 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
2188 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
2189 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
2190 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
2191 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
2192 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
2193 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
2194 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
2195 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
2196 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
2197 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
2198 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
2199 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
2200 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
2201 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
2202 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
2203 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
2204 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
2205 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
2206 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
2207 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
2208 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
2209 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
2210 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
2211 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
2212 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, ptr [[KERNEL_ARGS2]])
2213 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2214 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2215 // CHECK3:       omp_offload.failed3:
2216 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
2217 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
2218 // CHECK3:       omp_offload.cont4:
2219 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
2220 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
2221 // CHECK3-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
2222 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2223 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
2224 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2225 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
2226 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2227 // CHECK3-NEXT:    store ptr null, ptr [[TMP34]], align 8
2228 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2229 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2230 // CHECK3-NEXT:    [[TMP37:%.*]] = load i32, ptr @Arg, align 4
2231 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
2232 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
2233 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
2234 // CHECK3-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2235 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
2236 // CHECK3-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
2237 // CHECK3-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
2238 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
2239 // CHECK3-NEXT:    store i32 3, ptr [[TMP41]], align 4
2240 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
2241 // CHECK3-NEXT:    store i32 1, ptr [[TMP42]], align 4
2242 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
2243 // CHECK3-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
2244 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
2245 // CHECK3-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
2246 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
2247 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP45]], align 8
2248 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
2249 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP46]], align 8
2250 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
2251 // CHECK3-NEXT:    store ptr null, ptr [[TMP47]], align 8
2252 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
2253 // CHECK3-NEXT:    store ptr null, ptr [[TMP48]], align 8
2254 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
2255 // CHECK3-NEXT:    store i64 100, ptr [[TMP49]], align 8
2256 // CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
2257 // CHECK3-NEXT:    store i64 0, ptr [[TMP50]], align 8
2258 // CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
2259 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
2260 // CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
2261 // CHECK3-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
2262 // CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
2263 // CHECK3-NEXT:    store i32 0, ptr [[TMP53]], align 4
2264 // CHECK3-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS6]])
2265 // CHECK3-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
2266 // CHECK3-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2267 // CHECK3:       omp_offload.failed7:
2268 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP31]]) #[[ATTR2]]
2269 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2270 // CHECK3:       omp_offload.cont8:
2271 // CHECK3-NEXT:    [[TMP56:%.*]] = load i32, ptr @Arg, align 4
2272 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP56]])
2273 // CHECK3-NEXT:    ret i32 [[CALL]]
2274 //
2275 //
2276 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
2277 // CHECK3-SAME: () #[[ATTR1]] {
2278 // CHECK3-NEXT:  entry:
2279 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined)
2280 // CHECK3-NEXT:    ret void
2281 //
2282 //
2283 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined
2284 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2285 // CHECK3-NEXT:  entry:
2286 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2287 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2288 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2289 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2290 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2291 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2292 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2293 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2294 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2295 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2296 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2297 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2298 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2299 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2300 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2301 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2302 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2303 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2304 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2305 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2306 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2307 // CHECK3:       cond.true:
2308 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2309 // CHECK3:       cond.false:
2310 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2311 // CHECK3-NEXT:    br label [[COND_END]]
2312 // CHECK3:       cond.end:
2313 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2314 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2315 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2316 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2317 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2318 // CHECK3:       omp.inner.for.cond:
2319 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
2320 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2321 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2322 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2323 // CHECK3:       omp.inner.for.body:
2324 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
2325 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2326 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2327 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2328 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
2329 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2330 // CHECK3:       omp.inner.for.inc:
2331 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2332 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
2333 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2334 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2335 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
2336 // CHECK3:       omp.inner.for.end:
2337 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2338 // CHECK3:       omp.loop.exit:
2339 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2340 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2341 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2342 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2343 // CHECK3:       .omp.final.then:
2344 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2345 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2346 // CHECK3:       .omp.final.done:
2347 // CHECK3-NEXT:    ret void
2348 //
2349 //
2350 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined
2351 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2352 // CHECK3-NEXT:  entry:
2353 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2354 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2355 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2356 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2357 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2358 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2359 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2360 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2361 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2362 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2363 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2364 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2365 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2366 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2367 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2368 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2369 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2370 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2371 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2372 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2373 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2374 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2375 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2376 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2377 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2378 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2379 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2380 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2381 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2382 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2383 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2384 // CHECK3:       cond.true:
2385 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2386 // CHECK3:       cond.false:
2387 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2388 // CHECK3-NEXT:    br label [[COND_END]]
2389 // CHECK3:       cond.end:
2390 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2391 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2392 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2393 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2394 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2395 // CHECK3:       omp.inner.for.cond:
2396 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
2397 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
2398 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2399 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2400 // CHECK3:       omp.inner.for.body:
2401 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2402 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2403 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2404 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
2405 // CHECK3-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
2406 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2407 // CHECK3:       omp.body.continue:
2408 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2409 // CHECK3:       omp.inner.for.inc:
2410 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2411 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2412 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2413 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
2414 // CHECK3:       omp.inner.for.end:
2415 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2416 // CHECK3:       omp.loop.exit:
2417 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2418 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2419 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2420 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2421 // CHECK3:       .omp.final.then:
2422 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2423 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2424 // CHECK3:       .omp.final.done:
2425 // CHECK3-NEXT:    ret void
2426 //
2427 //
2428 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
2429 // CHECK3-SAME: () #[[ATTR1]] {
2430 // CHECK3-NEXT:  entry:
2431 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined)
2432 // CHECK3-NEXT:    ret void
2433 //
2434 //
2435 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined
2436 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2437 // CHECK3-NEXT:  entry:
2438 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2439 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2440 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2441 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2442 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2443 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2444 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2445 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2446 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2447 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2448 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2449 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2450 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2451 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2452 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2453 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2454 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2455 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2456 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2457 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2458 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2459 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2460 // CHECK3:       cond.true:
2461 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2462 // CHECK3:       cond.false:
2463 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2464 // CHECK3-NEXT:    br label [[COND_END]]
2465 // CHECK3:       cond.end:
2466 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2467 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2468 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2469 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2470 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2471 // CHECK3:       omp.inner.for.cond:
2472 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2473 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2474 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2475 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2476 // CHECK3:       omp.inner.for.body:
2477 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2478 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2479 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2480 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2481 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2482 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2483 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
2484 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2485 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2486 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2487 // CHECK3:       omp.inner.for.inc:
2488 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2489 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2490 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2491 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2492 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
2493 // CHECK3:       omp.inner.for.end:
2494 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2495 // CHECK3:       omp.loop.exit:
2496 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2497 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2498 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2499 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2500 // CHECK3:       .omp.final.then:
2501 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2502 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2503 // CHECK3:       .omp.final.done:
2504 // CHECK3-NEXT:    ret void
2505 //
2506 //
2507 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined
2508 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2509 // CHECK3-NEXT:  entry:
2510 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2511 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2512 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2513 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2514 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2515 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2516 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2517 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2518 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2519 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2520 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2521 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2522 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2523 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2524 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2525 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2526 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2527 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2528 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2529 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2530 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2531 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2532 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2533 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2534 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2535 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2536 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2537 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2538 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2539 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2540 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2541 // CHECK3:       cond.true:
2542 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2543 // CHECK3:       cond.false:
2544 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2545 // CHECK3-NEXT:    br label [[COND_END]]
2546 // CHECK3:       cond.end:
2547 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2548 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2549 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2550 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2551 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2552 // CHECK3:       omp.inner.for.cond:
2553 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2554 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2555 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2556 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2557 // CHECK3:       omp.inner.for.body:
2558 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2559 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2560 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2561 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2562 // CHECK3-NEXT:    call void @_Z3fn5v()
2563 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2564 // CHECK3:       omp.body.continue:
2565 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2566 // CHECK3:       omp.inner.for.inc:
2567 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2568 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2569 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2570 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2571 // CHECK3:       omp.inner.for.end:
2572 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2573 // CHECK3:       omp.loop.exit:
2574 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2575 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2576 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2577 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2578 // CHECK3:       .omp.final.then:
2579 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2580 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2581 // CHECK3:       .omp.final.done:
2582 // CHECK3-NEXT:    ret void
2583 //
2584 //
2585 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
2586 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
2587 // CHECK3-NEXT:  entry:
2588 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
2589 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2590 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2591 // CHECK3-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
2592 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
2593 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2594 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
2595 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
2596 // CHECK3-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2597 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
2598 // CHECK3-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
2599 // CHECK3-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
2600 // CHECK3-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
2601 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP2]])
2602 // CHECK3-NEXT:    ret void
2603 //
2604 //
2605 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined
2606 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2607 // CHECK3-NEXT:  entry:
2608 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2609 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2610 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2611 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2612 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2613 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2614 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2615 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2616 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2617 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2618 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2619 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2620 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8
2621 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR15:%.*]] = alloca i32, align 4
2622 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2623 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2624 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2625 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2626 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2627 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2628 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2629 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2630 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2631 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2632 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2633 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2634 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2635 // CHECK3:       cond.true:
2636 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2637 // CHECK3:       cond.false:
2638 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2639 // CHECK3-NEXT:    br label [[COND_END]]
2640 // CHECK3:       cond.end:
2641 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2642 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2643 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2644 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2645 // CHECK3-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2646 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
2647 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
2648 // CHECK3:       omp_if.then:
2649 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2650 // CHECK3:       omp.inner.for.cond:
2651 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
2652 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2653 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2654 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2655 // CHECK3:       omp.inner.for.body:
2656 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
2657 // CHECK3-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2658 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2659 // CHECK3-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2660 // CHECK3-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP35]]
2661 // CHECK3-NEXT:    [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
2662 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
2663 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]
2664 // CHECK3-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
2665 // CHECK3-NEXT:    [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP35]]
2666 // CHECK3-NEXT:    [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
2667 // CHECK3-NEXT:    br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
2668 // CHECK3:       omp_if.then4:
2669 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP35]]
2670 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2671 // CHECK3:       omp_if.else:
2672 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
2673 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
2674 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
2675 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP15]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
2676 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
2677 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2678 // CHECK3:       omp_if.end:
2679 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2680 // CHECK3:       omp.inner.for.inc:
2681 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2682 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
2683 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2684 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2685 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
2686 // CHECK3:       omp.inner.for.end:
2687 // CHECK3-NEXT:    br label [[OMP_IF_END20:%.*]]
2688 // CHECK3:       omp_if.else5:
2689 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND6:%.*]]
2690 // CHECK3:       omp.inner.for.cond6:
2691 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2692 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2693 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2694 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
2695 // CHECK3:       omp.inner.for.body8:
2696 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2697 // CHECK3-NEXT:    [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
2698 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2699 // CHECK3-NEXT:    [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2700 // CHECK3-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2701 // CHECK3-NEXT:    [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
2702 // CHECK3-NEXT:    [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
2703 // CHECK3-NEXT:    store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
2704 // CHECK3-NEXT:    [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
2705 // CHECK3-NEXT:    [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2706 // CHECK3-NEXT:    [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
2707 // CHECK3-NEXT:    br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
2708 // CHECK3:       omp_if.then13:
2709 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
2710 // CHECK3-NEXT:    br label [[OMP_IF_END16:%.*]]
2711 // CHECK3:       omp_if.else14:
2712 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2713 // CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2714 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR15]], align 4
2715 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1(ptr [[TMP27]], ptr [[DOTBOUND_ZERO_ADDR15]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
2716 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2717 // CHECK3-NEXT:    br label [[OMP_IF_END16]]
2718 // CHECK3:       omp_if.end16:
2719 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC17:%.*]]
2720 // CHECK3:       omp.inner.for.inc17:
2721 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2722 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2723 // CHECK3-NEXT:    [[ADD18:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2724 // CHECK3-NEXT:    store i32 [[ADD18]], ptr [[DOTOMP_IV]], align 4
2725 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND6]], !llvm.loop [[LOOP38:![0-9]+]]
2726 // CHECK3:       omp.inner.for.end19:
2727 // CHECK3-NEXT:    br label [[OMP_IF_END20]]
2728 // CHECK3:       omp_if.end20:
2729 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2730 // CHECK3:       omp.loop.exit:
2731 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2732 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2733 // CHECK3-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
2734 // CHECK3-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2735 // CHECK3:       .omp.final.then:
2736 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2737 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2738 // CHECK3:       .omp.final.done:
2739 // CHECK3-NEXT:    ret void
2740 //
2741 //
2742 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined
2743 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2744 // CHECK3-NEXT:  entry:
2745 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2746 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2747 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2748 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2749 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2750 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2751 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2752 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2753 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2754 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2755 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2756 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2757 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2758 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2759 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2760 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2761 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2762 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2763 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2764 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2765 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2766 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2767 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2768 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2769 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2770 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2771 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2772 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2773 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
2774 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2775 // CHECK3:       omp_if.then:
2776 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2777 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2778 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2779 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2780 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2781 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2782 // CHECK3:       cond.true:
2783 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2784 // CHECK3:       cond.false:
2785 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2786 // CHECK3-NEXT:    br label [[COND_END]]
2787 // CHECK3:       cond.end:
2788 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2789 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2790 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2791 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2792 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2793 // CHECK3:       omp.inner.for.cond:
2794 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
2795 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
2796 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2797 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2798 // CHECK3:       omp.inner.for.body:
2799 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2800 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2801 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2802 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
2803 // CHECK3-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
2804 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2805 // CHECK3:       omp.body.continue:
2806 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2807 // CHECK3:       omp.inner.for.inc:
2808 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2809 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
2810 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2811 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2812 // CHECK3:       omp.inner.for.end:
2813 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2814 // CHECK3:       omp_if.else:
2815 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2816 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
2817 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2818 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2819 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
2820 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2821 // CHECK3:       cond.true5:
2822 // CHECK3-NEXT:    br label [[COND_END7:%.*]]
2823 // CHECK3:       cond.false6:
2824 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2825 // CHECK3-NEXT:    br label [[COND_END7]]
2826 // CHECK3:       cond.end7:
2827 // CHECK3-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
2828 // CHECK3-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
2829 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2830 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
2831 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
2832 // CHECK3:       omp.inner.for.cond9:
2833 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2834 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2835 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2836 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2837 // CHECK3:       omp.inner.for.body11:
2838 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2839 // CHECK3-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
2840 // CHECK3-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2841 // CHECK3-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
2842 // CHECK3-NEXT:    call void @_Z3fn6v()
2843 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2844 // CHECK3:       omp.body.continue14:
2845 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2846 // CHECK3:       omp.inner.for.inc15:
2847 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2848 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
2849 // CHECK3-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
2850 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]
2851 // CHECK3:       omp.inner.for.end17:
2852 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2853 // CHECK3:       omp_if.end:
2854 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2855 // CHECK3:       omp.loop.exit:
2856 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2857 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2858 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2859 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2860 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2861 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2862 // CHECK3:       .omp.final.then:
2863 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2864 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2865 // CHECK3:       .omp.final.done:
2866 // CHECK3-NEXT:    ret void
2867 //
2868 //
2869 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1
2870 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2871 // CHECK3-NEXT:  entry:
2872 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2873 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2874 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2875 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2876 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2877 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2878 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2879 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2880 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2881 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2882 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2883 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2884 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2885 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2886 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2887 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2888 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2889 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2890 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2891 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2892 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2893 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2894 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2895 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2896 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2897 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2898 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2899 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2900 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
2901 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2902 // CHECK3:       omp_if.then:
2903 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2904 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2905 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2906 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2907 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2908 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2909 // CHECK3:       cond.true:
2910 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2911 // CHECK3:       cond.false:
2912 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2913 // CHECK3-NEXT:    br label [[COND_END]]
2914 // CHECK3:       cond.end:
2915 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2916 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2917 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2918 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2919 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2920 // CHECK3:       omp.inner.for.cond:
2921 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
2922 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
2923 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2924 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2925 // CHECK3:       omp.inner.for.body:
2926 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2927 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2928 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2929 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
2930 // CHECK3-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
2931 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2932 // CHECK3:       omp.body.continue:
2933 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2934 // CHECK3:       omp.inner.for.inc:
2935 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2936 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
2937 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2938 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
2939 // CHECK3:       omp.inner.for.end:
2940 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2941 // CHECK3:       omp_if.else:
2942 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2943 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
2944 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2945 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2946 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
2947 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2948 // CHECK3:       cond.true5:
2949 // CHECK3-NEXT:    br label [[COND_END7:%.*]]
2950 // CHECK3:       cond.false6:
2951 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2952 // CHECK3-NEXT:    br label [[COND_END7]]
2953 // CHECK3:       cond.end7:
2954 // CHECK3-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
2955 // CHECK3-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
2956 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2957 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
2958 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
2959 // CHECK3:       omp.inner.for.cond9:
2960 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2961 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2962 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2963 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2964 // CHECK3:       omp.inner.for.body11:
2965 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2966 // CHECK3-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
2967 // CHECK3-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2968 // CHECK3-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
2969 // CHECK3-NEXT:    call void @_Z3fn6v()
2970 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2971 // CHECK3:       omp.body.continue14:
2972 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2973 // CHECK3:       omp.inner.for.inc15:
2974 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2975 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
2976 // CHECK3-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
2977 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]
2978 // CHECK3:       omp.inner.for.end17:
2979 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2980 // CHECK3:       omp_if.end:
2981 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2982 // CHECK3:       omp.loop.exit:
2983 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2984 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2985 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2986 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2987 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2988 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2989 // CHECK3:       .omp.final.then:
2990 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2991 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2992 // CHECK3:       .omp.final.done:
2993 // CHECK3-NEXT:    ret void
2994 //
2995 //
2996 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2997 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
2998 // CHECK3-NEXT:  entry:
2999 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
3000 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3001 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3002 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3003 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3004 // CHECK3-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
3005 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
3006 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
3007 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
3008 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3009 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
3010 // CHECK3-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3011 // CHECK3-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
3012 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3013 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
3014 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3015 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
3016 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3017 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
3018 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3019 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
3020 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3021 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
3022 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3023 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
3024 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3025 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
3026 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3027 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
3028 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3029 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
3030 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3031 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
3032 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3033 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
3034 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3035 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
3036 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3037 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
3038 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, ptr [[KERNEL_ARGS]])
3039 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3040 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3041 // CHECK3:       omp_offload.failed:
3042 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
3043 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3044 // CHECK3:       omp_offload.cont:
3045 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
3046 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
3047 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
3048 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
3049 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
3050 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
3051 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
3052 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
3053 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
3054 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
3055 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
3056 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
3057 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
3058 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
3059 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
3060 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
3061 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
3062 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
3063 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
3064 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
3065 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
3066 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
3067 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
3068 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
3069 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
3070 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
3071 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS2]])
3072 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3073 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3074 // CHECK3:       omp_offload.failed3:
3075 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
3076 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3077 // CHECK3:       omp_offload.cont4:
3078 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
3079 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
3080 // CHECK3-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
3081 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3082 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
3083 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3084 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
3085 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3086 // CHECK3-NEXT:    store ptr null, ptr [[TMP34]], align 8
3087 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3088 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3089 // CHECK3-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
3090 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
3091 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
3092 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
3093 // CHECK3-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
3094 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
3095 // CHECK3-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
3096 // CHECK3-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
3097 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
3098 // CHECK3-NEXT:    store i32 3, ptr [[TMP41]], align 4
3099 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
3100 // CHECK3-NEXT:    store i32 1, ptr [[TMP42]], align 4
3101 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
3102 // CHECK3-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
3103 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
3104 // CHECK3-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
3105 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
3106 // CHECK3-NEXT:    store ptr @.offload_sizes.2, ptr [[TMP45]], align 8
3107 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
3108 // CHECK3-NEXT:    store ptr @.offload_maptypes.3, ptr [[TMP46]], align 8
3109 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
3110 // CHECK3-NEXT:    store ptr null, ptr [[TMP47]], align 8
3111 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
3112 // CHECK3-NEXT:    store ptr null, ptr [[TMP48]], align 8
3113 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
3114 // CHECK3-NEXT:    store i64 100, ptr [[TMP49]], align 8
3115 // CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
3116 // CHECK3-NEXT:    store i64 0, ptr [[TMP50]], align 8
3117 // CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
3118 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
3119 // CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
3120 // CHECK3-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
3121 // CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
3122 // CHECK3-NEXT:    store i32 0, ptr [[TMP53]], align 4
3123 // CHECK3-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, ptr [[KERNEL_ARGS6]])
3124 // CHECK3-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
3125 // CHECK3-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3126 // CHECK3:       omp_offload.failed7:
3127 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP31]]) #[[ATTR2]]
3128 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3129 // CHECK3:       omp_offload.cont8:
3130 // CHECK3-NEXT:    ret i32 0
3131 //
3132 //
3133 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
3134 // CHECK3-SAME: () #[[ATTR1]] {
3135 // CHECK3-NEXT:  entry:
3136 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined)
3137 // CHECK3-NEXT:    ret void
3138 //
3139 //
3140 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined
3141 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3142 // CHECK3-NEXT:  entry:
3143 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3144 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3145 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3146 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3147 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3148 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3149 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3150 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3151 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3152 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3153 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3154 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3155 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3156 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3157 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3158 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3159 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3160 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3161 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3162 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3163 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3164 // CHECK3:       cond.true:
3165 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3166 // CHECK3:       cond.false:
3167 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3168 // CHECK3-NEXT:    br label [[COND_END]]
3169 // CHECK3:       cond.end:
3170 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3171 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3172 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3173 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3174 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3175 // CHECK3:       omp.inner.for.cond:
3176 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
3177 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3178 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3179 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3180 // CHECK3:       omp.inner.for.body:
3181 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
3182 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3183 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3184 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3185 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
3186 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3187 // CHECK3:       omp.inner.for.inc:
3188 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3189 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
3190 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3191 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3192 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
3193 // CHECK3:       omp.inner.for.end:
3194 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3195 // CHECK3:       omp.loop.exit:
3196 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3197 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3198 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3199 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3200 // CHECK3:       .omp.final.then:
3201 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3202 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3203 // CHECK3:       .omp.final.done:
3204 // CHECK3-NEXT:    ret void
3205 //
3206 //
3207 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined
3208 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3209 // CHECK3-NEXT:  entry:
3210 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3211 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3212 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3213 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3214 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3215 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3216 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3217 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3218 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3219 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3220 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3221 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3222 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3223 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3224 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3225 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3226 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3227 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3228 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3229 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3230 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3231 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3232 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3233 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3234 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3235 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3236 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3237 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3238 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3239 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3240 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3241 // CHECK3:       cond.true:
3242 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3243 // CHECK3:       cond.false:
3244 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3245 // CHECK3-NEXT:    br label [[COND_END]]
3246 // CHECK3:       cond.end:
3247 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3248 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3249 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3250 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3251 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3252 // CHECK3:       omp.inner.for.cond:
3253 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
3254 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
3255 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3256 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3257 // CHECK3:       omp.inner.for.body:
3258 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3259 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3260 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3261 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
3262 // CHECK3-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
3263 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3264 // CHECK3:       omp.body.continue:
3265 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3266 // CHECK3:       omp.inner.for.inc:
3267 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3268 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3269 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3270 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
3271 // CHECK3:       omp.inner.for.end:
3272 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3273 // CHECK3:       omp.loop.exit:
3274 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3275 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3276 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3277 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3278 // CHECK3:       .omp.final.then:
3279 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3280 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3281 // CHECK3:       .omp.final.done:
3282 // CHECK3-NEXT:    ret void
3283 //
3284 //
3285 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
3286 // CHECK3-SAME: () #[[ATTR1]] {
3287 // CHECK3-NEXT:  entry:
3288 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined)
3289 // CHECK3-NEXT:    ret void
3290 //
3291 //
3292 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined
3293 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3294 // CHECK3-NEXT:  entry:
3295 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3296 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3297 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3298 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3299 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3300 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3301 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3302 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3303 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3304 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3305 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3306 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3307 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3308 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3309 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3310 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3311 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3312 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3313 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3314 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3315 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3316 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3317 // CHECK3:       cond.true:
3318 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3319 // CHECK3:       cond.false:
3320 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3321 // CHECK3-NEXT:    br label [[COND_END]]
3322 // CHECK3:       cond.end:
3323 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3324 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3325 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3326 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3327 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3328 // CHECK3:       omp.inner.for.cond:
3329 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3330 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3331 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3332 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3333 // CHECK3:       omp.inner.for.body:
3334 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3335 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3336 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3337 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3338 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
3339 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3340 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
3341 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3342 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
3343 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3344 // CHECK3:       omp.inner.for.inc:
3345 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3346 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3347 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3348 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3349 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
3350 // CHECK3:       omp.inner.for.end:
3351 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3352 // CHECK3:       omp.loop.exit:
3353 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3354 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3355 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3356 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3357 // CHECK3:       .omp.final.then:
3358 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3359 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3360 // CHECK3:       .omp.final.done:
3361 // CHECK3-NEXT:    ret void
3362 //
3363 //
3364 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined
3365 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3366 // CHECK3-NEXT:  entry:
3367 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3368 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3369 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3370 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3371 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3372 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3373 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3374 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3375 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3376 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3377 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3378 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3379 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3380 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3381 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3382 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3383 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3384 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3385 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3386 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3387 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3388 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3389 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3390 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3391 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3392 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3393 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3394 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3395 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3396 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3397 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3398 // CHECK3:       cond.true:
3399 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3400 // CHECK3:       cond.false:
3401 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3402 // CHECK3-NEXT:    br label [[COND_END]]
3403 // CHECK3:       cond.end:
3404 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3405 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3406 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3407 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3408 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3409 // CHECK3:       omp.inner.for.cond:
3410 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3411 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3412 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3413 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3414 // CHECK3:       omp.inner.for.body:
3415 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3416 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3417 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3418 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3419 // CHECK3-NEXT:    call void @_Z3fn2v()
3420 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3421 // CHECK3:       omp.body.continue:
3422 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3423 // CHECK3:       omp.inner.for.inc:
3424 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3425 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3426 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3427 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
3428 // CHECK3:       omp.inner.for.end:
3429 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3430 // CHECK3:       omp.loop.exit:
3431 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3432 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3433 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3434 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3435 // CHECK3:       .omp.final.then:
3436 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3437 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3438 // CHECK3:       .omp.final.done:
3439 // CHECK3-NEXT:    ret void
3440 //
3441 //
3442 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
3443 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
3444 // CHECK3-NEXT:  entry:
3445 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
3446 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3447 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3448 // CHECK3-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
3449 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
3450 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
3451 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
3452 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
3453 // CHECK3-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
3454 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
3455 // CHECK3-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
3456 // CHECK3-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
3457 // CHECK3-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
3458 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined, i64 [[TMP2]])
3459 // CHECK3-NEXT:    ret void
3460 //
3461 //
3462 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined
3463 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3464 // CHECK3-NEXT:  entry:
3465 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3466 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3467 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3468 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3469 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3470 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3471 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3472 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3473 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3474 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3475 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3476 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3477 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3478 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
3479 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3480 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3481 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3482 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3483 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3484 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3485 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3486 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3487 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3488 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3489 // CHECK3:       cond.true:
3490 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3491 // CHECK3:       cond.false:
3492 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3493 // CHECK3-NEXT:    br label [[COND_END]]
3494 // CHECK3:       cond.end:
3495 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3496 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3497 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3498 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3499 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3500 // CHECK3:       omp.inner.for.cond:
3501 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
3502 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3503 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3504 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3505 // CHECK3:       omp.inner.for.body:
3506 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
3507 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3508 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3509 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3510 // CHECK3-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP55]]
3511 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
3512 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3513 // CHECK3:       omp_if.then:
3514 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP55]]
3515 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
3516 // CHECK3:       omp_if.else:
3517 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
3518 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
3519 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
3520 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
3521 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
3522 // CHECK3-NEXT:    br label [[OMP_IF_END]]
3523 // CHECK3:       omp_if.end:
3524 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3525 // CHECK3:       omp.inner.for.inc:
3526 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3527 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
3528 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3529 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3530 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
3531 // CHECK3:       omp.inner.for.end:
3532 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3533 // CHECK3:       omp.loop.exit:
3534 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3535 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3536 // CHECK3-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3537 // CHECK3-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3538 // CHECK3:       .omp.final.then:
3539 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3540 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3541 // CHECK3:       .omp.final.done:
3542 // CHECK3-NEXT:    ret void
3543 //
3544 //
3545 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined
3546 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3547 // CHECK3-NEXT:  entry:
3548 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3549 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3550 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3551 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3552 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3553 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3554 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3555 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3556 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3557 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3558 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3559 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3560 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3561 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3562 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3563 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3564 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3565 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3566 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3567 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3568 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3569 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3570 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3571 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3572 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3573 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3574 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3575 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3576 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3577 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3578 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3579 // CHECK3:       cond.true:
3580 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3581 // CHECK3:       cond.false:
3582 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3583 // CHECK3-NEXT:    br label [[COND_END]]
3584 // CHECK3:       cond.end:
3585 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3586 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3587 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3588 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3589 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3590 // CHECK3:       omp.inner.for.cond:
3591 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
3592 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
3593 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3594 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3595 // CHECK3:       omp.inner.for.body:
3596 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3597 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3598 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3599 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
3600 // CHECK3-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
3601 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3602 // CHECK3:       omp.body.continue:
3603 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3604 // CHECK3:       omp.inner.for.inc:
3605 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3606 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3607 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3608 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
3609 // CHECK3:       omp.inner.for.end:
3610 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3611 // CHECK3:       omp.loop.exit:
3612 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3613 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3614 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3615 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3616 // CHECK3:       .omp.final.then:
3617 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3618 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3619 // CHECK3:       .omp.final.done:
3620 // CHECK3-NEXT:    ret void
3621 //
3622 //
3623 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3624 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3625 // CHECK5-NEXT:  entry:
3626 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3627 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3628 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3629 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3630 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3631 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3632 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3633 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3634 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3635 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3636 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3637 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3638 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3639 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3640 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3641 // CHECK5:       omp.inner.for.cond:
3642 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3643 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3644 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3645 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3646 // CHECK5:       omp.inner.for.body:
3647 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3648 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3649 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3650 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3651 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3652 // CHECK5:       omp.body.continue:
3653 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3654 // CHECK5:       omp.inner.for.inc:
3655 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3656 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3657 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3658 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3659 // CHECK5:       omp.inner.for.end:
3660 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3661 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3662 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3663 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3664 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3665 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3666 // CHECK5:       omp.inner.for.cond7:
3667 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3668 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3669 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3670 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3671 // CHECK5:       omp.inner.for.body9:
3672 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3673 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3674 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3675 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3676 // CHECK5-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3677 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3678 // CHECK5:       omp.body.continue12:
3679 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3680 // CHECK5:       omp.inner.for.inc13:
3681 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3682 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3683 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3684 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3685 // CHECK5:       omp.inner.for.end15:
3686 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3687 // CHECK5-NEXT:    ret void
3688 //
3689 //
3690 // CHECK5-LABEL: define {{[^@]+}}@main
3691 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3692 // CHECK5-NEXT:  entry:
3693 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3694 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3695 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3696 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3697 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3698 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3699 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3700 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3701 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3702 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3703 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3704 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3705 // CHECK5-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3706 // CHECK5-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3707 // CHECK5-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3708 // CHECK5-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3709 // CHECK5-NEXT:    [[I20:%.*]] = alloca i32, align 4
3710 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3711 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3712 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3713 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3714 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3715 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3716 // CHECK5:       omp.inner.for.cond:
3717 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3718 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3719 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3720 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3721 // CHECK5:       omp.inner.for.body:
3722 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3723 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3724 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3725 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3726 // CHECK5-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3727 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3728 // CHECK5:       omp.body.continue:
3729 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3730 // CHECK5:       omp.inner.for.inc:
3731 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3732 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3733 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3734 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3735 // CHECK5:       omp.inner.for.end:
3736 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3737 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3738 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3739 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3740 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3741 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3742 // CHECK5:       omp.inner.for.cond7:
3743 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3744 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
3745 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3746 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3747 // CHECK5:       omp.inner.for.body9:
3748 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3749 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3750 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3751 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
3752 // CHECK5-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
3753 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3754 // CHECK5:       omp.body.continue12:
3755 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3756 // CHECK5:       omp.inner.for.inc13:
3757 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3758 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3759 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3760 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3761 // CHECK5:       omp.inner.for.end15:
3762 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3763 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
3764 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3765 // CHECK5-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
3766 // CHECK5-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
3767 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
3768 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
3769 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
3770 // CHECK5-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
3771 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
3772 // CHECK5:       omp.inner.for.cond21:
3773 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3774 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3775 // CHECK5-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3776 // CHECK5-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3777 // CHECK5:       omp.inner.for.body23:
3778 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3779 // CHECK5-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3780 // CHECK5-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3781 // CHECK5-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3782 // CHECK5-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3783 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
3784 // CHECK5:       omp.body.continue26:
3785 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
3786 // CHECK5:       omp.inner.for.inc27:
3787 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3788 // CHECK5-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3789 // CHECK5-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3790 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
3791 // CHECK5:       omp.inner.for.end29:
3792 // CHECK5-NEXT:    store i32 100, ptr [[I20]], align 4
3793 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr @Arg, align 4
3794 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
3795 // CHECK5-NEXT:    ret i32 [[CALL]]
3796 //
3797 //
3798 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3799 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3800 // CHECK5-NEXT:  entry:
3801 // CHECK5-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
3802 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3803 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3804 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3805 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3806 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3807 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3808 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3809 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3810 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3811 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3812 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3813 // CHECK5-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3814 // CHECK5-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3815 // CHECK5-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3816 // CHECK5-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3817 // CHECK5-NEXT:    [[I20:%.*]] = alloca i32, align 4
3818 // CHECK5-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
3819 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3820 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3821 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3822 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3823 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3824 // CHECK5:       omp.inner.for.cond:
3825 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3826 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3827 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3828 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3829 // CHECK5:       omp.inner.for.body:
3830 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3831 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3832 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3833 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3834 // CHECK5-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3835 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3836 // CHECK5:       omp.body.continue:
3837 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3838 // CHECK5:       omp.inner.for.inc:
3839 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3840 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3841 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3842 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3843 // CHECK5:       omp.inner.for.end:
3844 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3845 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3846 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3847 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3848 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3849 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3850 // CHECK5:       omp.inner.for.cond7:
3851 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3852 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
3853 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3854 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3855 // CHECK5:       omp.inner.for.body9:
3856 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3857 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3858 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3859 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
3860 // CHECK5-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
3861 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3862 // CHECK5:       omp.body.continue12:
3863 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3864 // CHECK5:       omp.inner.for.inc13:
3865 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3866 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3867 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3868 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
3869 // CHECK5:       omp.inner.for.end15:
3870 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3871 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
3872 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3873 // CHECK5-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
3874 // CHECK5-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
3875 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
3876 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
3877 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
3878 // CHECK5-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
3879 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
3880 // CHECK5:       omp.inner.for.cond21:
3881 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3882 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
3883 // CHECK5-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3884 // CHECK5-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3885 // CHECK5:       omp.inner.for.body23:
3886 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3887 // CHECK5-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3888 // CHECK5-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3889 // CHECK5-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
3890 // CHECK5-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
3891 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
3892 // CHECK5:       omp.body.continue26:
3893 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
3894 // CHECK5:       omp.inner.for.inc27:
3895 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3896 // CHECK5-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3897 // CHECK5-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3898 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
3899 // CHECK5:       omp.inner.for.end29:
3900 // CHECK5-NEXT:    store i32 100, ptr [[I20]], align 4
3901 // CHECK5-NEXT:    ret i32 0
3902 //
3903 //
3904 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
3905 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3906 // CHECK7-NEXT:  entry:
3907 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3908 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3909 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3910 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3911 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3912 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3913 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3914 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3915 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3916 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
3917 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3918 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3919 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3920 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3921 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3922 // CHECK7:       omp.inner.for.cond:
3923 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3924 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3925 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3926 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3927 // CHECK7:       omp.inner.for.body:
3928 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3929 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3930 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3931 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3932 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3933 // CHECK7:       omp.body.continue:
3934 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3935 // CHECK7:       omp.inner.for.inc:
3936 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3937 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3938 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3939 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3940 // CHECK7:       omp.inner.for.end:
3941 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
3942 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3943 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3944 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3945 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3946 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3947 // CHECK7:       omp.inner.for.cond7:
3948 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3949 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3950 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3951 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3952 // CHECK7:       omp.inner.for.body9:
3953 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3954 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3955 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3956 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3957 // CHECK7-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3958 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3959 // CHECK7:       omp.body.continue12:
3960 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3961 // CHECK7:       omp.inner.for.inc13:
3962 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3963 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3964 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3965 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3966 // CHECK7:       omp.inner.for.end15:
3967 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
3968 // CHECK7-NEXT:    ret void
3969 //
3970 //
3971 // CHECK7-LABEL: define {{[^@]+}}@main
3972 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
3973 // CHECK7-NEXT:  entry:
3974 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3975 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3976 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3977 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3978 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3979 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3980 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3981 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3982 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3983 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3984 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
3985 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3986 // CHECK7-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3987 // CHECK7-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3988 // CHECK7-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3989 // CHECK7-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3990 // CHECK7-NEXT:    [[I20:%.*]] = alloca i32, align 4
3991 // CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3992 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3993 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3994 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3995 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3996 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3997 // CHECK7:       omp.inner.for.cond:
3998 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3999 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4000 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4001 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4002 // CHECK7:       omp.inner.for.body:
4003 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4004 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4005 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4006 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
4007 // CHECK7-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
4008 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4009 // CHECK7:       omp.body.continue:
4010 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4011 // CHECK7:       omp.inner.for.inc:
4012 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4013 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4014 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4015 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4016 // CHECK7:       omp.inner.for.end:
4017 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
4018 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
4019 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
4020 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
4021 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
4022 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
4023 // CHECK7:       omp.inner.for.cond7:
4024 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4025 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
4026 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4027 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
4028 // CHECK7:       omp.inner.for.body9:
4029 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4030 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4031 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4032 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
4033 // CHECK7-NEXT:    call void @_Z3fn5v()
4034 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
4035 // CHECK7:       omp.body.continue12:
4036 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
4037 // CHECK7:       omp.inner.for.inc13:
4038 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4039 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4040 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
4041 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
4042 // CHECK7:       omp.inner.for.end15:
4043 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
4044 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
4045 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
4046 // CHECK7-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
4047 // CHECK7-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
4048 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
4049 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
4050 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
4051 // CHECK7-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
4052 // CHECK7-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
4053 // CHECK7-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
4054 // CHECK7-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4055 // CHECK7:       omp_if.then:
4056 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
4057 // CHECK7:       omp.inner.for.cond21:
4058 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
4059 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
4060 // CHECK7-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4061 // CHECK7-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4062 // CHECK7:       omp.inner.for.body23:
4063 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
4064 // CHECK7-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1
4065 // CHECK7-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4066 // CHECK7-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
4067 // CHECK7-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
4068 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
4069 // CHECK7:       omp.body.continue26:
4070 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
4071 // CHECK7:       omp.inner.for.inc27:
4072 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
4073 // CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1
4074 // CHECK7-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
4075 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]
4076 // CHECK7:       omp.inner.for.end29:
4077 // CHECK7-NEXT:    br label [[OMP_IF_END:%.*]]
4078 // CHECK7:       omp_if.else:
4079 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND30:%.*]]
4080 // CHECK7:       omp.inner.for.cond30:
4081 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4082 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4
4083 // CHECK7-NEXT:    [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
4084 // CHECK7-NEXT:    br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
4085 // CHECK7:       omp.inner.for.body32:
4086 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4087 // CHECK7-NEXT:    [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1
4088 // CHECK7-NEXT:    [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]
4089 // CHECK7-NEXT:    store i32 [[ADD34]], ptr [[I20]], align 4
4090 // CHECK7-NEXT:    call void @_Z3fn6v()
4091 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE35:%.*]]
4092 // CHECK7:       omp.body.continue35:
4093 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC36:%.*]]
4094 // CHECK7:       omp.inner.for.inc36:
4095 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4096 // CHECK7-NEXT:    [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1
4097 // CHECK7-NEXT:    store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4
4098 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]
4099 // CHECK7:       omp.inner.for.end38:
4100 // CHECK7-NEXT:    br label [[OMP_IF_END]]
4101 // CHECK7:       omp_if.end:
4102 // CHECK7-NEXT:    store i32 100, ptr [[I20]], align 4
4103 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32, ptr @Arg, align 4
4104 // CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
4105 // CHECK7-NEXT:    ret i32 [[CALL]]
4106 //
4107 //
4108 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
4109 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
4110 // CHECK7-NEXT:  entry:
4111 // CHECK7-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
4112 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4113 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4114 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4115 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4116 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4117 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4118 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4119 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4120 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4121 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
4122 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4123 // CHECK7-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
4124 // CHECK7-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
4125 // CHECK7-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
4126 // CHECK7-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
4127 // CHECK7-NEXT:    [[I20:%.*]] = alloca i32, align 4
4128 // CHECK7-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
4129 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4130 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4131 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4132 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
4133 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4134 // CHECK7:       omp.inner.for.cond:
4135 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
4136 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
4137 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4138 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4139 // CHECK7:       omp.inner.for.body:
4140 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4141 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4142 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4143 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
4144 // CHECK7-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
4145 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4146 // CHECK7:       omp.body.continue:
4147 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4148 // CHECK7:       omp.inner.for.inc:
4149 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4150 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4151 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4152 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4153 // CHECK7:       omp.inner.for.end:
4154 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
4155 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
4156 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
4157 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
4158 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
4159 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
4160 // CHECK7:       omp.inner.for.cond7:
4161 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4162 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
4163 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4164 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
4165 // CHECK7:       omp.inner.for.body9:
4166 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4167 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4168 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4169 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
4170 // CHECK7-NEXT:    call void @_Z3fn2v()
4171 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
4172 // CHECK7:       omp.body.continue12:
4173 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
4174 // CHECK7:       omp.inner.for.inc13:
4175 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4176 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4177 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
4178 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
4179 // CHECK7:       omp.inner.for.end15:
4180 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
4181 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
4182 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
4183 // CHECK7-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
4184 // CHECK7-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
4185 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
4186 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
4187 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
4188 // CHECK7-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
4189 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
4190 // CHECK7:       omp.inner.for.cond21:
4191 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
4192 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
4193 // CHECK7-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4194 // CHECK7-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4195 // CHECK7:       omp.inner.for.body23:
4196 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4197 // CHECK7-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
4198 // CHECK7-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4199 // CHECK7-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
4200 // CHECK7-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
4201 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
4202 // CHECK7:       omp.body.continue26:
4203 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
4204 // CHECK7:       omp.inner.for.inc27:
4205 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4206 // CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
4207 // CHECK7-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4208 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
4209 // CHECK7:       omp.inner.for.end29:
4210 // CHECK7-NEXT:    store i32 100, ptr [[I20]], align 4
4211 // CHECK7-NEXT:    ret i32 0
4212 //
4213 //
4214 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
4215 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4216 // CHECK9-NEXT:  entry:
4217 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4218 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4219 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4220 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4221 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4222 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
4223 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4224 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
4225 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4226 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
4227 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4228 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
4229 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4230 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
4231 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4232 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
4233 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4234 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
4235 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4236 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
4237 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4238 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
4239 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4240 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
4241 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4242 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4243 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4244 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4245 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4246 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
4247 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
4248 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4249 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4250 // CHECK9:       omp_offload.failed:
4251 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
4252 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4253 // CHECK9:       omp_offload.cont:
4254 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4255 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
4256 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4257 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
4258 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4259 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
4260 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4261 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
4262 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4263 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
4264 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4265 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
4266 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4267 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
4268 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4269 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
4270 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4271 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
4272 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4273 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
4274 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4275 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4276 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4277 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
4278 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4279 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
4280 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS2]])
4281 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4282 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4283 // CHECK9:       omp_offload.failed3:
4284 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
4285 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4286 // CHECK9:       omp_offload.cont4:
4287 // CHECK9-NEXT:    ret void
4288 //
4289 //
4290 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
4291 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
4292 // CHECK9-NEXT:  entry:
4293 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
4294 // CHECK9-NEXT:    ret void
4295 //
4296 //
4297 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
4298 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4299 // CHECK9-NEXT:  entry:
4300 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4301 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4302 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4303 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4304 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4305 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4306 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4307 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4308 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4309 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4310 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4311 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4312 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4313 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4314 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4315 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4316 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4317 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4318 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4319 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4320 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4321 // CHECK9:       cond.true:
4322 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4323 // CHECK9:       cond.false:
4324 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4325 // CHECK9-NEXT:    br label [[COND_END]]
4326 // CHECK9:       cond.end:
4327 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4328 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4329 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4330 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4331 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4332 // CHECK9:       omp.inner.for.cond:
4333 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4334 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4335 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4336 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4337 // CHECK9:       omp.inner.for.body:
4338 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
4339 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4340 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4341 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4342 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
4343 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4344 // CHECK9:       omp.inner.for.inc:
4345 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4346 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
4347 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4348 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4349 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4350 // CHECK9:       omp.inner.for.end:
4351 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4352 // CHECK9:       omp.loop.exit:
4353 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4354 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4355 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4356 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4357 // CHECK9:       .omp.final.then:
4358 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4359 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4360 // CHECK9:       .omp.final.done:
4361 // CHECK9-NEXT:    ret void
4362 //
4363 //
4364 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
4365 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4366 // CHECK9-NEXT:  entry:
4367 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4368 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4369 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4370 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4371 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4372 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4373 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4374 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4375 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4376 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4377 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4378 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4379 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4380 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4381 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4382 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4383 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4384 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4385 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4386 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4387 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4388 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4389 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4390 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4391 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4392 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4393 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4394 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4395 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4396 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4397 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4398 // CHECK9:       cond.true:
4399 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4400 // CHECK9:       cond.false:
4401 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4402 // CHECK9-NEXT:    br label [[COND_END]]
4403 // CHECK9:       cond.end:
4404 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4405 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4406 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4407 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4408 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4409 // CHECK9:       omp.inner.for.cond:
4410 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
4411 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
4412 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4413 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4414 // CHECK9:       omp.inner.for.body:
4415 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4416 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4417 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4418 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
4419 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4420 // CHECK9:       omp.body.continue:
4421 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4422 // CHECK9:       omp.inner.for.inc:
4423 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4424 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4425 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4426 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4427 // CHECK9:       omp.inner.for.end:
4428 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4429 // CHECK9:       omp.loop.exit:
4430 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4431 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4432 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4433 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4434 // CHECK9:       .omp.final.then:
4435 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4436 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4437 // CHECK9:       .omp.final.done:
4438 // CHECK9-NEXT:    ret void
4439 //
4440 //
4441 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
4442 // CHECK9-SAME: () #[[ATTR1]] {
4443 // CHECK9-NEXT:  entry:
4444 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined)
4445 // CHECK9-NEXT:    ret void
4446 //
4447 //
4448 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined
4449 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4450 // CHECK9-NEXT:  entry:
4451 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4452 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4453 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4454 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4455 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4456 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4457 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4458 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4459 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4460 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4461 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4462 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4463 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4464 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4465 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4466 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4467 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4468 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4469 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4470 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4471 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4472 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4473 // CHECK9:       cond.true:
4474 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4475 // CHECK9:       cond.false:
4476 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4477 // CHECK9-NEXT:    br label [[COND_END]]
4478 // CHECK9:       cond.end:
4479 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4480 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4481 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4482 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4483 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4484 // CHECK9:       omp.inner.for.cond:
4485 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
4486 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4487 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4488 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4489 // CHECK9:       omp.inner.for.body:
4490 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
4491 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4492 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4493 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4494 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4495 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
4496 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
4497 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
4498 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4499 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4500 // CHECK9:       omp.inner.for.inc:
4501 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4502 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
4503 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4504 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4505 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
4506 // CHECK9:       omp.inner.for.end:
4507 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4508 // CHECK9:       omp.loop.exit:
4509 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4510 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4511 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4512 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4513 // CHECK9:       .omp.final.then:
4514 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4515 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4516 // CHECK9:       .omp.final.done:
4517 // CHECK9-NEXT:    ret void
4518 //
4519 //
4520 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined
4521 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4522 // CHECK9-NEXT:  entry:
4523 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4524 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4525 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4526 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4527 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4528 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4529 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4530 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4531 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4532 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4533 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4534 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4535 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4536 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4537 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4538 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4539 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4540 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4541 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4542 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4543 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4544 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4545 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4546 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4547 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4548 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4549 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4550 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4551 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4552 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4553 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4554 // CHECK9:       cond.true:
4555 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4556 // CHECK9:       cond.false:
4557 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4558 // CHECK9-NEXT:    br label [[COND_END]]
4559 // CHECK9:       cond.end:
4560 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4561 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4562 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4563 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4564 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4565 // CHECK9:       omp.inner.for.cond:
4566 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
4567 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
4568 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4569 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4570 // CHECK9:       omp.inner.for.body:
4571 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4572 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4573 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4574 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
4575 // CHECK9-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
4576 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4577 // CHECK9:       omp.body.continue:
4578 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4579 // CHECK9:       omp.inner.for.inc:
4580 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4581 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4582 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4583 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
4584 // CHECK9:       omp.inner.for.end:
4585 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4586 // CHECK9:       omp.loop.exit:
4587 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4588 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4589 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4590 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4591 // CHECK9:       .omp.final.then:
4592 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4593 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4594 // CHECK9:       .omp.final.done:
4595 // CHECK9-NEXT:    ret void
4596 //
4597 //
4598 // CHECK9-LABEL: define {{[^@]+}}@main
4599 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4600 // CHECK9-NEXT:  entry:
4601 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4602 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4603 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4604 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4605 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4606 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
4607 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
4608 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
4609 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
4610 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4611 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
4612 // CHECK9-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4613 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
4614 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4615 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
4616 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4617 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
4618 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4619 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
4620 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4621 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
4622 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4623 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
4624 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4625 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
4626 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4627 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
4628 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4629 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
4630 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4631 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
4632 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4633 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
4634 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4635 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4636 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4637 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4638 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4639 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
4640 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, ptr [[KERNEL_ARGS]])
4641 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4642 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4643 // CHECK9:       omp_offload.failed:
4644 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
4645 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4646 // CHECK9:       omp_offload.cont:
4647 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4648 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
4649 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4650 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
4651 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4652 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
4653 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4654 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
4655 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4656 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
4657 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4658 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
4659 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4660 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
4661 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4662 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
4663 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4664 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
4665 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4666 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
4667 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4668 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4669 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4670 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
4671 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4672 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
4673 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, ptr [[KERNEL_ARGS2]])
4674 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4675 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4676 // CHECK9:       omp_offload.failed3:
4677 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
4678 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4679 // CHECK9:       omp_offload.cont4:
4680 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
4681 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
4682 // CHECK9-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
4683 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4684 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
4685 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4686 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
4687 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4688 // CHECK9-NEXT:    store ptr null, ptr [[TMP34]], align 8
4689 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4690 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4691 // CHECK9-NEXT:    [[TMP37:%.*]] = load i32, ptr @Arg, align 4
4692 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
4693 // CHECK9-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
4694 // CHECK9-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
4695 // CHECK9-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
4696 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
4697 // CHECK9-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
4698 // CHECK9-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
4699 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
4700 // CHECK9-NEXT:    store i32 3, ptr [[TMP41]], align 4
4701 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
4702 // CHECK9-NEXT:    store i32 1, ptr [[TMP42]], align 4
4703 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
4704 // CHECK9-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
4705 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
4706 // CHECK9-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
4707 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
4708 // CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP45]], align 8
4709 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
4710 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP46]], align 8
4711 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
4712 // CHECK9-NEXT:    store ptr null, ptr [[TMP47]], align 8
4713 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
4714 // CHECK9-NEXT:    store ptr null, ptr [[TMP48]], align 8
4715 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
4716 // CHECK9-NEXT:    store i64 100, ptr [[TMP49]], align 8
4717 // CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
4718 // CHECK9-NEXT:    store i64 0, ptr [[TMP50]], align 8
4719 // CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
4720 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
4721 // CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
4722 // CHECK9-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
4723 // CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
4724 // CHECK9-NEXT:    store i32 0, ptr [[TMP53]], align 4
4725 // CHECK9-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS6]])
4726 // CHECK9-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
4727 // CHECK9-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4728 // CHECK9:       omp_offload.failed7:
4729 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP31]]) #[[ATTR2]]
4730 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4731 // CHECK9:       omp_offload.cont8:
4732 // CHECK9-NEXT:    [[TMP56:%.*]] = load i32, ptr @Arg, align 4
4733 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP56]])
4734 // CHECK9-NEXT:    ret i32 [[CALL]]
4735 //
4736 //
4737 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
4738 // CHECK9-SAME: () #[[ATTR1]] {
4739 // CHECK9-NEXT:  entry:
4740 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined)
4741 // CHECK9-NEXT:    ret void
4742 //
4743 //
4744 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined
4745 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4746 // CHECK9-NEXT:  entry:
4747 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4748 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4749 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4750 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4751 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4752 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4753 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4754 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4755 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4756 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4757 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4758 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4759 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4760 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4761 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4762 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4763 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4764 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4765 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4766 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4767 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4768 // CHECK9:       cond.true:
4769 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4770 // CHECK9:       cond.false:
4771 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4772 // CHECK9-NEXT:    br label [[COND_END]]
4773 // CHECK9:       cond.end:
4774 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4775 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4776 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4777 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4778 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4779 // CHECK9:       omp.inner.for.cond:
4780 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
4781 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4782 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4783 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4784 // CHECK9:       omp.inner.for.body:
4785 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
4786 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4787 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4788 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4789 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
4790 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4791 // CHECK9:       omp.inner.for.inc:
4792 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4793 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
4794 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4795 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4796 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
4797 // CHECK9:       omp.inner.for.end:
4798 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4799 // CHECK9:       omp.loop.exit:
4800 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4801 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4802 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4803 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4804 // CHECK9:       .omp.final.then:
4805 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4806 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4807 // CHECK9:       .omp.final.done:
4808 // CHECK9-NEXT:    ret void
4809 //
4810 //
4811 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined
4812 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4813 // CHECK9-NEXT:  entry:
4814 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4815 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4816 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4817 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4818 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4819 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4820 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4821 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4822 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4823 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4824 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4825 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4826 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4827 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4828 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4829 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4830 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4831 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4832 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4833 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4834 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4835 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4836 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4837 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4838 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4839 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4840 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4841 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4842 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4843 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4844 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4845 // CHECK9:       cond.true:
4846 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4847 // CHECK9:       cond.false:
4848 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4849 // CHECK9-NEXT:    br label [[COND_END]]
4850 // CHECK9:       cond.end:
4851 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4852 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4853 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4854 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4855 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4856 // CHECK9:       omp.inner.for.cond:
4857 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
4858 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
4859 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4860 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4861 // CHECK9:       omp.inner.for.body:
4862 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4863 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4864 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4865 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
4866 // CHECK9-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
4867 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4868 // CHECK9:       omp.body.continue:
4869 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4870 // CHECK9:       omp.inner.for.inc:
4871 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4872 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4873 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4874 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
4875 // CHECK9:       omp.inner.for.end:
4876 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4877 // CHECK9:       omp.loop.exit:
4878 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4879 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4880 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4881 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4882 // CHECK9:       .omp.final.then:
4883 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4884 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4885 // CHECK9:       .omp.final.done:
4886 // CHECK9-NEXT:    ret void
4887 //
4888 //
4889 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
4890 // CHECK9-SAME: () #[[ATTR1]] {
4891 // CHECK9-NEXT:  entry:
4892 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined)
4893 // CHECK9-NEXT:    ret void
4894 //
4895 //
4896 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined
4897 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4898 // CHECK9-NEXT:  entry:
4899 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4900 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4901 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4902 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4903 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4904 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4905 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4906 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4907 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4908 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4909 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4910 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4911 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4912 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4913 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4914 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4915 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4916 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4917 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4918 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4919 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4920 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4921 // CHECK9:       cond.true:
4922 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4923 // CHECK9:       cond.false:
4924 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4925 // CHECK9-NEXT:    br label [[COND_END]]
4926 // CHECK9:       cond.end:
4927 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4928 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4929 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4930 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4931 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4932 // CHECK9:       omp.inner.for.cond:
4933 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
4934 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4935 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4936 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4937 // CHECK9:       omp.inner.for.body:
4938 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
4939 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4940 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4941 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4942 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4943 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
4944 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
4945 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
4946 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4947 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4948 // CHECK9:       omp.inner.for.inc:
4949 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4950 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
4951 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4952 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4953 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
4954 // CHECK9:       omp.inner.for.end:
4955 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4956 // CHECK9:       omp.loop.exit:
4957 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4958 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4959 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4960 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4961 // CHECK9:       .omp.final.then:
4962 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4963 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4964 // CHECK9:       .omp.final.done:
4965 // CHECK9-NEXT:    ret void
4966 //
4967 //
4968 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined
4969 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4970 // CHECK9-NEXT:  entry:
4971 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4972 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4973 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4974 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4975 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4976 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4977 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4978 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4979 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4980 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4981 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4982 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4983 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4984 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4985 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4986 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4987 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4988 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4989 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4990 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4991 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4992 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4993 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4994 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4995 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4996 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4997 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4998 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4999 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5000 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5001 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5002 // CHECK9:       cond.true:
5003 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5004 // CHECK9:       cond.false:
5005 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5006 // CHECK9-NEXT:    br label [[COND_END]]
5007 // CHECK9:       cond.end:
5008 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5009 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5010 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5011 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5012 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5013 // CHECK9:       omp.inner.for.cond:
5014 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
5015 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
5016 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5017 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5018 // CHECK9:       omp.inner.for.body:
5019 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
5020 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5021 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5022 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
5023 // CHECK9-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
5024 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5025 // CHECK9:       omp.body.continue:
5026 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5027 // CHECK9:       omp.inner.for.inc:
5028 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
5029 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5030 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
5031 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
5032 // CHECK9:       omp.inner.for.end:
5033 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5034 // CHECK9:       omp.loop.exit:
5035 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5036 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5037 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5038 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5039 // CHECK9:       .omp.final.then:
5040 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5041 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5042 // CHECK9:       .omp.final.done:
5043 // CHECK9-NEXT:    ret void
5044 //
5045 //
5046 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
5047 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5048 // CHECK9-NEXT:  entry:
5049 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
5050 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5051 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5052 // CHECK9-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
5053 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
5054 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5055 // CHECK9-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
5056 // CHECK9-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
5057 // CHECK9-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
5058 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
5059 // CHECK9-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
5060 // CHECK9-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
5061 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5062 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP2]])
5063 // CHECK9-NEXT:    ret void
5064 //
5065 //
5066 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined
5067 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5068 // CHECK9-NEXT:  entry:
5069 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5070 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5071 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5072 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5073 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5074 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5075 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5076 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5077 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5078 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5079 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5080 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5081 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5082 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5083 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5084 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5085 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5086 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5087 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5088 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5089 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5090 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5091 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5092 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5093 // CHECK9:       cond.true:
5094 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5095 // CHECK9:       cond.false:
5096 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5097 // CHECK9-NEXT:    br label [[COND_END]]
5098 // CHECK9:       cond.end:
5099 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5100 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5101 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5102 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5103 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5104 // CHECK9:       omp.inner.for.cond:
5105 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
5106 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
5107 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5108 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5109 // CHECK9:       omp.inner.for.body:
5110 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
5111 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5112 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
5113 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5114 // CHECK9-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP38]]
5115 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
5116 // CHECK9-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5117 // CHECK9:       omp_if.then:
5118 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP38]]
5119 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
5120 // CHECK9:       omp_if.else:
5121 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
5122 // CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
5123 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
5124 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
5125 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
5126 // CHECK9-NEXT:    br label [[OMP_IF_END]]
5127 // CHECK9:       omp_if.end:
5128 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5129 // CHECK9:       omp.inner.for.inc:
5130 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5131 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
5132 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5133 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5134 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
5135 // CHECK9:       omp.inner.for.end:
5136 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5137 // CHECK9:       omp.loop.exit:
5138 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5139 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5140 // CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5141 // CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5142 // CHECK9:       .omp.final.then:
5143 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5144 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5145 // CHECK9:       .omp.final.done:
5146 // CHECK9-NEXT:    ret void
5147 //
5148 //
5149 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined
5150 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5151 // CHECK9-NEXT:  entry:
5152 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5153 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5154 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5155 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5156 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5157 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5158 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5159 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5160 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5161 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5162 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5163 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5164 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5165 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5166 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5167 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5168 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5169 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5170 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5171 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5172 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5173 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5174 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5175 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5176 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5177 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5178 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5179 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5180 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5181 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5182 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5183 // CHECK9:       cond.true:
5184 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5185 // CHECK9:       cond.false:
5186 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5187 // CHECK9-NEXT:    br label [[COND_END]]
5188 // CHECK9:       cond.end:
5189 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5190 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5191 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5192 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5193 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5194 // CHECK9:       omp.inner.for.cond:
5195 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
5196 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
5197 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5198 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5199 // CHECK9:       omp.inner.for.body:
5200 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5201 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5202 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5203 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
5204 // CHECK9-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
5205 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5206 // CHECK9:       omp.body.continue:
5207 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5208 // CHECK9:       omp.inner.for.inc:
5209 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5210 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5211 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5212 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
5213 // CHECK9:       omp.inner.for.end:
5214 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5215 // CHECK9:       omp.loop.exit:
5216 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5217 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5218 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5219 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5220 // CHECK9:       .omp.final.then:
5221 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5222 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5223 // CHECK9:       .omp.final.done:
5224 // CHECK9-NEXT:    ret void
5225 //
5226 //
5227 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5228 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
5229 // CHECK9-NEXT:  entry:
5230 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
5231 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5232 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5233 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
5234 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5235 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
5236 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
5237 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
5238 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
5239 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5240 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
5241 // CHECK9-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5242 // CHECK9-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
5243 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5244 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
5245 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5246 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
5247 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5248 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
5249 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5250 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
5251 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5252 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
5253 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5254 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
5255 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5256 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
5257 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5258 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
5259 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5260 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
5261 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5262 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
5263 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5264 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
5265 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5266 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
5267 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5268 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
5269 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, ptr [[KERNEL_ARGS]])
5270 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5271 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5272 // CHECK9:       omp_offload.failed:
5273 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
5274 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5275 // CHECK9:       omp_offload.cont:
5276 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
5277 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
5278 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
5279 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
5280 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
5281 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
5282 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
5283 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
5284 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
5285 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
5286 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
5287 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
5288 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
5289 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
5290 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
5291 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
5292 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
5293 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
5294 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
5295 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
5296 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
5297 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
5298 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
5299 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
5300 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
5301 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
5302 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS2]])
5303 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5304 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5305 // CHECK9:       omp_offload.failed3:
5306 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
5307 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
5308 // CHECK9:       omp_offload.cont4:
5309 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
5310 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
5311 // CHECK9-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
5312 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5313 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
5314 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5315 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
5316 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5317 // CHECK9-NEXT:    store ptr null, ptr [[TMP34]], align 8
5318 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5319 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5320 // CHECK9-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
5321 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
5322 // CHECK9-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
5323 // CHECK9-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
5324 // CHECK9-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
5325 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
5326 // CHECK9-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
5327 // CHECK9-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
5328 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
5329 // CHECK9-NEXT:    store i32 3, ptr [[TMP41]], align 4
5330 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
5331 // CHECK9-NEXT:    store i32 1, ptr [[TMP42]], align 4
5332 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
5333 // CHECK9-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
5334 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
5335 // CHECK9-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
5336 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
5337 // CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP45]], align 8
5338 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
5339 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP46]], align 8
5340 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
5341 // CHECK9-NEXT:    store ptr null, ptr [[TMP47]], align 8
5342 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
5343 // CHECK9-NEXT:    store ptr null, ptr [[TMP48]], align 8
5344 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
5345 // CHECK9-NEXT:    store i64 100, ptr [[TMP49]], align 8
5346 // CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
5347 // CHECK9-NEXT:    store i64 0, ptr [[TMP50]], align 8
5348 // CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
5349 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
5350 // CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
5351 // CHECK9-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
5352 // CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
5353 // CHECK9-NEXT:    store i32 0, ptr [[TMP53]], align 4
5354 // CHECK9-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, ptr [[KERNEL_ARGS6]])
5355 // CHECK9-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
5356 // CHECK9-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5357 // CHECK9:       omp_offload.failed7:
5358 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP31]]) #[[ATTR2]]
5359 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
5360 // CHECK9:       omp_offload.cont8:
5361 // CHECK9-NEXT:    ret i32 0
5362 //
5363 //
5364 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
5365 // CHECK9-SAME: () #[[ATTR1]] {
5366 // CHECK9-NEXT:  entry:
5367 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined)
5368 // CHECK9-NEXT:    ret void
5369 //
5370 //
5371 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined
5372 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5373 // CHECK9-NEXT:  entry:
5374 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5375 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5376 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5377 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5378 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5379 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5380 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5381 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5382 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5383 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5384 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5385 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5386 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5387 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5388 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5389 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5390 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5391 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5392 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5393 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5394 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5395 // CHECK9:       cond.true:
5396 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5397 // CHECK9:       cond.false:
5398 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5399 // CHECK9-NEXT:    br label [[COND_END]]
5400 // CHECK9:       cond.end:
5401 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5402 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5403 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5404 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5405 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5406 // CHECK9:       omp.inner.for.cond:
5407 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
5408 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5409 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5410 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5411 // CHECK9:       omp.inner.for.body:
5412 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
5413 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5414 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5415 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5416 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
5417 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5418 // CHECK9:       omp.inner.for.inc:
5419 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5420 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
5421 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5422 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5423 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
5424 // CHECK9:       omp.inner.for.end:
5425 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5426 // CHECK9:       omp.loop.exit:
5427 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5428 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5429 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5430 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5431 // CHECK9:       .omp.final.then:
5432 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5433 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5434 // CHECK9:       .omp.final.done:
5435 // CHECK9-NEXT:    ret void
5436 //
5437 //
5438 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined
5439 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5440 // CHECK9-NEXT:  entry:
5441 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5442 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5443 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5444 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5445 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5446 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5447 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5448 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5449 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5450 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5451 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5452 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5453 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5454 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5455 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5456 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5457 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5458 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5459 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5460 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5461 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5462 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5463 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5464 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5465 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5466 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5467 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5468 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5469 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5470 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5471 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5472 // CHECK9:       cond.true:
5473 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5474 // CHECK9:       cond.false:
5475 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5476 // CHECK9-NEXT:    br label [[COND_END]]
5477 // CHECK9:       cond.end:
5478 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5479 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5480 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5481 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5482 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5483 // CHECK9:       omp.inner.for.cond:
5484 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
5485 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
5486 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5487 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5488 // CHECK9:       omp.inner.for.body:
5489 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5490 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5491 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5492 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
5493 // CHECK9-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
5494 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5495 // CHECK9:       omp.body.continue:
5496 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5497 // CHECK9:       omp.inner.for.inc:
5498 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5499 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5500 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5501 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
5502 // CHECK9:       omp.inner.for.end:
5503 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5504 // CHECK9:       omp.loop.exit:
5505 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5506 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5507 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5508 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5509 // CHECK9:       .omp.final.then:
5510 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5511 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5512 // CHECK9:       .omp.final.done:
5513 // CHECK9-NEXT:    ret void
5514 //
5515 //
5516 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5517 // CHECK9-SAME: () #[[ATTR1]] {
5518 // CHECK9-NEXT:  entry:
5519 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined)
5520 // CHECK9-NEXT:    ret void
5521 //
5522 //
5523 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined
5524 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5525 // CHECK9-NEXT:  entry:
5526 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5527 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5528 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5529 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5530 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5531 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5532 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5533 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5534 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5535 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5536 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5537 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5538 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5539 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5540 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5541 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5542 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5543 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5544 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5545 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5546 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5547 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5548 // CHECK9:       cond.true:
5549 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5550 // CHECK9:       cond.false:
5551 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5552 // CHECK9-NEXT:    br label [[COND_END]]
5553 // CHECK9:       cond.end:
5554 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5555 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5556 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5557 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5558 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5559 // CHECK9:       omp.inner.for.cond:
5560 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
5561 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5562 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5563 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5564 // CHECK9:       omp.inner.for.body:
5565 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
5566 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5567 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5568 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5569 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5570 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
5571 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
5572 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
5573 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5574 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5575 // CHECK9:       omp.inner.for.inc:
5576 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5577 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
5578 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5579 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5580 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
5581 // CHECK9:       omp.inner.for.end:
5582 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5583 // CHECK9:       omp.loop.exit:
5584 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5585 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5586 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5587 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5588 // CHECK9:       .omp.final.then:
5589 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5590 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5591 // CHECK9:       .omp.final.done:
5592 // CHECK9-NEXT:    ret void
5593 //
5594 //
5595 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined
5596 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5597 // CHECK9-NEXT:  entry:
5598 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5599 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5600 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5601 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5602 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5603 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5604 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5605 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5606 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5607 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5608 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5609 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5610 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5611 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5612 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5613 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5614 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5615 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5616 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5617 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5618 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5619 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5620 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5621 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5622 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5623 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5624 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5625 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5626 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5627 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5628 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5629 // CHECK9:       cond.true:
5630 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5631 // CHECK9:       cond.false:
5632 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5633 // CHECK9-NEXT:    br label [[COND_END]]
5634 // CHECK9:       cond.end:
5635 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5636 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5637 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5638 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5639 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5640 // CHECK9:       omp.inner.for.cond:
5641 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
5642 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
5643 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5644 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5645 // CHECK9:       omp.inner.for.body:
5646 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5647 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5648 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5649 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
5650 // CHECK9-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
5651 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5652 // CHECK9:       omp.body.continue:
5653 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5654 // CHECK9:       omp.inner.for.inc:
5655 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5656 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5657 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5658 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
5659 // CHECK9:       omp.inner.for.end:
5660 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5661 // CHECK9:       omp.loop.exit:
5662 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5663 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5664 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5665 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5666 // CHECK9:       .omp.final.then:
5667 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5668 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5669 // CHECK9:       .omp.final.done:
5670 // CHECK9-NEXT:    ret void
5671 //
5672 //
5673 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
5674 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5675 // CHECK9-NEXT:  entry:
5676 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
5677 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5678 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5679 // CHECK9-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
5680 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
5681 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5682 // CHECK9-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
5683 // CHECK9-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
5684 // CHECK9-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
5685 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
5686 // CHECK9-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
5687 // CHECK9-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
5688 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5689 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined, i64 [[TMP2]])
5690 // CHECK9-NEXT:    ret void
5691 //
5692 //
5693 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined
5694 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5695 // CHECK9-NEXT:  entry:
5696 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5697 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5698 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5699 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5700 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5701 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5702 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5703 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5704 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5705 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5706 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5707 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5708 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5709 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5710 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5711 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5712 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5713 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5714 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5715 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5716 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5717 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5718 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5719 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5720 // CHECK9:       cond.true:
5721 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5722 // CHECK9:       cond.false:
5723 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5724 // CHECK9-NEXT:    br label [[COND_END]]
5725 // CHECK9:       cond.end:
5726 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5727 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5728 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5729 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5730 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5731 // CHECK9:       omp.inner.for.cond:
5732 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
5733 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5734 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5735 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5736 // CHECK9:       omp.inner.for.body:
5737 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
5738 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5739 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5740 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5741 // CHECK9-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP56]]
5742 // CHECK9-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
5743 // CHECK9-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5744 // CHECK9:       omp_if.then:
5745 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP56]]
5746 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
5747 // CHECK9:       omp_if.else:
5748 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
5749 // CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
5750 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
5751 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
5752 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
5753 // CHECK9-NEXT:    br label [[OMP_IF_END]]
5754 // CHECK9:       omp_if.end:
5755 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5756 // CHECK9:       omp.inner.for.inc:
5757 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5758 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
5759 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5760 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5761 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
5762 // CHECK9:       omp.inner.for.end:
5763 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5764 // CHECK9:       omp.loop.exit:
5765 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5766 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5767 // CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5768 // CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5769 // CHECK9:       .omp.final.then:
5770 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5771 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5772 // CHECK9:       .omp.final.done:
5773 // CHECK9-NEXT:    ret void
5774 //
5775 //
5776 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined
5777 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5778 // CHECK9-NEXT:  entry:
5779 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5780 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5781 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5782 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5783 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5784 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5785 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5786 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5787 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5788 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5789 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5790 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5791 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5792 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5793 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5794 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5795 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5796 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5797 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5798 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5799 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5800 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5801 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5802 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5803 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5804 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5805 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5806 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5807 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5808 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5809 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5810 // CHECK9:       cond.true:
5811 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5812 // CHECK9:       cond.false:
5813 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5814 // CHECK9-NEXT:    br label [[COND_END]]
5815 // CHECK9:       cond.end:
5816 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5817 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5818 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5819 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5820 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5821 // CHECK9:       omp.inner.for.cond:
5822 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
5823 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
5824 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5825 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5826 // CHECK9:       omp.inner.for.body:
5827 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5828 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5829 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5830 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
5831 // CHECK9-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
5832 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5833 // CHECK9:       omp.body.continue:
5834 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5835 // CHECK9:       omp.inner.for.inc:
5836 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5837 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5838 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5839 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
5840 // CHECK9:       omp.inner.for.end:
5841 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5842 // CHECK9:       omp.loop.exit:
5843 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5844 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5845 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5846 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5847 // CHECK9:       .omp.final.then:
5848 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5849 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5850 // CHECK9:       .omp.final.done:
5851 // CHECK9-NEXT:    ret void
5852 //
5853 //
5854 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
5855 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5856 // CHECK11-NEXT:  entry:
5857 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5858 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5859 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
5860 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5861 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5862 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
5863 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5864 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
5865 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5866 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
5867 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5868 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
5869 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5870 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
5871 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5872 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
5873 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5874 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
5875 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5876 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
5877 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5878 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
5879 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5880 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
5881 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5882 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
5883 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5884 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
5885 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5886 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
5887 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
5888 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5889 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5890 // CHECK11:       omp_offload.failed:
5891 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
5892 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5893 // CHECK11:       omp_offload.cont:
5894 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
5895 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
5896 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
5897 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
5898 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
5899 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
5900 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
5901 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
5902 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
5903 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
5904 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
5905 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
5906 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
5907 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
5908 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
5909 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
5910 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
5911 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
5912 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
5913 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
5914 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
5915 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
5916 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
5917 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
5918 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
5919 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
5920 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS2]])
5921 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5922 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5923 // CHECK11:       omp_offload.failed3:
5924 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
5925 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
5926 // CHECK11:       omp_offload.cont4:
5927 // CHECK11-NEXT:    ret void
5928 //
5929 //
5930 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
5931 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] {
5932 // CHECK11-NEXT:  entry:
5933 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
5934 // CHECK11-NEXT:    ret void
5935 //
5936 //
5937 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
5938 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5939 // CHECK11-NEXT:  entry:
5940 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5941 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5942 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5943 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5944 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5945 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5946 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5947 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5948 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
5949 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5950 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5951 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5952 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5953 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5954 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5955 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5956 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5957 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5958 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5959 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5960 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5961 // CHECK11:       cond.true:
5962 // CHECK11-NEXT:    br label [[COND_END:%.*]]
5963 // CHECK11:       cond.false:
5964 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5965 // CHECK11-NEXT:    br label [[COND_END]]
5966 // CHECK11:       cond.end:
5967 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5968 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5969 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5970 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5971 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5972 // CHECK11:       omp.inner.for.cond:
5973 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
5974 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5975 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5976 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5977 // CHECK11:       omp.inner.for.body:
5978 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
5979 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5980 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5981 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5982 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
5983 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5984 // CHECK11:       omp.inner.for.inc:
5985 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5986 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
5987 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5988 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5989 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5990 // CHECK11:       omp.inner.for.end:
5991 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5992 // CHECK11:       omp.loop.exit:
5993 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5994 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5995 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5996 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5997 // CHECK11:       .omp.final.then:
5998 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
5999 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6000 // CHECK11:       .omp.final.done:
6001 // CHECK11-NEXT:    ret void
6002 //
6003 //
6004 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
6005 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6006 // CHECK11-NEXT:  entry:
6007 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6008 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6009 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6010 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6011 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6012 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6013 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6014 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6015 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6016 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6017 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6018 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6019 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6020 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6021 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6022 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6023 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6024 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6025 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6026 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6027 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6028 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6029 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6030 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6031 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6032 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6033 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6034 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6035 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6036 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6037 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6038 // CHECK11:       cond.true:
6039 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6040 // CHECK11:       cond.false:
6041 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6042 // CHECK11-NEXT:    br label [[COND_END]]
6043 // CHECK11:       cond.end:
6044 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6045 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6046 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6047 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6048 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6049 // CHECK11:       omp.inner.for.cond:
6050 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
6051 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
6052 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6053 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6054 // CHECK11:       omp.inner.for.body:
6055 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
6056 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6057 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6058 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
6059 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6060 // CHECK11:       omp.body.continue:
6061 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6062 // CHECK11:       omp.inner.for.inc:
6063 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
6064 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6065 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
6066 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
6067 // CHECK11:       omp.inner.for.end:
6068 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6069 // CHECK11:       omp.loop.exit:
6070 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6071 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6072 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6073 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6074 // CHECK11:       .omp.final.then:
6075 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6076 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6077 // CHECK11:       .omp.final.done:
6078 // CHECK11-NEXT:    ret void
6079 //
6080 //
6081 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
6082 // CHECK11-SAME: () #[[ATTR1]] {
6083 // CHECK11-NEXT:  entry:
6084 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined)
6085 // CHECK11-NEXT:    ret void
6086 //
6087 //
6088 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined
6089 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6090 // CHECK11-NEXT:  entry:
6091 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6092 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6093 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6094 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6095 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6096 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6097 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6098 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6099 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6100 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6101 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6102 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6103 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6104 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6105 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6106 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6107 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6108 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6109 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6110 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6111 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6112 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6113 // CHECK11:       cond.true:
6114 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6115 // CHECK11:       cond.false:
6116 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6117 // CHECK11-NEXT:    br label [[COND_END]]
6118 // CHECK11:       cond.end:
6119 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6120 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6121 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6122 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6123 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6124 // CHECK11:       omp.inner.for.cond:
6125 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
6126 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
6127 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6128 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6129 // CHECK11:       omp.inner.for.body:
6130 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
6131 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6132 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
6133 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6134 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
6135 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
6136 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
6137 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
6138 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
6139 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6140 // CHECK11:       omp.inner.for.inc:
6141 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
6142 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
6143 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6144 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
6145 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
6146 // CHECK11:       omp.inner.for.end:
6147 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6148 // CHECK11:       omp.loop.exit:
6149 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6150 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6151 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6152 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6153 // CHECK11:       .omp.final.then:
6154 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6155 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6156 // CHECK11:       .omp.final.done:
6157 // CHECK11-NEXT:    ret void
6158 //
6159 //
6160 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined
6161 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6162 // CHECK11-NEXT:  entry:
6163 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6164 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6165 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6166 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6167 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6168 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6169 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6170 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6171 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6172 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6173 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6174 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6175 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6176 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6177 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6178 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6179 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6180 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6181 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6182 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6183 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6184 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6185 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6186 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6187 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6188 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6189 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6190 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6191 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6192 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6193 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6194 // CHECK11:       cond.true:
6195 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6196 // CHECK11:       cond.false:
6197 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6198 // CHECK11-NEXT:    br label [[COND_END]]
6199 // CHECK11:       cond.end:
6200 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6201 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6202 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6203 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6204 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6205 // CHECK11:       omp.inner.for.cond:
6206 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
6207 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
6208 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6209 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6210 // CHECK11:       omp.inner.for.body:
6211 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6212 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6213 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6214 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
6215 // CHECK11-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
6216 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6217 // CHECK11:       omp.body.continue:
6218 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6219 // CHECK11:       omp.inner.for.inc:
6220 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6221 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6222 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6223 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
6224 // CHECK11:       omp.inner.for.end:
6225 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6226 // CHECK11:       omp.loop.exit:
6227 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6228 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6229 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6230 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6231 // CHECK11:       .omp.final.then:
6232 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6233 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6234 // CHECK11:       .omp.final.done:
6235 // CHECK11-NEXT:    ret void
6236 //
6237 //
6238 // CHECK11-LABEL: define {{[^@]+}}@main
6239 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
6240 // CHECK11-NEXT:  entry:
6241 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6242 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6243 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6244 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6245 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6246 // CHECK11-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
6247 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
6248 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
6249 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
6250 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6251 // CHECK11-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
6252 // CHECK11-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6253 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
6254 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
6255 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
6256 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
6257 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
6258 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
6259 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
6260 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
6261 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
6262 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
6263 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
6264 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
6265 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
6266 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
6267 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
6268 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
6269 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
6270 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
6271 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
6272 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
6273 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
6274 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
6275 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
6276 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
6277 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
6278 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
6279 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
6280 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, ptr [[KERNEL_ARGS]])
6281 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6282 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6283 // CHECK11:       omp_offload.failed:
6284 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
6285 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6286 // CHECK11:       omp_offload.cont:
6287 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
6288 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
6289 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
6290 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
6291 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
6292 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
6293 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
6294 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
6295 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
6296 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
6297 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
6298 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
6299 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
6300 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
6301 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
6302 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
6303 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
6304 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
6305 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
6306 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
6307 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
6308 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
6309 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
6310 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
6311 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
6312 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
6313 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, ptr [[KERNEL_ARGS2]])
6314 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
6315 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6316 // CHECK11:       omp_offload.failed3:
6317 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
6318 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
6319 // CHECK11:       omp_offload.cont4:
6320 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
6321 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
6322 // CHECK11-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
6323 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6324 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
6325 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6326 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
6327 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6328 // CHECK11-NEXT:    store ptr null, ptr [[TMP34]], align 8
6329 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6330 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6331 // CHECK11-NEXT:    [[TMP37:%.*]] = load i32, ptr @Arg, align 4
6332 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
6333 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
6334 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
6335 // CHECK11-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
6336 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
6337 // CHECK11-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
6338 // CHECK11-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
6339 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
6340 // CHECK11-NEXT:    store i32 3, ptr [[TMP41]], align 4
6341 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
6342 // CHECK11-NEXT:    store i32 1, ptr [[TMP42]], align 4
6343 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
6344 // CHECK11-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
6345 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
6346 // CHECK11-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
6347 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
6348 // CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP45]], align 8
6349 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
6350 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP46]], align 8
6351 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
6352 // CHECK11-NEXT:    store ptr null, ptr [[TMP47]], align 8
6353 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
6354 // CHECK11-NEXT:    store ptr null, ptr [[TMP48]], align 8
6355 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
6356 // CHECK11-NEXT:    store i64 100, ptr [[TMP49]], align 8
6357 // CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
6358 // CHECK11-NEXT:    store i64 0, ptr [[TMP50]], align 8
6359 // CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
6360 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
6361 // CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
6362 // CHECK11-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
6363 // CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
6364 // CHECK11-NEXT:    store i32 0, ptr [[TMP53]], align 4
6365 // CHECK11-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS6]])
6366 // CHECK11-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
6367 // CHECK11-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6368 // CHECK11:       omp_offload.failed7:
6369 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP31]]) #[[ATTR2]]
6370 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
6371 // CHECK11:       omp_offload.cont8:
6372 // CHECK11-NEXT:    [[TMP56:%.*]] = load i32, ptr @Arg, align 4
6373 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP56]])
6374 // CHECK11-NEXT:    ret i32 [[CALL]]
6375 //
6376 //
6377 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
6378 // CHECK11-SAME: () #[[ATTR1]] {
6379 // CHECK11-NEXT:  entry:
6380 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined)
6381 // CHECK11-NEXT:    ret void
6382 //
6383 //
6384 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined
6385 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6386 // CHECK11-NEXT:  entry:
6387 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6388 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6389 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6390 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6391 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6392 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6393 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6394 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6395 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6396 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6397 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6398 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6399 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6400 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6401 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6402 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6403 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6404 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6405 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6406 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6407 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6408 // CHECK11:       cond.true:
6409 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6410 // CHECK11:       cond.false:
6411 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6412 // CHECK11-NEXT:    br label [[COND_END]]
6413 // CHECK11:       cond.end:
6414 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6415 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6416 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6417 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6418 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6419 // CHECK11:       omp.inner.for.cond:
6420 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
6421 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6422 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6423 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6424 // CHECK11:       omp.inner.for.body:
6425 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
6426 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6427 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6428 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6429 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
6430 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6431 // CHECK11:       omp.inner.for.inc:
6432 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6433 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
6434 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6435 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6436 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
6437 // CHECK11:       omp.inner.for.end:
6438 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6439 // CHECK11:       omp.loop.exit:
6440 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6441 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6442 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6443 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6444 // CHECK11:       .omp.final.then:
6445 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6446 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6447 // CHECK11:       .omp.final.done:
6448 // CHECK11-NEXT:    ret void
6449 //
6450 //
6451 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined
6452 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6453 // CHECK11-NEXT:  entry:
6454 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6455 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6456 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6457 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6458 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6459 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6460 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6461 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6462 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6463 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6464 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6465 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6466 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6467 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6468 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6469 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6470 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6471 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6472 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6473 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6474 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6475 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6476 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6477 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6478 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6479 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6480 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6481 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6482 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6483 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6484 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6485 // CHECK11:       cond.true:
6486 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6487 // CHECK11:       cond.false:
6488 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6489 // CHECK11-NEXT:    br label [[COND_END]]
6490 // CHECK11:       cond.end:
6491 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6492 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6493 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6494 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6495 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6496 // CHECK11:       omp.inner.for.cond:
6497 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
6498 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
6499 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6500 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6501 // CHECK11:       omp.inner.for.body:
6502 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6503 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6504 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6505 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
6506 // CHECK11-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
6507 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6508 // CHECK11:       omp.body.continue:
6509 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6510 // CHECK11:       omp.inner.for.inc:
6511 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6512 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6513 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6514 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
6515 // CHECK11:       omp.inner.for.end:
6516 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6517 // CHECK11:       omp.loop.exit:
6518 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6519 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6520 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6521 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6522 // CHECK11:       .omp.final.then:
6523 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6524 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6525 // CHECK11:       .omp.final.done:
6526 // CHECK11-NEXT:    ret void
6527 //
6528 //
6529 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
6530 // CHECK11-SAME: () #[[ATTR1]] {
6531 // CHECK11-NEXT:  entry:
6532 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined)
6533 // CHECK11-NEXT:    ret void
6534 //
6535 //
6536 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined
6537 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6538 // CHECK11-NEXT:  entry:
6539 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6540 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6541 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6542 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6543 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6544 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6545 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6546 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6547 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6548 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6549 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6550 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6551 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6552 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6553 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6554 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6555 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6556 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6557 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6558 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6559 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6560 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6561 // CHECK11:       cond.true:
6562 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6563 // CHECK11:       cond.false:
6564 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6565 // CHECK11-NEXT:    br label [[COND_END]]
6566 // CHECK11:       cond.end:
6567 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6568 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6569 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6570 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6571 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6572 // CHECK11:       omp.inner.for.cond:
6573 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6574 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6575 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6576 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6577 // CHECK11:       omp.inner.for.body:
6578 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6579 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6580 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6581 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6582 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6583 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6584 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
6585 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6586 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6587 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6588 // CHECK11:       omp.inner.for.inc:
6589 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6590 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6591 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6592 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6593 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6594 // CHECK11:       omp.inner.for.end:
6595 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6596 // CHECK11:       omp.loop.exit:
6597 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6598 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6599 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6600 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6601 // CHECK11:       .omp.final.then:
6602 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6603 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6604 // CHECK11:       .omp.final.done:
6605 // CHECK11-NEXT:    ret void
6606 //
6607 //
6608 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.omp_outlined.omp_outlined
6609 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6610 // CHECK11-NEXT:  entry:
6611 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6612 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6613 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6614 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6615 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6616 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6617 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6618 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6619 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6620 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6621 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6622 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6623 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6624 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6625 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6626 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6627 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6628 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6629 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6630 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6631 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6632 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6633 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6634 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6635 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6636 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6637 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6638 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6639 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6640 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6641 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6642 // CHECK11:       cond.true:
6643 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6644 // CHECK11:       cond.false:
6645 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6646 // CHECK11-NEXT:    br label [[COND_END]]
6647 // CHECK11:       cond.end:
6648 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6649 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6650 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6651 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6652 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6653 // CHECK11:       omp.inner.for.cond:
6654 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6655 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6656 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6657 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6658 // CHECK11:       omp.inner.for.body:
6659 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6660 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6661 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6662 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6663 // CHECK11-NEXT:    call void @_Z3fn5v()
6664 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6665 // CHECK11:       omp.body.continue:
6666 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6667 // CHECK11:       omp.inner.for.inc:
6668 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6669 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6670 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6671 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
6672 // CHECK11:       omp.inner.for.end:
6673 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6674 // CHECK11:       omp.loop.exit:
6675 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6676 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6677 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6678 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6679 // CHECK11:       .omp.final.then:
6680 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6681 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6682 // CHECK11:       .omp.final.done:
6683 // CHECK11-NEXT:    ret void
6684 //
6685 //
6686 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
6687 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
6688 // CHECK11-NEXT:  entry:
6689 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
6690 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6691 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6692 // CHECK11-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
6693 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
6694 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
6695 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
6696 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
6697 // CHECK11-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
6698 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
6699 // CHECK11-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
6700 // CHECK11-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
6701 // CHECK11-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6702 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP2]])
6703 // CHECK11-NEXT:    ret void
6704 //
6705 //
6706 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined
6707 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6708 // CHECK11-NEXT:  entry:
6709 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6710 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6711 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6712 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6713 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6714 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6715 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6716 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6717 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6718 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6719 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6720 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6721 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8
6722 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR15:%.*]] = alloca i32, align 4
6723 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6724 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6725 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6726 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6727 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6728 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6729 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6730 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6731 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6732 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6733 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6734 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6735 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6736 // CHECK11:       cond.true:
6737 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6738 // CHECK11:       cond.false:
6739 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6740 // CHECK11-NEXT:    br label [[COND_END]]
6741 // CHECK11:       cond.end:
6742 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6743 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6744 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6745 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6746 // CHECK11-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6747 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1
6748 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]]
6749 // CHECK11:       omp_if.then:
6750 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6751 // CHECK11:       omp.inner.for.cond:
6752 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
6753 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6754 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6755 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6756 // CHECK11:       omp.inner.for.body:
6757 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
6758 // CHECK11-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6759 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6760 // CHECK11-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6761 // CHECK11-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP35]]
6762 // CHECK11-NEXT:    [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1
6763 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8
6764 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]
6765 // CHECK11-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
6766 // CHECK11-NEXT:    [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP35]]
6767 // CHECK11-NEXT:    [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1
6768 // CHECK11-NEXT:    br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]]
6769 // CHECK11:       omp_if.then4:
6770 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP35]]
6771 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
6772 // CHECK11:       omp_if.else:
6773 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
6774 // CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
6775 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
6776 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP15]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
6777 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
6778 // CHECK11-NEXT:    br label [[OMP_IF_END]]
6779 // CHECK11:       omp_if.end:
6780 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6781 // CHECK11:       omp.inner.for.inc:
6782 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6783 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
6784 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6785 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6786 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
6787 // CHECK11:       omp.inner.for.end:
6788 // CHECK11-NEXT:    br label [[OMP_IF_END20:%.*]]
6789 // CHECK11:       omp_if.else5:
6790 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND6:%.*]]
6791 // CHECK11:       omp.inner.for.cond6:
6792 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6793 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6794 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
6795 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
6796 // CHECK11:       omp.inner.for.body8:
6797 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6798 // CHECK11-NEXT:    [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
6799 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6800 // CHECK11-NEXT:    [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
6801 // CHECK11-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6802 // CHECK11-NEXT:    [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1
6803 // CHECK11-NEXT:    [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8
6804 // CHECK11-NEXT:    store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1
6805 // CHECK11-NEXT:    [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8
6806 // CHECK11-NEXT:    [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6807 // CHECK11-NEXT:    [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1
6808 // CHECK11-NEXT:    br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]]
6809 // CHECK11:       omp_if.then13:
6810 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
6811 // CHECK11-NEXT:    br label [[OMP_IF_END16:%.*]]
6812 // CHECK11:       omp_if.else14:
6813 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6814 // CHECK11-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6815 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR15]], align 4
6816 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1(ptr [[TMP27]], ptr [[DOTBOUND_ZERO_ADDR15]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
6817 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6818 // CHECK11-NEXT:    br label [[OMP_IF_END16]]
6819 // CHECK11:       omp_if.end16:
6820 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC17:%.*]]
6821 // CHECK11:       omp.inner.for.inc17:
6822 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6823 // CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6824 // CHECK11-NEXT:    [[ADD18:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
6825 // CHECK11-NEXT:    store i32 [[ADD18]], ptr [[DOTOMP_IV]], align 4
6826 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND6]], !llvm.loop [[LOOP38:![0-9]+]]
6827 // CHECK11:       omp.inner.for.end19:
6828 // CHECK11-NEXT:    br label [[OMP_IF_END20]]
6829 // CHECK11:       omp_if.end20:
6830 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6831 // CHECK11:       omp.loop.exit:
6832 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6833 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6834 // CHECK11-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
6835 // CHECK11-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6836 // CHECK11:       .omp.final.then:
6837 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6838 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6839 // CHECK11:       .omp.final.done:
6840 // CHECK11-NEXT:    ret void
6841 //
6842 //
6843 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined
6844 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6845 // CHECK11-NEXT:  entry:
6846 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6847 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6848 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6849 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6850 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6851 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6852 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6853 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6854 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6855 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6856 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6857 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6858 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6859 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6860 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6861 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6862 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6863 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6864 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6865 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6866 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6867 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6868 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6869 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6870 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6871 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6872 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6873 // CHECK11-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6874 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
6875 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6876 // CHECK11:       omp_if.then:
6877 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6878 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6879 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6880 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6881 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6882 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6883 // CHECK11:       cond.true:
6884 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6885 // CHECK11:       cond.false:
6886 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6887 // CHECK11-NEXT:    br label [[COND_END]]
6888 // CHECK11:       cond.end:
6889 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6890 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6891 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6892 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6893 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6894 // CHECK11:       omp.inner.for.cond:
6895 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
6896 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
6897 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6898 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6899 // CHECK11:       omp.inner.for.body:
6900 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6901 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6902 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6903 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
6904 // CHECK11-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
6905 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6906 // CHECK11:       omp.body.continue:
6907 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6908 // CHECK11:       omp.inner.for.inc:
6909 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6910 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
6911 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6912 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
6913 // CHECK11:       omp.inner.for.end:
6914 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
6915 // CHECK11:       omp_if.else:
6916 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6917 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
6918 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6919 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6920 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
6921 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6922 // CHECK11:       cond.true5:
6923 // CHECK11-NEXT:    br label [[COND_END7:%.*]]
6924 // CHECK11:       cond.false6:
6925 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6926 // CHECK11-NEXT:    br label [[COND_END7]]
6927 // CHECK11:       cond.end7:
6928 // CHECK11-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
6929 // CHECK11-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
6930 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6931 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
6932 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
6933 // CHECK11:       omp.inner.for.cond9:
6934 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6935 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6936 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6937 // CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6938 // CHECK11:       omp.inner.for.body11:
6939 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6940 // CHECK11-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
6941 // CHECK11-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6942 // CHECK11-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
6943 // CHECK11-NEXT:    call void @_Z3fn6v()
6944 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
6945 // CHECK11:       omp.body.continue14:
6946 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
6947 // CHECK11:       omp.inner.for.inc15:
6948 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6949 // CHECK11-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
6950 // CHECK11-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
6951 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]
6952 // CHECK11:       omp.inner.for.end17:
6953 // CHECK11-NEXT:    br label [[OMP_IF_END]]
6954 // CHECK11:       omp_if.end:
6955 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6956 // CHECK11:       omp.loop.exit:
6957 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6958 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
6959 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
6960 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6961 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6962 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6963 // CHECK11:       .omp.final.then:
6964 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6965 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6966 // CHECK11:       .omp.final.done:
6967 // CHECK11-NEXT:    ret void
6968 //
6969 //
6970 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1
6971 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6972 // CHECK11-NEXT:  entry:
6973 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6974 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6975 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6976 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6977 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6978 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6979 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6980 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6981 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6982 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6983 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6984 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6985 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6986 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6987 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6988 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6989 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6990 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6991 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6992 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6993 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6994 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6995 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6996 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6997 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6998 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6999 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7000 // CHECK11-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
7001 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
7002 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7003 // CHECK11:       omp_if.then:
7004 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7005 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
7006 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7007 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7008 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
7009 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7010 // CHECK11:       cond.true:
7011 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7012 // CHECK11:       cond.false:
7013 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7014 // CHECK11-NEXT:    br label [[COND_END]]
7015 // CHECK11:       cond.end:
7016 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7017 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7018 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7019 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
7020 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7021 // CHECK11:       omp.inner.for.cond:
7022 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
7023 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
7024 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7025 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7026 // CHECK11:       omp.inner.for.body:
7027 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
7028 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7029 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7030 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
7031 // CHECK11-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
7032 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7033 // CHECK11:       omp.body.continue:
7034 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7035 // CHECK11:       omp.inner.for.inc:
7036 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
7037 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
7038 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
7039 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
7040 // CHECK11:       omp.inner.for.end:
7041 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
7042 // CHECK11:       omp_if.else:
7043 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7044 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
7045 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7046 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7047 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
7048 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
7049 // CHECK11:       cond.true5:
7050 // CHECK11-NEXT:    br label [[COND_END7:%.*]]
7051 // CHECK11:       cond.false6:
7052 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7053 // CHECK11-NEXT:    br label [[COND_END7]]
7054 // CHECK11:       cond.end7:
7055 // CHECK11-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
7056 // CHECK11-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
7057 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7058 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
7059 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
7060 // CHECK11:       omp.inner.for.cond9:
7061 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7062 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7063 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
7064 // CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
7065 // CHECK11:       omp.inner.for.body11:
7066 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7067 // CHECK11-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
7068 // CHECK11-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
7069 // CHECK11-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
7070 // CHECK11-NEXT:    call void @_Z3fn6v()
7071 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
7072 // CHECK11:       omp.body.continue14:
7073 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
7074 // CHECK11:       omp.inner.for.inc15:
7075 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7076 // CHECK11-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
7077 // CHECK11-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
7078 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]
7079 // CHECK11:       omp.inner.for.end17:
7080 // CHECK11-NEXT:    br label [[OMP_IF_END]]
7081 // CHECK11:       omp_if.end:
7082 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7083 // CHECK11:       omp.loop.exit:
7084 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7085 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
7086 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
7087 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7088 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
7089 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7090 // CHECK11:       .omp.final.then:
7091 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7092 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7093 // CHECK11:       .omp.final.done:
7094 // CHECK11-NEXT:    ret void
7095 //
7096 //
7097 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7098 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7099 // CHECK11-NEXT:  entry:
7100 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
7101 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7102 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
7103 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7104 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7105 // CHECK11-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
7106 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
7107 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
7108 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
7109 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7110 // CHECK11-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
7111 // CHECK11-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7112 // CHECK11-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
7113 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
7114 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
7115 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
7116 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
7117 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
7118 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
7119 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
7120 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
7121 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
7122 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
7123 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
7124 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
7125 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
7126 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
7127 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
7128 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
7129 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
7130 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
7131 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
7132 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
7133 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
7134 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
7135 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
7136 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
7137 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
7138 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
7139 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, ptr [[KERNEL_ARGS]])
7140 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7141 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7142 // CHECK11:       omp_offload.failed:
7143 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
7144 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7145 // CHECK11:       omp_offload.cont:
7146 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
7147 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
7148 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
7149 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
7150 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
7151 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
7152 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
7153 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
7154 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
7155 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
7156 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
7157 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
7158 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
7159 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
7160 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
7161 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
7162 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
7163 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
7164 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
7165 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
7166 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
7167 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
7168 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
7169 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4
7170 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
7171 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
7172 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS2]])
7173 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
7174 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
7175 // CHECK11:       omp_offload.failed3:
7176 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
7177 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
7178 // CHECK11:       omp_offload.cont4:
7179 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
7180 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
7181 // CHECK11-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
7182 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7183 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
7184 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7185 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
7186 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7187 // CHECK11-NEXT:    store ptr null, ptr [[TMP34]], align 8
7188 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7189 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7190 // CHECK11-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
7191 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP37]], 0
7192 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
7193 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
7194 // CHECK11-NEXT:    [[TMP38:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
7195 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP38]] to i1
7196 // CHECK11-NEXT:    [[TMP39:%.*]] = select i1 [[LOADEDV]], i32 0, i32 1
7197 // CHECK11-NEXT:    [[TMP40:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP39]], 0
7198 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
7199 // CHECK11-NEXT:    store i32 3, ptr [[TMP41]], align 4
7200 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
7201 // CHECK11-NEXT:    store i32 1, ptr [[TMP42]], align 4
7202 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
7203 // CHECK11-NEXT:    store ptr [[TMP35]], ptr [[TMP43]], align 8
7204 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
7205 // CHECK11-NEXT:    store ptr [[TMP36]], ptr [[TMP44]], align 8
7206 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
7207 // CHECK11-NEXT:    store ptr @.offload_sizes.2, ptr [[TMP45]], align 8
7208 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
7209 // CHECK11-NEXT:    store ptr @.offload_maptypes.3, ptr [[TMP46]], align 8
7210 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
7211 // CHECK11-NEXT:    store ptr null, ptr [[TMP47]], align 8
7212 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
7213 // CHECK11-NEXT:    store ptr null, ptr [[TMP48]], align 8
7214 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
7215 // CHECK11-NEXT:    store i64 100, ptr [[TMP49]], align 8
7216 // CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
7217 // CHECK11-NEXT:    store i64 0, ptr [[TMP50]], align 8
7218 // CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
7219 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP51]], align 4
7220 // CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
7221 // CHECK11-NEXT:    store [3 x i32] [[TMP40]], ptr [[TMP52]], align 4
7222 // CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
7223 // CHECK11-NEXT:    store i32 0, ptr [[TMP53]], align 4
7224 // CHECK11-NEXT:    [[TMP54:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP39]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, ptr [[KERNEL_ARGS6]])
7225 // CHECK11-NEXT:    [[TMP55:%.*]] = icmp ne i32 [[TMP54]], 0
7226 // CHECK11-NEXT:    br i1 [[TMP55]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
7227 // CHECK11:       omp_offload.failed7:
7228 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP31]]) #[[ATTR2]]
7229 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
7230 // CHECK11:       omp_offload.cont8:
7231 // CHECK11-NEXT:    ret i32 0
7232 //
7233 //
7234 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
7235 // CHECK11-SAME: () #[[ATTR1]] {
7236 // CHECK11-NEXT:  entry:
7237 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined)
7238 // CHECK11-NEXT:    ret void
7239 //
7240 //
7241 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined
7242 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7243 // CHECK11-NEXT:  entry:
7244 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7245 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7246 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7247 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7248 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7249 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7250 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7251 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7252 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7253 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7254 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7255 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7256 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7257 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7258 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7259 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7260 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7261 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7262 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7263 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7264 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7265 // CHECK11:       cond.true:
7266 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7267 // CHECK11:       cond.false:
7268 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7269 // CHECK11-NEXT:    br label [[COND_END]]
7270 // CHECK11:       cond.end:
7271 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7272 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7273 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7274 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7275 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7276 // CHECK11:       omp.inner.for.cond:
7277 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
7278 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7279 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7280 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7281 // CHECK11:       omp.inner.for.body:
7282 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
7283 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7284 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7285 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7286 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
7287 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7288 // CHECK11:       omp.inner.for.inc:
7289 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7290 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
7291 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7292 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7293 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
7294 // CHECK11:       omp.inner.for.end:
7295 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7296 // CHECK11:       omp.loop.exit:
7297 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7298 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7299 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7300 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7301 // CHECK11:       .omp.final.then:
7302 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7303 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7304 // CHECK11:       .omp.final.done:
7305 // CHECK11-NEXT:    ret void
7306 //
7307 //
7308 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.omp_outlined.omp_outlined
7309 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7310 // CHECK11-NEXT:  entry:
7311 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7312 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7313 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7314 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7315 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7316 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7317 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7318 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7319 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7320 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7321 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7322 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7323 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7324 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7325 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7326 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7327 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7328 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7329 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7330 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7331 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7332 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7333 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7334 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7335 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7336 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7337 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7338 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7339 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7340 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7341 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7342 // CHECK11:       cond.true:
7343 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7344 // CHECK11:       cond.false:
7345 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7346 // CHECK11-NEXT:    br label [[COND_END]]
7347 // CHECK11:       cond.end:
7348 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7349 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7350 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7351 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7352 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7353 // CHECK11:       omp.inner.for.cond:
7354 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
7355 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
7356 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7357 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7358 // CHECK11:       omp.inner.for.body:
7359 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7360 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7361 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7362 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
7363 // CHECK11-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
7364 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7365 // CHECK11:       omp.body.continue:
7366 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7367 // CHECK11:       omp.inner.for.inc:
7368 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7369 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7370 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7371 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
7372 // CHECK11:       omp.inner.for.end:
7373 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7374 // CHECK11:       omp.loop.exit:
7375 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7376 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7377 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7378 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7379 // CHECK11:       .omp.final.then:
7380 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7381 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7382 // CHECK11:       .omp.final.done:
7383 // CHECK11-NEXT:    ret void
7384 //
7385 //
7386 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
7387 // CHECK11-SAME: () #[[ATTR1]] {
7388 // CHECK11-NEXT:  entry:
7389 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined)
7390 // CHECK11-NEXT:    ret void
7391 //
7392 //
7393 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined
7394 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7395 // CHECK11-NEXT:  entry:
7396 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7397 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7398 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7399 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7400 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7401 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7402 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7403 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7404 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7405 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7406 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7407 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7408 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7409 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7410 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7411 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7412 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7413 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7414 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7415 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7416 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7417 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7418 // CHECK11:       cond.true:
7419 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7420 // CHECK11:       cond.false:
7421 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7422 // CHECK11-NEXT:    br label [[COND_END]]
7423 // CHECK11:       cond.end:
7424 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7425 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7426 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7427 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7428 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7429 // CHECK11:       omp.inner.for.cond:
7430 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7431 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7432 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7433 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7434 // CHECK11:       omp.inner.for.body:
7435 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7436 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7437 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7438 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7439 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
7440 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7441 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
7442 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7443 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
7444 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7445 // CHECK11:       omp.inner.for.inc:
7446 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7447 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7448 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7449 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7450 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7451 // CHECK11:       omp.inner.for.end:
7452 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7453 // CHECK11:       omp.loop.exit:
7454 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7455 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7456 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7457 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7458 // CHECK11:       .omp.final.then:
7459 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7460 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7461 // CHECK11:       .omp.final.done:
7462 // CHECK11-NEXT:    ret void
7463 //
7464 //
7465 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined
7466 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7467 // CHECK11-NEXT:  entry:
7468 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7469 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7470 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7471 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7472 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7473 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7474 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7475 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7476 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7477 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7478 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7479 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7480 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7481 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7482 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7483 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7484 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7485 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7486 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7487 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7488 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7489 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7490 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7491 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7492 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7493 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7494 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7495 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7496 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7497 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7498 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7499 // CHECK11:       cond.true:
7500 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7501 // CHECK11:       cond.false:
7502 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7503 // CHECK11-NEXT:    br label [[COND_END]]
7504 // CHECK11:       cond.end:
7505 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7506 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7507 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7508 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7509 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7510 // CHECK11:       omp.inner.for.cond:
7511 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7512 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7513 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7514 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7515 // CHECK11:       omp.inner.for.body:
7516 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7517 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7518 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7519 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7520 // CHECK11-NEXT:    call void @_Z3fn2v()
7521 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7522 // CHECK11:       omp.body.continue:
7523 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7524 // CHECK11:       omp.inner.for.inc:
7525 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7526 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7527 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7528 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
7529 // CHECK11:       omp.inner.for.end:
7530 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7531 // CHECK11:       omp.loop.exit:
7532 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7533 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7534 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7535 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7536 // CHECK11:       .omp.final.then:
7537 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7538 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7539 // CHECK11:       .omp.final.done:
7540 // CHECK11-NEXT:    ret void
7541 //
7542 //
7543 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
7544 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
7545 // CHECK11-NEXT:  entry:
7546 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
7547 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7548 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7549 // CHECK11-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
7550 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
7551 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
7552 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
7553 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
7554 // CHECK11-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
7555 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
7556 // CHECK11-NEXT:    [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8
7557 // CHECK11-NEXT:    store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
7558 // CHECK11-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
7559 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined, i64 [[TMP2]])
7560 // CHECK11-NEXT:    ret void
7561 //
7562 //
7563 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined
7564 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7565 // CHECK11-NEXT:  entry:
7566 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7567 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7568 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7569 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7570 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7571 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7572 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7573 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7574 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7575 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7576 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7577 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7578 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7579 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
7580 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7581 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7582 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7583 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7584 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7585 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7586 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7587 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7588 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7589 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7590 // CHECK11:       cond.true:
7591 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7592 // CHECK11:       cond.false:
7593 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7594 // CHECK11-NEXT:    br label [[COND_END]]
7595 // CHECK11:       cond.end:
7596 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7597 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7598 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7599 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7600 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7601 // CHECK11:       omp.inner.for.cond:
7602 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
7603 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7604 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7605 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7606 // CHECK11:       omp.inner.for.body:
7607 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
7608 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7609 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7610 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7611 // CHECK11-NEXT:    [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP55]]
7612 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1
7613 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7614 // CHECK11:       omp_if.then:
7615 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP55]]
7616 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
7617 // CHECK11:       omp_if.else:
7618 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
7619 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
7620 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
7621 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
7622 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
7623 // CHECK11-NEXT:    br label [[OMP_IF_END]]
7624 // CHECK11:       omp_if.end:
7625 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7626 // CHECK11:       omp.inner.for.inc:
7627 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7628 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
7629 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7630 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7631 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
7632 // CHECK11:       omp.inner.for.end:
7633 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7634 // CHECK11:       omp.loop.exit:
7635 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7636 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7637 // CHECK11-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7638 // CHECK11-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7639 // CHECK11:       .omp.final.then:
7640 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7641 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7642 // CHECK11:       .omp.final.done:
7643 // CHECK11-NEXT:    ret void
7644 //
7645 //
7646 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.omp_outlined.omp_outlined
7647 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7648 // CHECK11-NEXT:  entry:
7649 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7650 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7651 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7652 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7653 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7654 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7655 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7656 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7657 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7658 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7659 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7660 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7661 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7662 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7663 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7664 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7665 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7666 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7667 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7668 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7669 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7670 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7671 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7672 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7673 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7674 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7675 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7676 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7677 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7678 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7679 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7680 // CHECK11:       cond.true:
7681 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7682 // CHECK11:       cond.false:
7683 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7684 // CHECK11-NEXT:    br label [[COND_END]]
7685 // CHECK11:       cond.end:
7686 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7687 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7688 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7689 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7690 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7691 // CHECK11:       omp.inner.for.cond:
7692 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
7693 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
7694 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7695 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7696 // CHECK11:       omp.inner.for.body:
7697 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7698 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7699 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7700 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
7701 // CHECK11-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
7702 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7703 // CHECK11:       omp.body.continue:
7704 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7705 // CHECK11:       omp.inner.for.inc:
7706 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7707 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7708 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7709 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
7710 // CHECK11:       omp.inner.for.end:
7711 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7712 // CHECK11:       omp.loop.exit:
7713 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7714 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7715 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7716 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7717 // CHECK11:       .omp.final.then:
7718 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7719 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7720 // CHECK11:       .omp.final.done:
7721 // CHECK11-NEXT:    ret void
7722 //
7723 //
7724 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
7725 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
7726 // CHECK13-NEXT:  entry:
7727 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7728 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7729 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7730 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7731 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7732 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7733 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7734 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7735 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7736 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7737 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7738 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7739 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7740 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7741 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7742 // CHECK13:       omp.inner.for.cond:
7743 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7744 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7745 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7746 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7747 // CHECK13:       omp.inner.for.body:
7748 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7749 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7750 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7751 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7752 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7753 // CHECK13:       omp.body.continue:
7754 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7755 // CHECK13:       omp.inner.for.inc:
7756 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7757 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7758 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7759 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7760 // CHECK13:       omp.inner.for.end:
7761 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7762 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7763 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7764 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7765 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7766 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7767 // CHECK13:       omp.inner.for.cond7:
7768 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7769 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7770 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7771 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7772 // CHECK13:       omp.inner.for.body9:
7773 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7774 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7775 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7776 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7777 // CHECK13-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7778 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7779 // CHECK13:       omp.body.continue12:
7780 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7781 // CHECK13:       omp.inner.for.inc13:
7782 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7783 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7784 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7785 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7786 // CHECK13:       omp.inner.for.end15:
7787 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7788 // CHECK13-NEXT:    ret void
7789 //
7790 //
7791 // CHECK13-LABEL: define {{[^@]+}}@main
7792 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
7793 // CHECK13-NEXT:  entry:
7794 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7795 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7796 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7797 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7798 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7799 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7800 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7801 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7802 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7803 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7804 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7805 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7806 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
7807 // CHECK13-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7808 // CHECK13-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7809 // CHECK13-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7810 // CHECK13-NEXT:    [[I20:%.*]] = alloca i32, align 4
7811 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
7812 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7813 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7814 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7815 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7816 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7817 // CHECK13:       omp.inner.for.cond:
7818 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7819 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7820 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7821 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7822 // CHECK13:       omp.inner.for.body:
7823 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7824 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7825 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7826 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7827 // CHECK13-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7828 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7829 // CHECK13:       omp.body.continue:
7830 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7831 // CHECK13:       omp.inner.for.inc:
7832 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7833 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7834 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7835 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7836 // CHECK13:       omp.inner.for.end:
7837 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7838 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7839 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7840 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7841 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7842 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7843 // CHECK13:       omp.inner.for.cond7:
7844 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
7845 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
7846 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7847 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7848 // CHECK13:       omp.inner.for.body9:
7849 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7850 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7851 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7852 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
7853 // CHECK13-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
7854 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7855 // CHECK13:       omp.body.continue12:
7856 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7857 // CHECK13:       omp.inner.for.inc13:
7858 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7859 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7860 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7861 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7862 // CHECK13:       omp.inner.for.end15:
7863 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7864 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
7865 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7866 // CHECK13-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
7867 // CHECK13-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
7868 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
7869 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
7870 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
7871 // CHECK13-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
7872 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
7873 // CHECK13:       omp.inner.for.cond21:
7874 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7875 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7876 // CHECK13-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7877 // CHECK13-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7878 // CHECK13:       omp.inner.for.body23:
7879 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7880 // CHECK13-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7881 // CHECK13-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7882 // CHECK13-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7883 // CHECK13-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7884 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
7885 // CHECK13:       omp.body.continue26:
7886 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
7887 // CHECK13:       omp.inner.for.inc27:
7888 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7889 // CHECK13-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7890 // CHECK13-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7891 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
7892 // CHECK13:       omp.inner.for.end29:
7893 // CHECK13-NEXT:    store i32 100, ptr [[I20]], align 4
7894 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr @Arg, align 4
7895 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
7896 // CHECK13-NEXT:    ret i32 [[CALL]]
7897 //
7898 //
7899 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7900 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7901 // CHECK13-NEXT:  entry:
7902 // CHECK13-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
7903 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7904 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7905 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7906 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7907 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7908 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7909 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7910 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7911 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7912 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7913 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7914 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
7915 // CHECK13-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7916 // CHECK13-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7917 // CHECK13-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7918 // CHECK13-NEXT:    [[I20:%.*]] = alloca i32, align 4
7919 // CHECK13-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
7920 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7921 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7922 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7923 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7924 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7925 // CHECK13:       omp.inner.for.cond:
7926 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7927 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7928 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7929 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7930 // CHECK13:       omp.inner.for.body:
7931 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7932 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7933 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7934 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7935 // CHECK13-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7936 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7937 // CHECK13:       omp.body.continue:
7938 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7939 // CHECK13:       omp.inner.for.inc:
7940 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7941 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7942 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7943 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7944 // CHECK13:       omp.inner.for.end:
7945 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7946 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7947 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7948 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7949 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7950 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7951 // CHECK13:       omp.inner.for.cond7:
7952 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
7953 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
7954 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7955 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7956 // CHECK13:       omp.inner.for.body9:
7957 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7958 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7959 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7960 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
7961 // CHECK13-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
7962 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7963 // CHECK13:       omp.body.continue12:
7964 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7965 // CHECK13:       omp.inner.for.inc13:
7966 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7967 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7968 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7969 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7970 // CHECK13:       omp.inner.for.end15:
7971 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7972 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
7973 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7974 // CHECK13-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
7975 // CHECK13-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
7976 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
7977 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
7978 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
7979 // CHECK13-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
7980 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
7981 // CHECK13:       omp.inner.for.cond21:
7982 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
7983 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
7984 // CHECK13-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7985 // CHECK13-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7986 // CHECK13:       omp.inner.for.body23:
7987 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7988 // CHECK13-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7989 // CHECK13-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7990 // CHECK13-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
7991 // CHECK13-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
7992 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
7993 // CHECK13:       omp.body.continue26:
7994 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
7995 // CHECK13:       omp.inner.for.inc27:
7996 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7997 // CHECK13-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7998 // CHECK13-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7999 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
8000 // CHECK13:       omp.inner.for.end29:
8001 // CHECK13-NEXT:    store i32 100, ptr [[I20]], align 4
8002 // CHECK13-NEXT:    ret i32 0
8003 //
8004 //
8005 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
8006 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
8007 // CHECK15-NEXT:  entry:
8008 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8009 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8010 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8011 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8012 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8013 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8014 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8015 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8016 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8017 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
8018 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8019 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
8020 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8021 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
8022 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8023 // CHECK15:       omp.inner.for.cond:
8024 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
8025 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
8026 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8027 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8028 // CHECK15:       omp.inner.for.body:
8029 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
8030 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8031 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8032 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
8033 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8034 // CHECK15:       omp.body.continue:
8035 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8036 // CHECK15:       omp.inner.for.inc:
8037 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
8038 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8039 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
8040 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
8041 // CHECK15:       omp.inner.for.end:
8042 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
8043 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
8044 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
8045 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
8046 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
8047 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8048 // CHECK15:       omp.inner.for.cond7:
8049 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
8050 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
8051 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8052 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8053 // CHECK15:       omp.inner.for.body9:
8054 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
8055 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8056 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8057 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
8058 // CHECK15-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
8059 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
8060 // CHECK15:       omp.body.continue12:
8061 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
8062 // CHECK15:       omp.inner.for.inc13:
8063 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
8064 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8065 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
8066 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
8067 // CHECK15:       omp.inner.for.end15:
8068 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
8069 // CHECK15-NEXT:    ret void
8070 //
8071 //
8072 // CHECK15-LABEL: define {{[^@]+}}@main
8073 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
8074 // CHECK15-NEXT:  entry:
8075 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
8076 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8077 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8078 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8079 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8080 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8081 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8082 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8083 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8084 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8085 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
8086 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8087 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
8088 // CHECK15-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
8089 // CHECK15-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
8090 // CHECK15-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
8091 // CHECK15-NEXT:    [[I20:%.*]] = alloca i32, align 4
8092 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
8093 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8094 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
8095 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8096 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
8097 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8098 // CHECK15:       omp.inner.for.cond:
8099 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
8100 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
8101 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8102 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8103 // CHECK15:       omp.inner.for.body:
8104 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
8105 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8106 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8107 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
8108 // CHECK15-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
8109 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8110 // CHECK15:       omp.body.continue:
8111 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8112 // CHECK15:       omp.inner.for.inc:
8113 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
8114 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8115 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
8116 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
8117 // CHECK15:       omp.inner.for.end:
8118 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
8119 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
8120 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
8121 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
8122 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
8123 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8124 // CHECK15:       omp.inner.for.cond7:
8125 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8126 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
8127 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8128 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8129 // CHECK15:       omp.inner.for.body9:
8130 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8131 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8132 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8133 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
8134 // CHECK15-NEXT:    call void @_Z3fn5v()
8135 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
8136 // CHECK15:       omp.body.continue12:
8137 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
8138 // CHECK15:       omp.inner.for.inc13:
8139 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8140 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8141 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
8142 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
8143 // CHECK15:       omp.inner.for.end15:
8144 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
8145 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
8146 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
8147 // CHECK15-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
8148 // CHECK15-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
8149 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
8150 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
8151 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
8152 // CHECK15-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
8153 // CHECK15-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
8154 // CHECK15-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
8155 // CHECK15-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8156 // CHECK15:       omp_if.then:
8157 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
8158 // CHECK15:       omp.inner.for.cond21:
8159 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
8160 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
8161 // CHECK15-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8162 // CHECK15-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8163 // CHECK15:       omp.inner.for.body23:
8164 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8165 // CHECK15-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1
8166 // CHECK15-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8167 // CHECK15-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
8168 // CHECK15-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
8169 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
8170 // CHECK15:       omp.body.continue26:
8171 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
8172 // CHECK15:       omp.inner.for.inc27:
8173 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8174 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1
8175 // CHECK15-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8176 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]
8177 // CHECK15:       omp.inner.for.end29:
8178 // CHECK15-NEXT:    br label [[OMP_IF_END:%.*]]
8179 // CHECK15:       omp_if.else:
8180 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND30:%.*]]
8181 // CHECK15:       omp.inner.for.cond30:
8182 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8183 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4
8184 // CHECK15-NEXT:    [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8185 // CHECK15-NEXT:    br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
8186 // CHECK15:       omp.inner.for.body32:
8187 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8188 // CHECK15-NEXT:    [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1
8189 // CHECK15-NEXT:    [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]
8190 // CHECK15-NEXT:    store i32 [[ADD34]], ptr [[I20]], align 4
8191 // CHECK15-NEXT:    call void @_Z3fn6v()
8192 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE35:%.*]]
8193 // CHECK15:       omp.body.continue35:
8194 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC36:%.*]]
8195 // CHECK15:       omp.inner.for.inc36:
8196 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8197 // CHECK15-NEXT:    [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1
8198 // CHECK15-NEXT:    store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4
8199 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]
8200 // CHECK15:       omp.inner.for.end38:
8201 // CHECK15-NEXT:    br label [[OMP_IF_END]]
8202 // CHECK15:       omp_if.end:
8203 // CHECK15-NEXT:    store i32 100, ptr [[I20]], align 4
8204 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr @Arg, align 4
8205 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
8206 // CHECK15-NEXT:    ret i32 [[CALL]]
8207 //
8208 //
8209 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8210 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
8211 // CHECK15-NEXT:  entry:
8212 // CHECK15-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
8213 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8214 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8215 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8216 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8217 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8218 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8219 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8220 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8221 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8222 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
8223 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8224 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
8225 // CHECK15-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
8226 // CHECK15-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
8227 // CHECK15-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
8228 // CHECK15-NEXT:    [[I20:%.*]] = alloca i32, align 4
8229 // CHECK15-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
8230 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8231 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
8232 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8233 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
8234 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8235 // CHECK15:       omp.inner.for.cond:
8236 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
8237 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
8238 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8239 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8240 // CHECK15:       omp.inner.for.body:
8241 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8242 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8243 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8244 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
8245 // CHECK15-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
8246 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8247 // CHECK15:       omp.body.continue:
8248 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8249 // CHECK15:       omp.inner.for.inc:
8250 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8251 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8252 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8253 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8254 // CHECK15:       omp.inner.for.end:
8255 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
8256 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
8257 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
8258 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
8259 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
8260 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8261 // CHECK15:       omp.inner.for.cond7:
8262 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8263 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
8264 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8265 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8266 // CHECK15:       omp.inner.for.body9:
8267 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8268 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8269 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8270 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
8271 // CHECK15-NEXT:    call void @_Z3fn2v()
8272 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
8273 // CHECK15:       omp.body.continue12:
8274 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
8275 // CHECK15:       omp.inner.for.inc13:
8276 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8277 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8278 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
8279 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
8280 // CHECK15:       omp.inner.for.end15:
8281 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
8282 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
8283 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
8284 // CHECK15-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
8285 // CHECK15-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
8286 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
8287 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
8288 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
8289 // CHECK15-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
8290 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
8291 // CHECK15:       omp.inner.for.cond21:
8292 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
8293 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
8294 // CHECK15-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
8295 // CHECK15-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8296 // CHECK15:       omp.inner.for.body23:
8297 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8298 // CHECK15-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
8299 // CHECK15-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8300 // CHECK15-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
8301 // CHECK15-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
8302 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
8303 // CHECK15:       omp.body.continue26:
8304 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
8305 // CHECK15:       omp.inner.for.inc27:
8306 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8307 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
8308 // CHECK15-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8309 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
8310 // CHECK15:       omp.inner.for.end29:
8311 // CHECK15-NEXT:    store i32 100, ptr [[I20]], align 4
8312 // CHECK15-NEXT:    ret i32 0
8313 //