[TableGen] Fix validateOperandClass for non Phyical Reg (#118146)
[llvm-project.git] / compiler-rt / lib / builtins / arm / sync_fetch_and_sub_8.S
blob25a4a107655558bacea66c7a520142ac27432a15
1 //===-- sync_fetch_and_sub_8.S - ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the __sync_fetch_and_sub_8 function for the ARM
10 // architecture.
12 //===----------------------------------------------------------------------===//
14 #include "sync-ops.h"
16 #if __ARM_ARCH_PROFILE != 'M'
17 #define sub_8(rD_LO, rD_HI, rN_LO, rN_HI, rM_LO, rM_HI) \
18     subs rD_LO, rN_LO, rM_LO ; \
19     sbc rD_HI, rN_HI, rM_HI
21 SYNC_OP_8(sub_8)
22 #endif
24 NO_EXEC_STACK_DIRECTIVE