[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / libcxx / include / __bit / bit_floor.h
blob133e369504e431c137505bf48affd394eb2c5bdb
1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef _LIBCPP___BIT_BIT_FLOOR_H
10 #define _LIBCPP___BIT_BIT_FLOOR_H
12 #include <__bit/bit_log2.h>
13 #include <__concepts/arithmetic.h>
14 #include <__config>
15 #include <limits>
17 #if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
18 # pragma GCC system_header
19 #endif
21 _LIBCPP_BEGIN_NAMESPACE_STD
23 #if _LIBCPP_STD_VER >= 20
25 template <__libcpp_unsigned_integer _Tp>
26 [[nodiscard]] _LIBCPP_HIDE_FROM_ABI constexpr _Tp bit_floor(_Tp __t) noexcept {
27 return __t == 0 ? 0 : _Tp{1} << std::__bit_log2(__t);
30 #endif // _LIBCPP_STD_VER >= 20
32 _LIBCPP_END_NAMESPACE_STD
34 #endif // _LIBCPP___BIT_BIT_FLOOR_H