[ELF] Make section member orders consistent
[llvm-project.git] / lld / test / ELF / arm-exidx-add-missing.s
blob856b1d2932047f0c6eba023386b9b35fccff14fd
1 // REQUIRES: arm
2 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi --arm-add-build-attributes %s -o %t
3 // RUN: ld.lld %t --no-merge-exidx-entries -o %t2
4 // RUN: llvm-objdump -s %t2 | FileCheck %s
5 // RUN: ld.lld %t -o %t3
6 // RUN: llvm-objdump -s %t3 | FileCheck %s --check-prefix=CHECK-MERGE
8 /// The ARM.exidx section is a table of 8-byte entries of the form:
9 /// | PREL31 Relocation to start of function | Unwinding information |
10 /// The range of addresses covered by the table entry is terminated by the
11 /// next table entry. This means that an executable section without a .ARM.exidx
12 /// section does not terminate the range of addresses. To fix this the linker
13 /// synthesises an EXIDX_CANTUNWIND entry for each section without a .ARM.exidx
14 /// section.
16 .syntax unified
18 /// Expect inline unwind instructions
19 .section .text.01, "ax", %progbits
20 .global f1
21 f1:
22 .fnstart
23 bx lr
24 .save {r7, lr}
25 .setfp r7, sp, #0
26 .fnend
28 /// Expect no unwind information from assembler. The linker must
29 /// synthesise an EXIDX_CANTUNWIND entry to prevent an exception
30 /// thrown through f2 from matching against the unwind instructions
31 /// for f1.
32 .section .text.02, "ax", %progbits
33 .global f2
34 f2:
35 bx lr
38 /// Expect 1 EXIDX_CANTUNWIND entry that can be merged into the linker
39 /// generated EXIDX_CANTUNWIND as if the assembler had generated it.
40 .section .text.03, "ax",%progbits
41 .global f3
42 f3:
43 .fnstart
44 bx lr
45 .cantunwind
46 .fnend
48 /// Dummy implementation of personality routines to satisfy reference
49 /// from exception tables, linker will generate EXIDX_CANTUNWIND.
50 .section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
51 .global __aeabi_unwind_cpp_pr0
52 __aeabi_unwind_cpp_pr0:
53 bx lr
55 /// f1, f2
56 // CHECK: 100d4 28000100 08849780 24000100 01000000
57 /// f3, __aeabi_unwind_cpp_pr0
58 // CHECK-NEXT: 100e4 20000100 01000000 1c000100 01000000
59 /// sentinel
60 // CHECK-NEXT: 100f4 18000100 01000000
62 /// f1, (f2, f3, __aeabi_unwind_cpp_pr0)
63 // CHECK-MERGE: 100d4 18000100 08849780 14000100 01000000
64 /// sentinel
65 // CHECK-MERGE-NEXT: 100e4 18000100 01000000