4 # RUN: llvm-readelf -r --wide %p/Inputs/ppc64le-quadword-ldst.o | FileCheck --check-prefix=QuadInputRelocs %s
6 # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
7 # RUN: ld.lld -shared %t2.o -o %t2.so
9 # RUN: ld.lld %t2.so %p/Inputs/ppc64le-quadword-ldst.o -o %t
10 # RUN: llvm-objdump -d %t | FileCheck --check-prefix=Dis %s
12 # RUN: ld.lld --no-toc-optimize %t2.so %p/Inputs/ppc64le-quadword-ldst.o -o %t
13 # RUN: llvm-objdump -d %t | FileCheck --check-prefix=NoOpt %s
15 # QuadInputRelocs: Relocation section '.rela.text'
16 # QuadInputRelocs: R_PPC64_TOC16_LO_DS 0000000000000000 quadLd
17 # QuadInputRelocs: R_PPC64_TOC16_LO_DS 0000000000000010 quadSt
19 # The powerpc backend doesn't support the quadword load/store instructions yet.
20 # So they are tested by linking against an object file assembled with
21 # `as -mpower9 -o ppc64le-quadword-ldst.o in.s` and checking the encoding of
22 # the unknown instructions in the dissasembly. Source used as input:
26 # addis 2, 12, .TOC.-.Lgep_quads@ha
27 # addi 2, 2, .TOC.-.Lgep_quads@l
29 #.localentry quads, .Llep_quads-.Lgep_quads
30 # addis 3, 2, quadLd@toc@ha
31 # lq 4, quadLd@toc@l(3)
32 # addis 3, 2, quadSt@toc@ha
33 # stq 4, quadSt@toc@l(3)
44 # e0 82 7f 70 decodes to | 111000 | 00100 | 00010 | 16-bit imm |
45 # | 56 | 4 | 2 | 32624 |
46 # which is `lq r4, 32624(r2)`
47 # f8 82 7f 82 decodes to | 111110 | 00100 | 00010 | 14-bit imm | 10 |
48 # | 62 | 4 | 2 | 8160 | 2 |
49 # The immediate represents a word offset so this dissasembles to:
55 # Dis-NEXT: 70 7f 82 e0 <unknown>
57 # Dis-NEXT: 82 7f 82 f8 <unknown>
60 # e0 83 7f 70 decodes to | 111000 | 00100 | 00011 | 16-bit imm |
61 # | 56 | 4 | 3 | 32624 |
63 # f8 83 7f 82 decodes to | 111110 | 00100 | 00010 | 14-bit imm | 10 |
64 # | 62 | 4 | 2 | 8160 | 2 |
69 # NoOpt-NEXT: addis 3, 2, 0
70 # NoOpt-NEXT: 70 7f 83 e0 <unknown>
71 # NoOpt-NEXT: addis 3, 2, 0
72 # NoOpt-NEXT: 82 7f 83 f8 <unknown>