1 //===--- PPCSchedPredicates.td - PowerPC Scheduling Preds -*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
10 // This file defines scheduling predicate definitions that are used by the
11 // PowerPC subtargets.
12 //===----------------------------------------------------------------------===//
13 // Identify instructions that write BF pipelines with 7 cycles.
14 def P10W_BF_7C_Pred : MCSchedPredicate<
109 XSCVDPSXDS, XSCVDPSXDSs,
110 XSCVDPSXWS, XSCVDPSXWSs,
111 XSCVDPUXDS, XSCVDPUXDSs,
112 XSCVDPUXWS, XSCVDPUXWSs,
206 // Identify instructions that write CY pipelines with 7 cycles.
207 def P10W_CY_7C_Pred : MCSchedPredicate<
230 // Identify instructions that write MM pipelines with 10 cycles.
231 def P10W_MM_10C_Pred : MCSchedPredicate<
232 CheckOpcode<[PMXVBF16GER2,