[TableGen] Fix validateOperandClass for non Phyical Reg (#118146)
[llvm-project.git] / llvm / lib / Target / PowerPC / PPCSubtarget.cpp
blob57b650575a8984c27f61416f14a50fba65ab7564
1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PPC specific subclass of TargetSubtargetInfo.
11 //===----------------------------------------------------------------------===//
13 #include "PPCSubtarget.h"
14 #include "GISel/PPCCallLowering.h"
15 #include "GISel/PPCLegalizerInfo.h"
16 #include "GISel/PPCRegisterBankInfo.h"
17 #include "PPC.h"
18 #include "PPCRegisterInfo.h"
19 #include "PPCTargetMachine.h"
20 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
21 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineScheduler.h"
24 #include "llvm/IR/GlobalAlias.h"
25 #include "llvm/IR/GlobalValue.h"
26 #include "llvm/IR/GlobalVariable.h"
27 #include "llvm/MC/TargetRegistry.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Target/TargetMachine.h"
30 #include "llvm/TargetParser/PPCTargetParser.h"
31 #include <cstdlib>
33 using namespace llvm;
35 #define DEBUG_TYPE "ppc-subtarget"
37 #define GET_SUBTARGETINFO_TARGET_DESC
38 #define GET_SUBTARGETINFO_CTOR
39 #include "PPCGenSubtargetInfo.inc"
41 static cl::opt<bool>
42 EnableMachinePipeliner("ppc-enable-pipeliner",
43 cl::desc("Enable Machine Pipeliner for PPC"),
44 cl::init(false), cl::Hidden);
46 PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
47 StringRef TuneCPU,
48 StringRef FS) {
49 initializeEnvironment();
50 initSubtargetFeatures(CPU, TuneCPU, FS);
51 return *this;
54 PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
55 const std::string &TuneCPU, const std::string &FS,
56 const PPCTargetMachine &TM)
57 : PPCGenSubtargetInfo(TT, CPU, TuneCPU, FS), TargetTriple(TT),
58 IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
59 TargetTriple.getArch() == Triple::ppc64le),
60 TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
61 InstrInfo(*this), TLInfo(TM, *this) {
62 CallLoweringInfo.reset(new PPCCallLowering(*getTargetLowering()));
63 Legalizer.reset(new PPCLegalizerInfo(*this));
64 auto *RBI = new PPCRegisterBankInfo(*getRegisterInfo());
65 RegBankInfo.reset(RBI);
67 InstSelector.reset(createPPCInstructionSelector(TM, *this, *RBI));
70 void PPCSubtarget::initializeEnvironment() {
71 StackAlignment = Align(16);
72 CPUDirective = PPC::DIR_NONE;
73 HasPOPCNTD = POPCNTD_Unavailable;
76 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
77 StringRef FS) {
78 // Determine default and user specified characteristics
79 std::string CPUName = std::string(CPU);
80 if (CPUName.empty() || CPU == "generic") {
81 if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
82 CPUName = "e500";
83 else
84 CPUName = std::string(PPC::getNormalizedPPCTargetCPU(TargetTriple));
87 // Determine the CPU to schedule for.
88 if (TuneCPU.empty()) TuneCPU = CPUName;
90 // Initialize scheduling itinerary for the specified CPU.
91 InstrItins = getInstrItineraryForCPU(CPUName);
93 // Parse features string.
94 ParseSubtargetFeatures(CPUName, TuneCPU, FS);
96 // If the user requested use of 64-bit regs, but the cpu selected doesn't
97 // support it, ignore.
98 if (IsPPC64 && has64BitSupport())
99 Use64BitRegs = true;
101 if (TargetTriple.isPPC32SecurePlt())
102 IsSecurePlt = true;
104 if (HasSPE && IsPPC64)
105 report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
106 if (HasSPE && (HasAltivec || HasVSX || HasFPU))
107 report_fatal_error(
108 "SPE and traditional floating point cannot both be enabled.\n", false);
110 // If not SPE, set standard FPU
111 if (!HasSPE)
112 HasFPU = true;
114 StackAlignment = getPlatformStackAlignment();
116 // Determine endianness.
117 IsLittleEndian = TM.isLittleEndian();
119 if (HasAIXSmallLocalExecTLS || HasAIXSmallLocalDynamicTLS) {
120 if (!TargetTriple.isOSAIX() || !IsPPC64)
121 report_fatal_error("The aix-small-local-[exec|dynamic]-tls attribute is "
122 "only supported on AIX in "
123 "64-bit mode.\n",
124 false);
125 // The aix-small-local-[exec|dynamic]-tls attribute should only be used with
126 // -data-sections, as having data sections turned off with this option
127 // is not ideal for performance. Moreover, the
128 // small-local-[exec|dynamic]-tls region is a limited resource, and should
129 // not be used for variables that may be replaced.
130 if (!TM.getDataSections())
131 report_fatal_error("The aix-small-local-[exec|dynamic]-tls attribute can "
132 "only be specified with "
133 "-data-sections.\n",
134 false);
137 if (HasAIXShLibTLSModelOpt && (!TargetTriple.isOSAIX() || !IsPPC64))
138 report_fatal_error("The aix-shared-lib-tls-model-opt attribute "
139 "is only supported on AIX in 64-bit mode.\n",
140 false);
143 bool PPCSubtarget::enableMachineScheduler() const { return true; }
145 bool PPCSubtarget::enableMachinePipeliner() const {
146 return getSchedModel().hasInstrSchedModel() && EnableMachinePipeliner;
149 bool PPCSubtarget::useDFAforSMS() const { return false; }
151 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
152 bool PPCSubtarget::enablePostRAScheduler() const { return true; }
154 PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
155 return TargetSubtargetInfo::ANTIDEP_ALL;
158 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
159 CriticalPathRCs.clear();
160 CriticalPathRCs.push_back(isPPC64() ?
161 &PPC::G8RCRegClass : &PPC::GPRCRegClass);
164 void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
165 unsigned NumRegionInstrs) const {
166 // The GenericScheduler that we use defaults to scheduling bottom up only.
167 // We want to schedule from both the top and the bottom and so we set
168 // OnlyBottomUp to false.
169 // We want to do bi-directional scheduling since it provides a more balanced
170 // schedule leading to better performance.
171 Policy.OnlyBottomUp = false;
172 // Spilling is generally expensive on all PPC cores, so always enable
173 // register-pressure tracking.
174 Policy.ShouldTrackPressure = true;
177 bool PPCSubtarget::useAA() const {
178 return true;
181 bool PPCSubtarget::enableSubRegLiveness() const { return true; }
183 bool PPCSubtarget::isGVIndirectSymbol(const GlobalValue *GV) const {
184 if (isAIXABI()) {
185 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
186 // On AIX the only symbols that aren't indirect are toc-data.
187 return !GVar->hasAttribute("toc-data");
189 return true;
192 // Large code model always uses the TOC even for local symbols.
193 if (TM.getCodeModel() == CodeModel::Large)
194 return true;
196 if (TM.shouldAssumeDSOLocal(GV))
197 return false;
198 return true;
201 CodeModel::Model PPCSubtarget::getCodeModel(const TargetMachine &TM,
202 const GlobalValue *GV) const {
203 // If there isn't an attribute to override the module code model
204 // this will be the effective code model.
205 CodeModel::Model ModuleModel = TM.getCodeModel();
207 // Initially support per global code model for AIX only.
208 if (!isAIXABI())
209 return ModuleModel;
211 // Only GlobalVariables carry an attribute which can override the module code
212 // model.
213 assert(GV && "Unexpected NULL GlobalValue");
214 const GlobalVariable *GlobalVar =
215 [](const GlobalValue *GV) -> const GlobalVariable * {
216 const GlobalVariable *Var = dyn_cast<GlobalVariable>(GV);
217 if (Var)
218 return Var;
220 const GlobalAlias *Alias = dyn_cast<GlobalAlias>(GV);
221 if (Alias)
222 return dyn_cast<GlobalVariable>(Alias->getAliaseeObject());
224 return nullptr;
225 }(GV);
227 if (!GlobalVar)
228 return ModuleModel;
230 std::optional<CodeModel::Model> MaybeCodeModel = GlobalVar->getCodeModel();
231 if (MaybeCodeModel) {
232 CodeModel::Model CM = *MaybeCodeModel;
233 assert((CM == CodeModel::Small || CM == CodeModel::Large) &&
234 "invalid code model for AIX");
235 return CM;
238 return ModuleModel;
241 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
242 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
244 bool PPCSubtarget::isUsingPCRelativeCalls() const {
245 return isPPC64() && hasPCRelativeMemops() && isELFv2ABI() &&
246 CodeModel::Medium == getTargetMachine().getCodeModel();
249 // GlobalISEL
250 const CallLowering *PPCSubtarget::getCallLowering() const {
251 return CallLoweringInfo.get();
254 const RegisterBankInfo *PPCSubtarget::getRegBankInfo() const {
255 return RegBankInfo.get();
258 const LegalizerInfo *PPCSubtarget::getLegalizerInfo() const {
259 return Legalizer.get();
262 InstructionSelector *PPCSubtarget::getInstructionSelector() const {
263 return InstSelector.get();