1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
4 ; These tests just check that the plumbing is in place for @llvm.bitreverse.
6 declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone
8 define <2 x i16> @f(<2 x i16> %a) {
11 ; CHECK-NEXT: rev32 v0.8b, v0.8b
12 ; CHECK-NEXT: rbit v0.8b, v0.8b
13 ; CHECK-NEXT: ushr v0.2s, v0.2s, #16
15 %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
19 declare i8 @llvm.bitreverse.i8(i8) readnone
24 ; CHECK-NEXT: rbit w8, w0
25 ; CHECK-NEXT: lsr w0, w8, #24
27 %b = call i8 @llvm.bitreverse.i8(i8 %a)
31 declare i16 @llvm.bitreverse.i16(i16) readnone
33 define i16 @g_16(i16 %a) {
36 ; CHECK-NEXT: rbit w8, w0
37 ; CHECK-NEXT: lsr w0, w8, #16
39 %b = call i16 @llvm.bitreverse.i16(i16 %a)
43 declare i32 @llvm.bitreverse.i32(i32) readnone
45 define i32 @g_32(i32 %a) {
48 ; CHECK-NEXT: rbit w0, w0
50 %b = call i32 @llvm.bitreverse.i32(i32 %a)
54 declare i64 @llvm.bitreverse.i64(i64) readnone
56 define i64 @g_64(i64 %a) {
59 ; CHECK-NEXT: rbit x0, x0
61 %b = call i64 @llvm.bitreverse.i64(i64 %a)
65 declare <8 x i8> @llvm.bitreverse.v8i8(<8 x i8>) readnone
67 define <8 x i8> @g_vec(<8 x i8> %a) {
70 ; CHECK-NEXT: rbit v0.8b, v0.8b
72 %b = call <8 x i8> @llvm.bitreverse.v8i8(<8 x i8> %a)
76 declare <16 x i8> @llvm.bitreverse.v16i8(<16 x i8>) readnone
78 define <16 x i8> @g_vec_16x8(<16 x i8> %a) {
79 ; CHECK-LABEL: g_vec_16x8:
81 ; CHECK-NEXT: rbit v0.16b, v0.16b
83 %b = call <16 x i8> @llvm.bitreverse.v16i8(<16 x i8> %a)
87 declare <4 x i16> @llvm.bitreverse.v4i16(<4 x i16>) readnone
89 define <4 x i16> @g_vec_4x16(<4 x i16> %a) {
90 ; CHECK-LABEL: g_vec_4x16:
92 ; CHECK-NEXT: rev16 v0.8b, v0.8b
93 ; CHECK-NEXT: rbit v0.8b, v0.8b
95 %b = call <4 x i16> @llvm.bitreverse.v4i16(<4 x i16> %a)
99 declare <8 x i16> @llvm.bitreverse.v8i16(<8 x i16>) readnone
101 define <8 x i16> @g_vec_8x16(<8 x i16> %a) {
102 ; CHECK-LABEL: g_vec_8x16:
104 ; CHECK-NEXT: rev16 v0.16b, v0.16b
105 ; CHECK-NEXT: rbit v0.16b, v0.16b
107 %b = call <8 x i16> @llvm.bitreverse.v8i16(<8 x i16> %a)
111 declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) readnone
113 define <2 x i32> @g_vec_2x32(<2 x i32> %a) {
114 ; CHECK-LABEL: g_vec_2x32:
116 ; CHECK-NEXT: rev32 v0.8b, v0.8b
117 ; CHECK-NEXT: rbit v0.8b, v0.8b
120 %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
124 declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) readnone
126 define <4 x i32> @g_vec_4x32(<4 x i32> %a) {
127 ; CHECK-LABEL: g_vec_4x32:
129 ; CHECK-NEXT: rev32 v0.16b, v0.16b
130 ; CHECK-NEXT: rbit v0.16b, v0.16b
132 %b = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %a)
136 declare <1 x i64> @llvm.bitreverse.v1i64(<1 x i64>) readnone
138 define <1 x i64> @g_vec_1x64(<1 x i64> %a) {
139 ; CHECK-LABEL: g_vec_1x64:
141 ; CHECK-NEXT: rev64 v0.8b, v0.8b
142 ; CHECK-NEXT: rbit v0.8b, v0.8b
144 %b = call <1 x i64> @llvm.bitreverse.v1i64(<1 x i64> %a)
148 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) readnone
150 define <2 x i64> @g_vec_2x64(<2 x i64> %a) {
151 ; CHECK-LABEL: g_vec_2x64:
153 ; CHECK-NEXT: rev64 v0.16b, v0.16b
154 ; CHECK-NEXT: rbit v0.16b, v0.16b
156 %b = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %a)