[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / llvm / test / CodeGen / AArch64 / fptosi-strictfp.ll
blobcd27a79971e611144f724c3cb77037413b88b93f
1 ; RUN: llc < %s | FileCheck %s
2 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
3 target triple = "aarch64"
5 define i128 @test_fixtfti(fp128 %ld) #0 {
6 ; CHECK-LABEL: test_fixtfti:
7 ; CHECK: bl     __fixtfti
8 entry:
9   %conv = call i128 @llvm.experimental.constrained.fptosi.i128.f128(fp128 %ld, metadata !"fpexcept.strict") #0
10   ret i128 %conv
13 declare i128 @llvm.experimental.constrained.fptosi.i128.f128(fp128, metadata)
15 define i128 @test_fixtftu(fp128 %ld) #0 {
16 ; CHECK-LABEL: test_fixtftu:
17 ; CHECK: bl     __fixunstfti
18 entry:
19   %conv = call i128 @llvm.experimental.constrained.fptoui.i128.f128(fp128 %ld, metadata !"fpexcept.strict") #0
20   ret i128 %conv
23 declare i128 @llvm.experimental.constrained.fptoui.i128.f128(fp128, metadata)
25 attributes #0 = { strictfp }