[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / llvm / test / CodeGen / AArch64 / sme-support-routines-calling-convention.ll
blob63c65334afe1195ee5143069e1e53e8aefbf781d
1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs < %s | FileCheck %s
2 ; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+sme -verify-machineinstrs < %s | FileCheck %s --check-prefix=DARWIN
3 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefix=CHECK-CSRMASK
4 ; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+sme -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefix=CHECK-CSRMASK
6 ; Test that the PCS attribute is accepted and uses the correct register mask.
9 define void @test_sme_calling_convention_x0() nounwind {
10 ; CHECK-LABEL: test_sme_calling_convention_x0:
11 ; CHECK:       // %bb.0:
12 ; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
13 ; CHECK-NEXT:    bl __arm_tpidr2_save
14 ; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
15 ; CHECK-NEXT:    ret
16 ; DARWIN-LABEL: test_sme_calling_convention_x0:
17 ; DARWIN:    stp        x29, x30, [sp, #-16]!
18 ; DARWIN:    bl ___arm_tpidr2_save
19 ; DARWIN:    ldp        x29, x30, [sp], #16
20 ; DARWIN:    ret
22 ; CHECK-CSRMASK-LABEL: name: test_sme_calling_convention_x0
23 ; CHECK-CSRMASK: BL @__arm_tpidr2_save, csr_aarch64_sme_abi_support_routines_preservemost_from_x0
24   call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
25   ret void
28 define i64 @test_sme_calling_convention_x1() nounwind {
29 ; CHECK-LABEL: test_sme_calling_convention_x1:
30 ; CHECK:       // %bb.0:
31 ; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
32 ; CHECK-NEXT:    bl __arm_get_current_vg
33 ; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
34 ; CHECK-NEXT:    ret
35 ; DARWIN-LABEL: test_sme_calling_convention_x1:
36 ; DARWIN:    stp        x29, x30, [sp, #-16]!
37 ; DARWIN:    bl ___arm_get_current_vg
38 ; DARWIN:    ldp        x29, x30, [sp], #16
39 ; DARWIN:    ret
41 ; CHECK-CSRMASK-LABEL: name: test_sme_calling_convention_x1
42 ; CHECK-CSRMASK: BL @__arm_get_current_vg, csr_aarch64_sme_abi_support_routines_preservemost_from_x1
43   %vg = call aarch64_sme_preservemost_from_x1 i64 @__arm_get_current_vg()
44   ret i64 %vg
47 define i64 @test_sme_calling_convention_x2() nounwind {
48 ; CHECK-LABEL: test_sme_calling_convention_x2:
49 ; CHECK:       // %bb.0:
50 ; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
51 ; CHECK-NEXT:    bl __arm_sme_state
52 ; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
53 ; CHECK-NEXT:    ret
54 ; DARWIN-LABEL: test_sme_calling_convention_x2:
55 ; DARWIN:    stp        x29, x30, [sp, #-16]!
56 ; DARWIN:    bl ___arm_sme_state
57 ; DARWIN:    ldp        x29, x30, [sp], #16
58 ; DARWIN:    ret
60 ; CHECK-CSRMASK-LABEL: name: test_sme_calling_convention_x2
61 ; CHECK-CSRMASK: BL @__arm_sme_state, csr_aarch64_sme_abi_support_routines_preservemost_from_x2
62   %pstate = call aarch64_sme_preservemost_from_x2 {i64, i64} @__arm_sme_state()
63   %pstate.sm = extractvalue {i64, i64} %pstate, 0
64   ret i64 %pstate.sm
67 declare void @__arm_tpidr2_save()
68 declare i64 @__arm_get_current_vg()
69 declare {i64, i64} @__arm_sme_state()