[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / llvm / test / CodeGen / CSKY / switch.ll
blobdce857964042834b61226fca6f459eccb839111c
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
3 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=small -mattr=+2e3 | FileCheck %s --check-prefix=CHECK-PIC-SMALL
4 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=large -mattr=+2e3 | FileCheck %s --check-prefix=CHECK-PIC-LARGE
6 define i32 @f(i32 %val) {
7 ; CHECK-LABEL: f:
8 ; CHECK:       # %bb.0: # %entry
9 ; CHECK-NEXT:    movi16 a1, 4
10 ; CHECK-NEXT:    cmphs16 a1, a0
11 ; CHECK-NEXT:    bf32 .LBB0_7
12 ; CHECK-NEXT:  # %bb.1: # %entry
13 ; CHECK-NEXT:    lrw32 a1, [.LCPI0_0]
14 ; CHECK-NEXT:    ldr32.w a0, (a1, a0 << 2)
15 ; CHECK-NEXT:    jmp32 a0
16 ; CHECK-NEXT:  .LBB0_2: # %onzero
17 ; CHECK-NEXT:    movi16 a0, 0
18 ; CHECK-NEXT:    rts16
19 ; CHECK-NEXT:  .LBB0_3: # %onthree
20 ; CHECK-NEXT:    movi16 a0, 3
21 ; CHECK-NEXT:    rts16
22 ; CHECK-NEXT:  .LBB0_4: # %ontwo
23 ; CHECK-NEXT:    movi16 a0, 2
24 ; CHECK-NEXT:    rts16
25 ; CHECK-NEXT:  .LBB0_5: # %onfour
26 ; CHECK-NEXT:    movi16 a0, 4
27 ; CHECK-NEXT:    rts16
28 ; CHECK-NEXT:  .LBB0_6: # %onone
29 ; CHECK-NEXT:    movi16 a0, 1
30 ; CHECK-NEXT:    rts16
31 ; CHECK-NEXT:  .LBB0_7: # %otherwise
32 ; CHECK-NEXT:    movih32 a0, 65535
33 ; CHECK-NEXT:    ori32 a0, a0, 65535
34 ; CHECK-NEXT:    rts16
35 ; CHECK-NEXT:    .p2align 1
36 ; CHECK-NEXT:  # %bb.8:
37 ; CHECK-NEXT:    .p2align 2, 0x0
38 ; CHECK-NEXT:  .LCPI0_0:
39 ; CHECK-NEXT:    .long .LJTI0_0
41 ; CHECK-PIC-SMALL-LABEL: f:
42 ; CHECK-PIC-SMALL:       # %bb.0: # %entry
43 ; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 4
44 ; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 4
45 ; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 0) # 4-byte Folded Spill
46 ; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
47 ; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 4
48 ; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI0_0]
49 ; CHECK-PIC-SMALL-NEXT:    movi16 a1, 4
50 ; CHECK-PIC-SMALL-NEXT:    cmphs16 a1, a0
51 ; CHECK-PIC-SMALL-NEXT:    bf32 .LBB0_7
52 ; CHECK-PIC-SMALL-NEXT:  # %bb.1: # %entry
53 ; CHECK-PIC-SMALL-NEXT:    lrw32 a1, [.LCPI0_1]
54 ; CHECK-PIC-SMALL-NEXT:    addu32 a1, rgb, a1
55 ; CHECK-PIC-SMALL-NEXT:    ldr32.w a0, (a1, a0 << 2)
56 ; CHECK-PIC-SMALL-NEXT:    addu16 a0, a1
57 ; CHECK-PIC-SMALL-NEXT:    jmp32 a0
58 ; CHECK-PIC-SMALL-NEXT:  .LBB0_2: # %onzero
59 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 0
60 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
61 ; CHECK-PIC-SMALL-NEXT:  .LBB0_3: # %onthree
62 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 3
63 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
64 ; CHECK-PIC-SMALL-NEXT:  .LBB0_4: # %ontwo
65 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 2
66 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
67 ; CHECK-PIC-SMALL-NEXT:  .LBB0_5: # %onfour
68 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 4
69 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
70 ; CHECK-PIC-SMALL-NEXT:  .LBB0_6: # %onone
71 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 1
72 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
73 ; CHECK-PIC-SMALL-NEXT:  .LBB0_7: # %otherwise
74 ; CHECK-PIC-SMALL-NEXT:    movih32 a0, 65535
75 ; CHECK-PIC-SMALL-NEXT:    ori32 a0, a0, 65535
76 ; CHECK-PIC-SMALL-NEXT:  .LBB0_8: # %onone
77 ; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
78 ; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 4
79 ; CHECK-PIC-SMALL-NEXT:    rts16
80 ; CHECK-PIC-SMALL-NEXT:    .p2align 1
81 ; CHECK-PIC-SMALL-NEXT:  # %bb.9:
82 ; CHECK-PIC-SMALL-NEXT:    .p2align 2, 0x0
83 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_0:
84 ; CHECK-PIC-SMALL-NEXT:    .long _GLOBAL_OFFSET_TABLE_
85 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_1:
86 ; CHECK-PIC-SMALL-NEXT:    .long .LJTI0_0@GOTOFF
88 ; CHECK-PIC-LARGE-LABEL: f:
89 ; CHECK-PIC-LARGE:       # %bb.0: # %entry
90 ; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 4
91 ; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 4
92 ; CHECK-PIC-LARGE-NEXT:    st32.w rgb, (sp, 0) # 4-byte Folded Spill
93 ; CHECK-PIC-LARGE-NEXT:    .cfi_offset rgb, -4
94 ; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 4
95 ; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI0_0]
96 ; CHECK-PIC-LARGE-NEXT:    movi16 a1, 4
97 ; CHECK-PIC-LARGE-NEXT:    cmphs16 a1, a0
98 ; CHECK-PIC-LARGE-NEXT:    bf32 .LBB0_7
99 ; CHECK-PIC-LARGE-NEXT:  # %bb.1: # %entry
100 ; CHECK-PIC-LARGE-NEXT:    lrw32 a1, [.LCPI0_1]
101 ; CHECK-PIC-LARGE-NEXT:    addu32 a1, rgb, a1
102 ; CHECK-PIC-LARGE-NEXT:    ldr32.w a0, (a1, a0 << 2)
103 ; CHECK-PIC-LARGE-NEXT:    addu16 a0, a1
104 ; CHECK-PIC-LARGE-NEXT:    jmp32 a0
105 ; CHECK-PIC-LARGE-NEXT:  .LBB0_2: # %onzero
106 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 0
107 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
108 ; CHECK-PIC-LARGE-NEXT:  .LBB0_3: # %onthree
109 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 3
110 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
111 ; CHECK-PIC-LARGE-NEXT:  .LBB0_4: # %ontwo
112 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 2
113 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
114 ; CHECK-PIC-LARGE-NEXT:  .LBB0_5: # %onfour
115 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 4
116 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
117 ; CHECK-PIC-LARGE-NEXT:  .LBB0_6: # %onone
118 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 1
119 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
120 ; CHECK-PIC-LARGE-NEXT:  .LBB0_7: # %otherwise
121 ; CHECK-PIC-LARGE-NEXT:    movih32 a0, 65535
122 ; CHECK-PIC-LARGE-NEXT:    ori32 a0, a0, 65535
123 ; CHECK-PIC-LARGE-NEXT:  .LBB0_8: # %onone
124 ; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
125 ; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 4
126 ; CHECK-PIC-LARGE-NEXT:    rts16
127 ; CHECK-PIC-LARGE-NEXT:    .p2align 1
128 ; CHECK-PIC-LARGE-NEXT:  # %bb.9:
129 ; CHECK-PIC-LARGE-NEXT:    .p2align 2, 0x0
130 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_0:
131 ; CHECK-PIC-LARGE-NEXT:    .long _GLOBAL_OFFSET_TABLE_
132 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_1:
133 ; CHECK-PIC-LARGE-NEXT:    .long .LJTI0_0@GOTOFF
134 entry:
135   switch i32 %val, label %otherwise [ i32 0, label %onzero
136                                       i32 1, label %onone
137                                       i32 3, label %onfour
138                                       i32 4, label %onthree
139                                       i32 2, label %ontwo ]
140 onone:
141   ret i32 1
142 ontwo:
143   ret i32 2
144 onzero:
145   ret i32 0
146 onfour:
147   ret i32 4
148 onthree:
149   ret i32 3
150 otherwise:
151   ret i32 -1