1 ; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -vec-extabi -verify-machineinstrs -mcpu=pwr7 \
2 ; RUN: -mattr=+altivec -stop-after=prologepilog < %s | \
3 ; RUN: FileCheck --check-prefix=MIR32 %s
5 ; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \
6 ; RUN: -mcpu=pwr7 -mattr=+altivec < %s | \
7 ; RUN: FileCheck --check-prefix=ASM32 %s
9 ; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \
10 ; RUN: -mcpu=pwr7 -mattr=+altivec -stop-after=prologepilog < %s | \
11 ; RUN: FileCheck --check-prefix=MIR64 %s
13 ; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \
14 ; RUN: -mcpu=pwr7 -mattr=+altivec < %s | \
15 ; RUN: FileCheck --check-prefix=ASM64 %s
18 define dso_local void @vec_regs() {
20 call void asm sideeffect "", "~{v13},~{v20},~{v26},~{v31}"()
24 ; MIR32: name: vec_regs
26 ; MIR32-LABEL: fixedStack:
27 ; MIR32-NEXT: - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: default,
28 ; MIR32-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '',
29 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
30 ; MIR32-NEXT: - { id: 1, type: spill-slot, offset: -32, size: 16, alignment: 16, stack-id: default,
31 ; MIR32-NEXT: callee-saved-register: '$v30', callee-saved-restored: true, debug-info-variable: '',
32 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
33 ; MIR32-NEXT: - { id: 2, type: spill-slot, offset: -48, size: 16, alignment: 16, stack-id: default,
34 ; MIR32-NEXT: callee-saved-register: '$v29', callee-saved-restored: true, debug-info-variable: '',
35 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
36 ; MIR32-NEXT: - { id: 3, type: spill-slot, offset: -64, size: 16, alignment: 16, stack-id: default,
37 ; MIR32-NEXT: callee-saved-register: '$v28', callee-saved-restored: true, debug-info-variable: '',
38 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
39 ; MIR32-NEXT: - { id: 4, type: spill-slot, offset: -80, size: 16, alignment: 16, stack-id: default,
40 ; MIR32-NEXT: callee-saved-register: '$v27', callee-saved-restored: true, debug-info-variable: '',
41 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
42 ; MIR32-NEXT: - { id: 5, type: spill-slot, offset: -96, size: 16, alignment: 16, stack-id: default,
43 ; MIR32-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '',
44 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
45 ; MIR32-NEXT: - { id: 6, type: spill-slot, offset: -112, size: 16, alignment: 16, stack-id: default,
46 ; MIR32-NEXT: callee-saved-register: '$v25', callee-saved-restored: true, debug-info-variable: '',
47 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
48 ; MIR32-NEXT: - { id: 7, type: spill-slot, offset: -128, size: 16, alignment: 16, stack-id: default,
49 ; MIR32-NEXT: callee-saved-register: '$v24', callee-saved-restored: true, debug-info-variable: '',
50 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
51 ; MIR32-NEXT: - { id: 8, type: spill-slot, offset: -144, size: 16, alignment: 16, stack-id: default,
52 ; MIR32-NEXT: callee-saved-register: '$v23', callee-saved-restored: true, debug-info-variable: '',
53 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
54 ; MIR32-NEXT: - { id: 9, type: spill-slot, offset: -160, size: 16, alignment: 16, stack-id: default,
55 ; MIR32-NEXT: callee-saved-register: '$v22', callee-saved-restored: true, debug-info-variable: '',
56 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
57 ; MIR32-NEXT: - { id: 10, type: spill-slot, offset: -176, size: 16, alignment: 16,
58 ; MIR32-NEXT: stack-id: default, callee-saved-register: '$v21', callee-saved-restored: true,
59 ; MIR32-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
60 ; MIR32-NEXT: - { id: 11, type: spill-slot, offset: -192, size: 16, alignment: 16,
61 ; MIR32-NEXT: stack-id: default, callee-saved-register: '$v20', callee-saved-restored: true,
62 ; MIR32-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
65 ; MIR32: liveins: $v20, $v21, $v22, $v23, $v24, $v25, $v26, $v27, $v28, $v29, $v30, $v31
67 ; MIR32-DAG: STXVD2X killed $v20, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.11)
68 ; MIR32-DAG: STXVD2X killed $v21, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.10)
69 ; MIR32-DAG: STXVD2X killed $v22, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.9)
70 ; MIR32-DAG: STXVD2X killed $v23, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.8)
71 ; MIR32-DAG: STXVD2X killed $v24, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.7)
72 ; MIR32-DAG: STXVD2X killed $v25, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.6)
73 ; MIR32-DAG: STXVD2X killed $v26, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.5)
74 ; MIR32-DAG: STXVD2X killed $v27, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.4)
75 ; MIR32-DAG: STXVD2X killed $v28, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.3)
76 ; MIR32-DAG: STXVD2X killed $v29, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.2)
77 ; MIR32-DAG: STXVD2X killed $v30, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1)
78 ; MIR32-DAG: STXVD2X killed $v31, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.0)
82 ; MIR32-DAG: $v31 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.0)
83 ; MIR32-DAG: $v30 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.1)
84 ; MIR32-DAG: $v29 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.2)
85 ; MIR32-DAG: $v28 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.3)
86 ; MIR32-DAG: $v27 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.4)
87 ; MIR32-DAG: $v26 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.5)
88 ; MIR32-DAG: $v25 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.6)
89 ; MIR32-DAG: $v24 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.7)
90 ; MIR32-DAG: $v23 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.8)
91 ; MIR32-DAG: $v22 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.9)
92 ; MIR32-DAG: $v21 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.10)
93 ; MIR32-DAG: $v20 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.11)
94 ; MIR32: BLR implicit $lr, implicit $rm
96 ; MIR64: name: vec_regs
98 ; MIR64-LABEL: fixedStack:
99 ; MIR64-DAG: - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: default,
100 ; MIR64-DAG: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '',
101 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
102 ; MIR64-DAG: - { id: 1, type: spill-slot, offset: -32, size: 16, alignment: 16, stack-id: default,
103 ; MIR64-DAG: callee-saved-register: '$v30', callee-saved-restored: true, debug-info-variable: '',
104 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
105 ; MIR64-DAG: - { id: 2, type: spill-slot, offset: -48, size: 16, alignment: 16, stack-id: default,
106 ; MIR64-DAG: callee-saved-register: '$v29', callee-saved-restored: true, debug-info-variable: '',
107 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
108 ; MIR64-DAG: - { id: 3, type: spill-slot, offset: -64, size: 16, alignment: 16, stack-id: default,
109 ; MIR64-DAG: callee-saved-register: '$v28', callee-saved-restored: true, debug-info-variable: '',
110 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
111 ; MIR64-DAG: - { id: 4, type: spill-slot, offset: -80, size: 16, alignment: 16, stack-id: default,
112 ; MIR64-DAG: callee-saved-register: '$v27', callee-saved-restored: true, debug-info-variable: '',
113 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
114 ; MIR64-DAG: - { id: 5, type: spill-slot, offset: -96, size: 16, alignment: 16, stack-id: default,
115 ; MIR64-DAG: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '',
116 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
117 ; MIR64-DAG: - { id: 6, type: spill-slot, offset: -112, size: 16, alignment: 16, stack-id: default,
118 ; MIR64-DAG: callee-saved-register: '$v25', callee-saved-restored: true, debug-info-variable: '',
119 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
120 ; MIR64-DAG: - { id: 7, type: spill-slot, offset: -128, size: 16, alignment: 16, stack-id: default,
121 ; MIR64-DAG: callee-saved-register: '$v24', callee-saved-restored: true, debug-info-variable: '',
122 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
123 ; MIR64-DAG: - { id: 8, type: spill-slot, offset: -144, size: 16, alignment: 16, stack-id: default,
124 ; MIR64-DAG: callee-saved-register: '$v23', callee-saved-restored: true, debug-info-variable: '',
125 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
126 ; MIR64-DAG: - { id: 9, type: spill-slot, offset: -160, size: 16, alignment: 16, stack-id: default,
127 ; MIR64-DAG: callee-saved-register: '$v22', callee-saved-restored: true, debug-info-variable: '',
128 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
129 ; MIR64-DAG: - { id: 10, type: spill-slot, offset: -176, size: 16, alignment: 16,
130 ; MIR64-DAG: stack-id: default, callee-saved-register: '$v21', callee-saved-restored: true,
131 ; MIR64-DAG: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
132 ; MIR64-DAG: - { id: 11, type: spill-slot, offset: -192, size: 16, alignment: 16,
133 ; MIR64-DAG: stack-id: default, callee-saved-register: '$v20', callee-saved-restored: true,
134 ; MIR64-DAG: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
137 ; MIR64: liveins: $v20, $v21, $v22, $v23, $v24, $v25, $v26, $v27, $v28, $v29, $v30, $v31
139 ; MIR64-DAG: STXVD2X killed $v20, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.11)
140 ; MIR64-DAG: STXVD2X killed $v21, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.10)
141 ; MIR64-DAG: STXVD2X killed $v22, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.9)
142 ; MIR64-DAG: STXVD2X killed $v23, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.8)
143 ; MIR64-DAG: STXVD2X killed $v24, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.7)
144 ; MIR64-DAG: STXVD2X killed $v25, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.6)
145 ; MIR64-DAG: STXVD2X killed $v26, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.5)
146 ; MIR64-DAG: STXVD2X killed $v27, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.4)
147 ; MIR64-DAG: STXVD2X killed $v28, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.3)
148 ; MIR64-DAG: STXVD2X killed $v29, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.2)
149 ; MIR64-DAG: STXVD2X killed $v30, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.1)
150 ; MIR64-DAG: STXVD2X killed $v31, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.0)
154 ; MIR64-DAG: $v31 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.0)
155 ; MIR64-DAG: $v30 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.1)
156 ; MIR64-DAG: $v29 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.2)
157 ; MIR64-DAG: $v28 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.3)
158 ; MIR64-DAG: $v27 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.4)
159 ; MIR64-DAG: $v26 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.5)
160 ; MIR64-DAG: $v25 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.6)
161 ; MIR64-DAG: $v24 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.7)
162 ; MIR64-DAG: $v23 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.8)
163 ; MIR64-DAG: $v22 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.9)
164 ; MIR64-DAG: $v21 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.10)
165 ; MIR64-DAG: $v20 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.11)
166 ; MIR64: BLR8 implicit $lr8, implicit $rm
169 ; ASM32-LABEL: .vec_regs:
171 ; ASM32-DAG: li [[FIXEDSTACK11:[0-9]+]], -192
172 ; ASM32-DAG: stxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Spill
173 ; ASM32-DAG: li [[FIXEDSTACK10:[0-9]+]], -176
174 ; ASM32-DAG: stxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Spill
175 ; ASM32-DAG: li [[FIXEDSTACK9:[0-9]+]], -160
176 ; ASM32-DAG: stxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Spill
177 ; ASM32-DAG: li [[FIXEDSTACK8:[0-9]+]], -144
178 ; ASM32-DAG: stxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Spill
179 ; ASM32-DAG: li [[FIXEDSTACK7:[0-9]+]], -128
180 ; ASM32-DAG: stxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Spill
181 ; ASM32-DAG: li [[FIXEDSTACK6:[0-9]+]], -112
182 ; ASM32-DAG: stxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Spill
183 ; ASM32-DAG: li [[FIXEDSTACK5:[0-9]+]], -96
184 ; ASM32-DAG: stxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Spill
185 ; ASM32-DAG: li [[FIXEDSTACK4:[0-9]+]], -80
186 ; ASM32-DAG: stxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Spill
187 ; ASM32-DAG: li [[FIXEDSTACK3:[0-9]+]], -64
188 ; ASM32-DAG: stxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Spill
189 ; ASM32-DAG: li [[FIXEDSTACK2:[0-9]+]], -48
190 ; ASM32-DAG: stxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Spill
191 ; ASM32-DAG: li [[FIXEDSTACK1:[0-9]+]], -32
192 ; ASM32-DAG: stxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Spill
193 ; ASM32-DAG: li [[FIXEDSTACK0:[0-9]+]], -16
194 ; ASM32-DAG: stxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Spill
197 ; ASM32-NEXT: #NO_APP
199 ; ASM32-DAG: lxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Reload
200 ; ASM32-DAG: li [[FIXEDSTACK1:[0-9]+]], -32
201 ; ASM32-DAG: lxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Reload
202 ; ASM32-DAG: li [[FIXEDSTACK2:[0-9]+]], -48
203 ; ASM32-DAG: lxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Reload
204 ; ASM32-DAG: li [[FIXEDSTACK3:[0-9]+]], -64
205 ; ASM32-DAG: lxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Reload
206 ; ASM32-DAG: li [[FIXEDSTACK4:[0-9]+]], -80
207 ; ASM32-DAG: lxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Reload
208 ; ASM32-DAG: li [[FIXEDSTACK5:[0-9]+]], -96
209 ; ASM32-DAG: lxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Reload
210 ; ASM32-DAG: li [[FIXEDSTACK6:[0-9]+]], -112
211 ; ASM32-DAG: lxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Reload
212 ; ASM32-DAG: li [[FIXEDSTACK7:[0-9]+]], -128
213 ; ASM32-DAG: lxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Reload
214 ; ASM32-DAG: li [[FIXEDSTACK8:[0-9]+]], -144
215 ; ASM32-DAG: lxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Reload
216 ; ASM32-DAG: li [[FIXEDSTACK9:[0-9]+]], -160
217 ; ASM32-DAG: lxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Reload
218 ; ASM32-DAG: li [[FIXEDSTACK10:[0-9]+]], -176
219 ; ASM32-DAG: lxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Reload
220 ; ASM32-DAG: li [[FIXEDSTACK11:[0-9]+]], -192
221 ; ASM32-DAG: lxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Reload
224 ; ASM64-LABEL: .vec_regs:
226 ; ASM64-DAG: li [[FIXEDSTACK11:[0-9]+]], -192
227 ; ASM64-DAG: stxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Spill
228 ; ASM64-DAG: li [[FIXEDSTACK10:[0-9]+]], -176
229 ; ASM64-DAG: stxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Spill
230 ; ASM64-DAG: li [[FIXEDSTACK9:[0-9]+]], -160
231 ; ASM64-DAG: stxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Spill
232 ; ASM64-DAG: li [[FIXEDSTACK8:[0-9]+]], -144
233 ; ASM64-DAG: stxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Spill
234 ; ASM64-DAG: li [[FIXEDSTACK7:[0-9]+]], -128
235 ; ASM64-DAG: stxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Spill
236 ; ASM64-DAG: li [[FIXEDSTACK6:[0-9]+]], -112
237 ; ASM64-DAG: stxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Spill
238 ; ASM64-DAG: li [[FIXEDSTACK5:[0-9]+]], -96
239 ; ASM64-DAG: stxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Spill
240 ; ASM64-DAG: li [[FIXEDSTACK4:[0-9]+]], -80
241 ; ASM64-DAG: stxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Spill
242 ; ASM64-DAG: li [[FIXEDSTACK3:[0-9]+]], -64
243 ; ASM64-DAG: stxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Spill
244 ; ASM64-DAG: li [[FIXEDSTACK2:[0-9]+]], -48
245 ; ASM64-DAG: stxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Spill
246 ; ASM64-DAG: li [[FIXEDSTACK1:[0-9]+]], -32
247 ; ASM64-DAG: stxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Spill
248 ; ASM64-DAG: li [[FIXEDSTACK0:[0-9]+]], -16
249 ; ASM64-DAG: stxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Spill
254 ; ASM64-DAG: lxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Reload
255 ; ASM64-DAG: li [[FIXEDSTACK1:[0-9]+]], -32
256 ; ASM64-DAG: lxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Reload
257 ; ASM64-DAG: li [[FIXEDSTACK2:[0-9]+]], -48
258 ; ASM64-DAG: lxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Reload
259 ; ASM64-DAG: li [[FIXEDSTACK3:[0-9]+]], -64
260 ; ASM64-DAG: lxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Reload
261 ; ASM64-DAG: li [[FIXEDSTACK4:[0-9]+]], -80
262 ; ASM64-DAG: lxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Reload
263 ; ASM64-DAG: li [[FIXEDSTACK5:[0-9]+]], -96
264 ; ASM64-DAG: lxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Reload
265 ; ASM64-DAG: li [[FIXEDSTACK6:[0-9]+]], -112
266 ; ASM64-DAG: lxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Reload
267 ; ASM64-DAG: li [[FIXEDSTACK7:[0-9]+]], -128
268 ; ASM64-DAG: lxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Reload
269 ; ASM64-DAG: li [[FIXEDSTACK8:[0-9]+]], -144
270 ; ASM64-DAG: lxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Reload
271 ; ASM64-DAG: li [[FIXEDSTACK9:[0-9]+]], -160
272 ; ASM64-DAG: lxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Reload
273 ; ASM64-DAG: li [[FIXEDSTACK10:[0-9]+]], -176
274 ; ASM64-DAG: lxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Reload
275 ; ASM64-DAG: li [[FIXEDSTACK11:[0-9]+]], -192
276 ; ASM64-DAG: lxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Reload
280 define dso_local void @fprs_gprs_vecregs() {
281 call void asm sideeffect "", "~{r14},~{r25},~{r31},~{f14},~{f21},~{f31},~{v20},~{v26},~{v31}"()
285 ; MIR32: name: fprs_gprs_vecregs
287 ; MIR32-LABEL: fixedStack:
288 ; MIR32-NEXT: - { id: 0, type: spill-slot, offset: -240, size: 16, alignment: 16, stack-id: default,
289 ; MIR32-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '',
290 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
291 ; MIR32-NEXT: - { id: 1, type: spill-slot, offset: -256, size: 16, alignment: 16, stack-id: default,
292 ; MIR32-NEXT: callee-saved-register: '$v30', callee-saved-restored: true, debug-info-variable: '',
293 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
294 ; MIR32-NEXT: - { id: 2, type: spill-slot, offset: -272, size: 16, alignment: 16, stack-id: default,
295 ; MIR32-NEXT: callee-saved-register: '$v29', callee-saved-restored: true, debug-info-variable: '',
296 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
297 ; MIR32-NEXT: - { id: 3, type: spill-slot, offset: -288, size: 16, alignment: 16, stack-id: default,
298 ; MIR32-NEXT: callee-saved-register: '$v28', callee-saved-restored: true, debug-info-variable: '',
299 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
300 ; MIR32-NEXT: - { id: 4, type: spill-slot, offset: -304, size: 16, alignment: 16, stack-id: default,
301 ; MIR32-NEXT: callee-saved-register: '$v27', callee-saved-restored: true, debug-info-variable: '',
302 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
303 ; MIR32-NEXT: - { id: 5, type: spill-slot, offset: -320, size: 16, alignment: 16, stack-id: default,
304 ; MIR32-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '',
305 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
306 ; MIR32-NEXT: - { id: 6, type: spill-slot, offset: -336, size: 16, alignment: 16, stack-id: default,
307 ; MIR32-NEXT: callee-saved-register: '$v25', callee-saved-restored: true, debug-info-variable: '',
308 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
309 ; MIR32-NEXT: - { id: 7, type: spill-slot, offset: -352, size: 16, alignment: 16, stack-id: default,
310 ; MIR32-NEXT: callee-saved-register: '$v24', callee-saved-restored: true, debug-info-variable: '',
311 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
312 ; MIR32-NEXT: - { id: 8, type: spill-slot, offset: -368, size: 16, alignment: 16, stack-id: default,
313 ; MIR32-NEXT: callee-saved-register: '$v23', callee-saved-restored: true, debug-info-variable: '',
314 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
315 ; MIR32-NEXT: - { id: 9, type: spill-slot, offset: -384, size: 16, alignment: 16, stack-id: default,
316 ; MIR32-NEXT: callee-saved-register: '$v22', callee-saved-restored: true, debug-info-variable: '',
317 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
318 ; MIR32-NEXT: - { id: 10, type: spill-slot, offset: -400, size: 16, alignment: 16,
319 ; MIR32-NEXT: stack-id: default, callee-saved-register: '$v21', callee-saved-restored: true,
320 ; MIR32-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
321 ; MIR32-NEXT: - { id: 11, type: spill-slot, offset: -416, size: 16, alignment: 16,
322 ; MIR32-NEXT: stack-id: default, callee-saved-register: '$v20', callee-saved-restored: true,
323 ; MIR32-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
324 ; MIR32-NEXT: - { id: 12, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
325 ; MIR32-NEXT: callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '',
326 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
327 ; MIR32-NEXT: - { id: 13, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
328 ; MIR32-NEXT: callee-saved-register: '$f30', callee-saved-restored: true, debug-info-variable: '',
329 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
330 ; MIR32-NEXT: - { id: 14, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
331 ; MIR32-NEXT: callee-saved-register: '$f29', callee-saved-restored: true, debug-info-variable: '',
332 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
333 ; MIR32-NEXT: - { id: 15, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
334 ; MIR32-NEXT: callee-saved-register: '$f28', callee-saved-restored: true, debug-info-variable: '',
335 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
336 ; MIR32-NEXT: - { id: 16, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
337 ; MIR32-NEXT: callee-saved-register: '$f27', callee-saved-restored: true, debug-info-variable: '',
338 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
339 ; MIR32-NEXT: - { id: 17, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: default,
340 ; MIR32-NEXT: callee-saved-register: '$f26', callee-saved-restored: true, debug-info-variable: '',
341 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
342 ; MIR32-NEXT: - { id: 18, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
343 ; MIR32-NEXT: callee-saved-register: '$f25', callee-saved-restored: true, debug-info-variable: '',
344 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
345 ; MIR32-NEXT: - { id: 19, type: spill-slot, offset: -64, size: 8, alignment: 16, stack-id: default,
346 ; MIR32-NEXT: callee-saved-register: '$f24', callee-saved-restored: true, debug-info-variable: '',
347 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
348 ; MIR32-NEXT: - { id: 20, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: default,
349 ; MIR32-NEXT: callee-saved-register: '$f23', callee-saved-restored: true, debug-info-variable: '',
350 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
351 ; MIR32-NEXT: - { id: 21, type: spill-slot, offset: -80, size: 8, alignment: 16, stack-id: default,
352 ; MIR32-NEXT: callee-saved-register: '$f22', callee-saved-restored: true, debug-info-variable: '',
353 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
354 ; MIR32-NEXT: - { id: 22, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default,
355 ; MIR32-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '',
356 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
357 ; MIR32-NEXT: - { id: 23, type: spill-slot, offset: -96, size: 8, alignment: 16, stack-id: default,
358 ; MIR32-NEXT: callee-saved-register: '$f20', callee-saved-restored: true, debug-info-variable: '',
359 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
360 ; MIR32-NEXT: - { id: 24, type: spill-slot, offset: -104, size: 8, alignment: 8, stack-id: default,
361 ; MIR32-NEXT: callee-saved-register: '$f19', callee-saved-restored: true, debug-info-variable: '',
362 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
363 ; MIR32-NEXT: - { id: 25, type: spill-slot, offset: -112, size: 8, alignment: 16, stack-id: default,
364 ; MIR32-NEXT: callee-saved-register: '$f18', callee-saved-restored: true, debug-info-variable: '',
365 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
366 ; MIR32-NEXT: - { id: 26, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: default,
367 ; MIR32-NEXT: callee-saved-register: '$f17', callee-saved-restored: true, debug-info-variable: '',
368 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
369 ; MIR32-NEXT: - { id: 27, type: spill-slot, offset: -128, size: 8, alignment: 16, stack-id: default,
370 ; MIR32-NEXT: callee-saved-register: '$f16', callee-saved-restored: true, debug-info-variable: '',
371 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
372 ; MIR32-NEXT: - { id: 28, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: default,
373 ; MIR32-NEXT: callee-saved-register: '$f15', callee-saved-restored: true, debug-info-variable: '',
374 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
375 ; MIR32-NEXT: - { id: 29, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default,
376 ; MIR32-NEXT: callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '',
377 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
378 ; MIR32-NEXT: - { id: 30, type: spill-slot, offset: -148, size: 4, alignment: 4, stack-id: default,
379 ; MIR32-NEXT: callee-saved-register: '$r31', callee-saved-restored: true, debug-info-variable: '',
380 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
381 ; MIR32-NEXT: - { id: 31, type: spill-slot, offset: -152, size: 4, alignment: 8, stack-id: default,
382 ; MIR32-NEXT: callee-saved-register: '$r30', callee-saved-restored: true, debug-info-variable: '',
383 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
384 ; MIR32-NEXT: - { id: 32, type: spill-slot, offset: -156, size: 4, alignment: 4, stack-id: default,
385 ; MIR32-NEXT: callee-saved-register: '$r29', callee-saved-restored: true, debug-info-variable: '',
386 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
387 ; MIR32-NEXT: - { id: 33, type: spill-slot, offset: -160, size: 4, alignment: 16, stack-id: default,
388 ; MIR32-NEXT: callee-saved-register: '$r28', callee-saved-restored: true, debug-info-variable: '',
389 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
390 ; MIR32-NEXT: - { id: 34, type: spill-slot, offset: -164, size: 4, alignment: 4, stack-id: default,
391 ; MIR32-NEXT: callee-saved-register: '$r27', callee-saved-restored: true, debug-info-variable: '',
392 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
393 ; MIR32-NEXT: - { id: 35, type: spill-slot, offset: -168, size: 4, alignment: 8, stack-id: default,
394 ; MIR32-NEXT: callee-saved-register: '$r26', callee-saved-restored: true, debug-info-variable: '',
395 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
396 ; MIR32-NEXT: - { id: 36, type: spill-slot, offset: -172, size: 4, alignment: 4, stack-id: default,
397 ; MIR32-NEXT: callee-saved-register: '$r25', callee-saved-restored: true, debug-info-variable: '',
398 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
399 ; MIR32-NEXT: - { id: 37, type: spill-slot, offset: -176, size: 4, alignment: 16, stack-id: default,
400 ; MIR32-NEXT: callee-saved-register: '$r24', callee-saved-restored: true, debug-info-variable: '',
401 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
402 ; MIR32-NEXT: - { id: 38, type: spill-slot, offset: -180, size: 4, alignment: 4, stack-id: default,
403 ; MIR32-NEXT: callee-saved-register: '$r23', callee-saved-restored: true, debug-info-variable: '',
404 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
405 ; MIR32-NEXT: - { id: 39, type: spill-slot, offset: -184, size: 4, alignment: 8, stack-id: default,
406 ; MIR32-NEXT: callee-saved-register: '$r22', callee-saved-restored: true, debug-info-variable: '',
407 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
408 ; MIR32-NEXT: - { id: 40, type: spill-slot, offset: -188, size: 4, alignment: 4, stack-id: default,
409 ; MIR32-NEXT: callee-saved-register: '$r21', callee-saved-restored: true, debug-info-variable: '',
410 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
411 ; MIR32-NEXT: - { id: 41, type: spill-slot, offset: -192, size: 4, alignment: 16, stack-id: default,
412 ; MIR32-NEXT: callee-saved-register: '$r20', callee-saved-restored: true, debug-info-variable: '',
413 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
414 ; MIR32-NEXT: - { id: 42, type: spill-slot, offset: -196, size: 4, alignment: 4, stack-id: default,
415 ; MIR32-NEXT: callee-saved-register: '$r19', callee-saved-restored: true, debug-info-variable: '',
416 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
417 ; MIR32-NEXT: - { id: 43, type: spill-slot, offset: -200, size: 4, alignment: 8, stack-id: default,
418 ; MIR32-NEXT: callee-saved-register: '$r18', callee-saved-restored: true, debug-info-variable: '',
419 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
420 ; MIR32-NEXT: - { id: 44, type: spill-slot, offset: -204, size: 4, alignment: 4, stack-id: default,
421 ; MIR32-NEXT: callee-saved-register: '$r17', callee-saved-restored: true, debug-info-variable: '',
422 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
423 ; MIR32-NEXT: - { id: 45, type: spill-slot, offset: -208, size: 4, alignment: 16, stack-id: default,
424 ; MIR32-NEXT: callee-saved-register: '$r16', callee-saved-restored: true, debug-info-variable: '',
425 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
426 ; MIR32-NEXT: - { id: 46, type: spill-slot, offset: -212, size: 4, alignment: 4, stack-id: default,
427 ; MIR32-NEXT: callee-saved-register: '$r15', callee-saved-restored: true, debug-info-variable: '',
428 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
429 ; MIR32-NEXT: - { id: 47, type: spill-slot, offset: -216, size: 4, alignment: 8, stack-id: default,
430 ; MIR32-NEXT: callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '',
431 ; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' }
434 ; MIR32: liveins: $r14, $r15, $r16, $r17, $r18, $r19, $r20, $r21, $r22, $r23, $r24, $r25, $r26, $r27, $r28, $r29, $r30, $r31, $f14, $f15, $f16, $f17, $f18, $f19, $f20, $f21, $f22, $f23, $f24, $f25, $f26, $f27, $f28, $f29, $f30, $f31, $v20, $v21, $v22, $v23, $v24, $v25, $v26, $v27, $v28, $v29, $v30, $v31
436 ; MIR32-DAG: STW killed $r14, 232, $r1 :: (store (s32) into %fixed-stack.47, align 8)
437 ; MIR32-DAG: STW killed $r15, 236, $r1 :: (store (s32) into %fixed-stack.46)
438 ; MIR32-DAG: STW killed $r16, 240, $r1 :: (store (s32) into %fixed-stack.45, align 16)
439 ; MIR32-DAG: STW killed $r17, 244, $r1 :: (store (s32) into %fixed-stack.44)
440 ; MIR32-DAG: STW killed $r18, 248, $r1 :: (store (s32) into %fixed-stack.43, align 8)
441 ; MIR32-DAG: STW killed $r19, 252, $r1 :: (store (s32) into %fixed-stack.42)
442 ; MIR32-DAG: STW killed $r20, 256, $r1 :: (store (s32) into %fixed-stack.41, align 16)
443 ; MIR32-DAG: STW killed $r21, 260, $r1 :: (store (s32) into %fixed-stack.40)
444 ; MIR32-DAG: STW killed $r22, 264, $r1 :: (store (s32) into %fixed-stack.39, align 8)
445 ; MIR32-DAG: STW killed $r23, 268, $r1 :: (store (s32) into %fixed-stack.38)
446 ; MIR32-DAG: STW killed $r24, 272, $r1 :: (store (s32) into %fixed-stack.37, align 16)
447 ; MIR32-DAG: STW killed $r25, 276, $r1 :: (store (s32) into %fixed-stack.36)
448 ; MIR32-DAG: STW killed $r26, 280, $r1 :: (store (s32) into %fixed-stack.35, align 8)
449 ; MIR32-DAG: STW killed $r27, 284, $r1 :: (store (s32) into %fixed-stack.34)
450 ; MIR32-DAG: STW killed $r28, 288, $r1 :: (store (s32) into %fixed-stack.33, align 16)
451 ; MIR32-DAG: STW killed $r29, 292, $r1 :: (store (s32) into %fixed-stack.32)
452 ; MIR32-DAG: STW killed $r30, 296, $r1 :: (store (s32) into %fixed-stack.31, align 8)
453 ; MIR32-DAG: STW killed $r31, 300, $r1 :: (store (s32) into %fixed-stack.30)
454 ; MIR32-DAG: STFD killed $f14, 304, $r1 :: (store (s64) into %fixed-stack.29, align 16)
455 ; MIR32-DAG: STFD killed $f15, 312, $r1 :: (store (s64) into %fixed-stack.28)
456 ; MIR32-DAG: STFD killed $f16, 320, $r1 :: (store (s64) into %fixed-stack.27, align 16)
457 ; MIR32-DAG: STFD killed $f17, 328, $r1 :: (store (s64) into %fixed-stack.26)
458 ; MIR32-DAG: STFD killed $f18, 336, $r1 :: (store (s64) into %fixed-stack.25, align 16)
459 ; MIR32-DAG: STFD killed $f19, 344, $r1 :: (store (s64) into %fixed-stack.24)
460 ; MIR32-DAG: STFD killed $f20, 352, $r1 :: (store (s64) into %fixed-stack.23, align 16)
461 ; MIR32-DAG: STFD killed $f21, 360, $r1 :: (store (s64) into %fixed-stack.22)
462 ; MIR32-DAG: STFD killed $f22, 368, $r1 :: (store (s64) into %fixed-stack.21, align 16)
463 ; MIR32-DAG: STFD killed $f23, 376, $r1 :: (store (s64) into %fixed-stack.20)
464 ; MIR32-DAG: STFD killed $f24, 384, $r1 :: (store (s64) into %fixed-stack.19, align 16)
465 ; MIR32-DAG: STFD killed $f25, 392, $r1 :: (store (s64) into %fixed-stack.18)
466 ; MIR32-DAG: STFD killed $f26, 400, $r1 :: (store (s64) into %fixed-stack.17, align 16)
467 ; MIR32-DAG: STFD killed $f27, 408, $r1 :: (store (s64) into %fixed-stack.16)
468 ; MIR32-DAG: STFD killed $f28, 416, $r1 :: (store (s64) into %fixed-stack.15, align 16)
469 ; MIR32-DAG: STFD killed $f29, 424, $r1 :: (store (s64) into %fixed-stack.14)
470 ; MIR32-DAG: STFD killed $f30, 432, $r1 :: (store (s64) into %fixed-stack.13, align 16)
471 ; MIR32-DAG: STFD killed $f31, 440, $r1 :: (store (s64) into %fixed-stack.12)
472 ; MIR32-DAG: STXVD2X killed $v20, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.11)
473 ; MIR32-DAG: STXVD2X killed $v21, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.10)
474 ; MIR32-DAG: STXVD2X killed $v22, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.9)
475 ; MIR32-DAG: STXVD2X killed $v23, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.8)
476 ; MIR32-DAG: STXVD2X killed $v24, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.7)
477 ; MIR32-DAG: STXVD2X killed $v25, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.6)
478 ; MIR32-DAG: STXVD2X killed $v26, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.5)
479 ; MIR32-DAG: STXVD2X killed $v27, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.4)
480 ; MIR32-DAG: STXVD2X killed $v28, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.3)
481 ; MIR32-DAG: STXVD2X killed $v29, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.2)
482 ; MIR32-DAG: STXVD2X killed $v30, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1)
483 ; MIR32-DAG: STXVD2X killed $v31, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.0)
487 ; MIR32-DAG: $v31 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.0)
488 ; MIR32-DAG: $v30 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.1)
489 ; MIR32-DAG: $v29 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.2)
490 ; MIR32-DAG: $v28 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.3)
491 ; MIR32-DAG: $v27 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.4)
492 ; MIR32-DAG: $v26 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.5)
493 ; MIR32-DAG: $v25 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.6)
494 ; MIR32-DAG: $v24 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.7)
495 ; MIR32-DAG: $v23 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.8)
496 ; MIR32-DAG: $v22 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.9)
497 ; MIR32-DAG: $v21 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.10)
498 ; MIR32-DAG: $v20 = LXVD2X $r1, killed $r3 :: (load (s128) from %fixed-stack.11)
499 ; MIR32-DAG: $f31 = LFD 440, $r1 :: (load (s64) from %fixed-stack.12)
500 ; MIR32-DAG: $f30 = LFD 432, $r1 :: (load (s64) from %fixed-stack.13, align 16)
501 ; MIR32-DAG: $f29 = LFD 424, $r1 :: (load (s64) from %fixed-stack.14)
502 ; MIR32-DAG: $f28 = LFD 416, $r1 :: (load (s64) from %fixed-stack.15, align 16)
503 ; MIR32-DAG: $f27 = LFD 408, $r1 :: (load (s64) from %fixed-stack.16)
504 ; MIR32-DAG: $f26 = LFD 400, $r1 :: (load (s64) from %fixed-stack.17, align 16)
505 ; MIR32-DAG: $f25 = LFD 392, $r1 :: (load (s64) from %fixed-stack.18)
506 ; MIR32-DAG: $f24 = LFD 384, $r1 :: (load (s64) from %fixed-stack.19, align 16)
507 ; MIR32-DAG: $f23 = LFD 376, $r1 :: (load (s64) from %fixed-stack.20)
508 ; MIR32-DAG: $f22 = LFD 368, $r1 :: (load (s64) from %fixed-stack.21, align 16)
509 ; MIR32-DAG: $f21 = LFD 360, $r1 :: (load (s64) from %fixed-stack.22)
510 ; MIR32-DAG: $f20 = LFD 352, $r1 :: (load (s64) from %fixed-stack.23, align 16)
511 ; MIR32-DAG: $f19 = LFD 344, $r1 :: (load (s64) from %fixed-stack.24)
512 ; MIR32-DAG: $f18 = LFD 336, $r1 :: (load (s64) from %fixed-stack.25, align 16)
513 ; MIR32-DAG: $f17 = LFD 328, $r1 :: (load (s64) from %fixed-stack.26)
514 ; MIR32-DAG: $f16 = LFD 320, $r1 :: (load (s64) from %fixed-stack.27, align 16)
515 ; MIR32-DAG: $f15 = LFD 312, $r1 :: (load (s64) from %fixed-stack.28)
516 ; MIR32-DAG: $f14 = LFD 304, $r1 :: (load (s64) from %fixed-stack.29, align 16)
517 ; MIR32-DAG: $r31 = LWZ 300, $r1 :: (load (s32) from %fixed-stack.30)
518 ; MIR32-DAG: $r30 = LWZ 296, $r1 :: (load (s32) from %fixed-stack.31, align 8)
519 ; MIR32-DAG: $r29 = LWZ 292, $r1 :: (load (s32) from %fixed-stack.32)
520 ; MIR32-DAG: $r28 = LWZ 288, $r1 :: (load (s32) from %fixed-stack.33, align 16)
521 ; MIR32-DAG: $r27 = LWZ 284, $r1 :: (load (s32) from %fixed-stack.34)
522 ; MIR32-DAG: $r26 = LWZ 280, $r1 :: (load (s32) from %fixed-stack.35, align 8)
523 ; MIR32-DAG: $r25 = LWZ 276, $r1 :: (load (s32) from %fixed-stack.36)
524 ; MIR32-DAG: $r24 = LWZ 272, $r1 :: (load (s32) from %fixed-stack.37, align 16)
525 ; MIR32-DAG: $r23 = LWZ 268, $r1 :: (load (s32) from %fixed-stack.38)
526 ; MIR32-DAG: $r22 = LWZ 264, $r1 :: (load (s32) from %fixed-stack.39, align 8)
527 ; MIR32-DAG: $r21 = LWZ 260, $r1 :: (load (s32) from %fixed-stack.40)
528 ; MIR32-DAG: $r20 = LWZ 256, $r1 :: (load (s32) from %fixed-stack.41, align 16)
529 ; MIR32-DAG: $r19 = LWZ 252, $r1 :: (load (s32) from %fixed-stack.42)
530 ; MIR32-DAG: $r18 = LWZ 248, $r1 :: (load (s32) from %fixed-stack.43, align 8)
531 ; MIR32-DAG: $r17 = LWZ 244, $r1 :: (load (s32) from %fixed-stack.44)
532 ; MIR32-DAG: $r16 = LWZ 240, $r1 :: (load (s32) from %fixed-stack.45, align 16)
533 ; MIR32-DAG: $r15 = LWZ 236, $r1 :: (load (s32) from %fixed-stack.46)
534 ; MIR32-DAG: $r14 = LWZ 232, $r1 :: (load (s32) from %fixed-stack.47, align 8)
535 ; MIR32: $r1 = ADDI $r1, 448
536 ; MIR32-NEXT: BLR implicit $lr, implicit $rm
539 ; MIR64: name: fprs_gprs_vecregs
541 ; MIR64-LABEL: fixedStack:
542 ; MIR64-DAG: - { id: 0, type: spill-slot, offset: -304, size: 16, alignment: 16, stack-id: default,
543 ; MIR64-DAG: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '',
544 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
545 ; MIR64-DAG: - { id: 1, type: spill-slot, offset: -320, size: 16, alignment: 16, stack-id: default,
546 ; MIR64-DAG: callee-saved-register: '$v30', callee-saved-restored: true, debug-info-variable: '',
547 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
548 ; MIR64-DAG: - { id: 2, type: spill-slot, offset: -336, size: 16, alignment: 16, stack-id: default,
549 ; MIR64-DAG: callee-saved-register: '$v29', callee-saved-restored: true, debug-info-variable: '',
550 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
551 ; MIR64-DAG: - { id: 3, type: spill-slot, offset: -352, size: 16, alignment: 16, stack-id: default,
552 ; MIR64-DAG: callee-saved-register: '$v28', callee-saved-restored: true, debug-info-variable: '',
553 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
554 ; MIR64-DAG: - { id: 4, type: spill-slot, offset: -368, size: 16, alignment: 16, stack-id: default,
555 ; MIR64-DAG: callee-saved-register: '$v27', callee-saved-restored: true, debug-info-variable: '',
556 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
557 ; MIR64-DAG: - { id: 5, type: spill-slot, offset: -384, size: 16, alignment: 16, stack-id: default,
558 ; MIR64-DAG: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '',
559 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
560 ; MIR64-DAG: - { id: 6, type: spill-slot, offset: -400, size: 16, alignment: 16, stack-id: default,
561 ; MIR64-DAG: callee-saved-register: '$v25', callee-saved-restored: true, debug-info-variable: '',
562 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
563 ; MIR64-DAG: - { id: 7, type: spill-slot, offset: -416, size: 16, alignment: 16, stack-id: default,
564 ; MIR64-DAG: callee-saved-register: '$v24', callee-saved-restored: true, debug-info-variable: '',
565 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
566 ; MIR64-DAG: - { id: 8, type: spill-slot, offset: -432, size: 16, alignment: 16, stack-id: default,
567 ; MIR64-DAG: callee-saved-register: '$v23', callee-saved-restored: true, debug-info-variable: '',
568 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
569 ; MIR64-DAG: - { id: 9, type: spill-slot, offset: -448, size: 16, alignment: 16, stack-id: default,
570 ; MIR64-DAG: callee-saved-register: '$v22', callee-saved-restored: true, debug-info-variable: '',
571 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
572 ; MIR64-DAG: - { id: 10, type: spill-slot, offset: -464, size: 16, alignment: 16,
573 ; MIR64-DAG: stack-id: default, callee-saved-register: '$v21', callee-saved-restored: true,
574 ; MIR64-DAG: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
575 ; MIR64-DAG: - { id: 11, type: spill-slot, offset: -480, size: 16, alignment: 16,
576 ; MIR64-DAG: stack-id: default, callee-saved-register: '$v20', callee-saved-restored: true,
577 ; MIR64-DAG: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
578 ; MIR64-DAG: - { id: 12, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
579 ; MIR64-DAG: callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '',
580 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
581 ; MIR64-DAG: - { id: 13, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
582 ; MIR64-DAG: callee-saved-register: '$f30', callee-saved-restored: true, debug-info-variable: '',
583 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
584 ; MIR64-DAG: - { id: 14, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
585 ; MIR64-DAG: callee-saved-register: '$f29', callee-saved-restored: true, debug-info-variable: '',
586 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
587 ; MIR64-DAG: - { id: 15, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
588 ; MIR64-DAG: callee-saved-register: '$f28', callee-saved-restored: true, debug-info-variable: '',
589 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
590 ; MIR64-DAG: - { id: 16, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
591 ; MIR64-DAG: callee-saved-register: '$f27', callee-saved-restored: true, debug-info-variable: '',
592 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
593 ; MIR64-DAG: - { id: 17, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: default,
594 ; MIR64-DAG: callee-saved-register: '$f26', callee-saved-restored: true, debug-info-variable: '',
595 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
596 ; MIR64-DAG: - { id: 18, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
597 ; MIR64-DAG: callee-saved-register: '$f25', callee-saved-restored: true, debug-info-variable: '',
598 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
599 ; MIR64-DAG: - { id: 19, type: spill-slot, offset: -64, size: 8, alignment: 16, stack-id: default,
600 ; MIR64-DAG: callee-saved-register: '$f24', callee-saved-restored: true, debug-info-variable: '',
601 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
602 ; MIR64-DAG: - { id: 20, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: default,
603 ; MIR64-DAG: callee-saved-register: '$f23', callee-saved-restored: true, debug-info-variable: '',
604 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
605 ; MIR64-DAG: - { id: 21, type: spill-slot, offset: -80, size: 8, alignment: 16, stack-id: default,
606 ; MIR64-DAG: callee-saved-register: '$f22', callee-saved-restored: true, debug-info-variable: '',
607 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
608 ; MIR64-DAG: - { id: 22, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default,
609 ; MIR64-DAG: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '',
610 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
611 ; MIR64-DAG: - { id: 23, type: spill-slot, offset: -96, size: 8, alignment: 16, stack-id: default,
612 ; MIR64-DAG: callee-saved-register: '$f20', callee-saved-restored: true, debug-info-variable: '',
613 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
614 ; MIR64-DAG: - { id: 24, type: spill-slot, offset: -104, size: 8, alignment: 8, stack-id: default,
615 ; MIR64-DAG: callee-saved-register: '$f19', callee-saved-restored: true, debug-info-variable: '',
616 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
617 ; MIR64-DAG: - { id: 25, type: spill-slot, offset: -112, size: 8, alignment: 16, stack-id: default,
618 ; MIR64-DAG: callee-saved-register: '$f18', callee-saved-restored: true, debug-info-variable: '',
619 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
620 ; MIR64-DAG: - { id: 26, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: default,
621 ; MIR64-DAG: callee-saved-register: '$f17', callee-saved-restored: true, debug-info-variable: '',
622 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
623 ; MIR64-DAG: - { id: 27, type: spill-slot, offset: -128, size: 8, alignment: 16, stack-id: default,
624 ; MIR64-DAG: callee-saved-register: '$f16', callee-saved-restored: true, debug-info-variable: '',
625 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
626 ; MIR64-DAG: - { id: 28, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: default,
627 ; MIR64-DAG: callee-saved-register: '$f15', callee-saved-restored: true, debug-info-variable: '',
628 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
629 ; MIR64-DAG: - { id: 29, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default,
630 ; MIR64-DAG: callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '',
631 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
632 ; MIR64-DAG: - { id: 30, type: spill-slot, offset: -152, size: 8, alignment: 8, stack-id: default,
633 ; MIR64-DAG: callee-saved-register: '$x31', callee-saved-restored: true, debug-info-variable: '',
634 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
635 ; MIR64-DAG: - { id: 31, type: spill-slot, offset: -160, size: 8, alignment: 16, stack-id: default,
636 ; MIR64-DAG: callee-saved-register: '$x30', callee-saved-restored: true, debug-info-variable: '',
637 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
638 ; MIR64-DAG: - { id: 32, type: spill-slot, offset: -168, size: 8, alignment: 8, stack-id: default,
639 ; MIR64-DAG: callee-saved-register: '$x29', callee-saved-restored: true, debug-info-variable: '',
640 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
641 ; MIR64-DAG: - { id: 33, type: spill-slot, offset: -176, size: 8, alignment: 16, stack-id: default,
642 ; MIR64-DAG: callee-saved-register: '$x28', callee-saved-restored: true, debug-info-variable: '',
643 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
644 ; MIR64-DAG: - { id: 34, type: spill-slot, offset: -184, size: 8, alignment: 8, stack-id: default,
645 ; MIR64-DAG: callee-saved-register: '$x27', callee-saved-restored: true, debug-info-variable: '',
646 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
647 ; MIR64-DAG: - { id: 35, type: spill-slot, offset: -192, size: 8, alignment: 16, stack-id: default,
648 ; MIR64-DAG: callee-saved-register: '$x26', callee-saved-restored: true, debug-info-variable: '',
649 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
650 ; MIR64-DAG: - { id: 36, type: spill-slot, offset: -200, size: 8, alignment: 8, stack-id: default,
651 ; MIR64-DAG: callee-saved-register: '$x25', callee-saved-restored: true, debug-info-variable: '',
652 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
653 ; MIR64-DAG: - { id: 37, type: spill-slot, offset: -208, size: 8, alignment: 16, stack-id: default,
654 ; MIR64-DAG: callee-saved-register: '$x24', callee-saved-restored: true, debug-info-variable: '',
655 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
656 ; MIR64-DAG: - { id: 38, type: spill-slot, offset: -216, size: 8, alignment: 8, stack-id: default,
657 ; MIR64-DAG: callee-saved-register: '$x23', callee-saved-restored: true, debug-info-variable: '',
658 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
659 ; MIR64-DAG: - { id: 39, type: spill-slot, offset: -224, size: 8, alignment: 16, stack-id: default,
660 ; MIR64-DAG: callee-saved-register: '$x22', callee-saved-restored: true, debug-info-variable: '',
661 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
662 ; MIR64-DAG: - { id: 40, type: spill-slot, offset: -232, size: 8, alignment: 8, stack-id: default,
663 ; MIR64-DAG: callee-saved-register: '$x21', callee-saved-restored: true, debug-info-variable: '',
664 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
665 ; MIR64-DAG: - { id: 41, type: spill-slot, offset: -240, size: 8, alignment: 16, stack-id: default,
666 ; MIR64-DAG: callee-saved-register: '$x20', callee-saved-restored: true, debug-info-variable: '',
667 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
668 ; MIR64-DAG: - { id: 42, type: spill-slot, offset: -248, size: 8, alignment: 8, stack-id: default,
669 ; MIR64-DAG: callee-saved-register: '$x19', callee-saved-restored: true, debug-info-variable: '',
670 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
671 ; MIR64-DAG: - { id: 43, type: spill-slot, offset: -256, size: 8, alignment: 16, stack-id: default,
672 ; MIR64-DAG: callee-saved-register: '$x18', callee-saved-restored: true, debug-info-variable: '',
673 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
674 ; MIR64-DAG: - { id: 44, type: spill-slot, offset: -264, size: 8, alignment: 8, stack-id: default,
675 ; MIR64-DAG: callee-saved-register: '$x17', callee-saved-restored: true, debug-info-variable: '',
676 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
677 ; MIR64-DAG: - { id: 45, type: spill-slot, offset: -272, size: 8, alignment: 16, stack-id: default,
678 ; MIR64-DAG: callee-saved-register: '$x16', callee-saved-restored: true, debug-info-variable: '',
679 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
680 ; MIR64-DAG: - { id: 46, type: spill-slot, offset: -280, size: 8, alignment: 8, stack-id: default,
681 ; MIR64-DAG: callee-saved-register: '$x15', callee-saved-restored: true, debug-info-variable: '',
682 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
683 ; MIR64-DAG: - { id: 47, type: spill-slot, offset: -288, size: 8, alignment: 16, stack-id: default,
684 ; MIR64-DAG: callee-saved-register: '$x14', callee-saved-restored: true, debug-info-variable: '',
685 ; MIR64-DAG: debug-info-expression: '', debug-info-location: '' }
688 ; MIR64: liveins: $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $x29, $x30, $x31, $f14, $f15, $f16, $f17, $f18, $f19, $f20, $f21, $f22, $f23, $f24, $f25, $f26, $f27, $f28, $f29, $f30, $f31, $v20, $v21, $v22, $v23, $v24, $v25, $v26, $v27, $v28, $v29, $v30, $v31
690 ; MIR64: $x1 = STDU $x1, -544, $x1
691 ;MIR64-DAG: STD killed $x14, 256, $x1 :: (store (s64) into %fixed-stack.47, align 16)
692 ;MIR64-DAG: STD killed $x15, 264, $x1 :: (store (s64) into %fixed-stack.46)
693 ;MIR64-DAG: STD killed $x16, 272, $x1 :: (store (s64) into %fixed-stack.45, align 16)
694 ;MIR64-DAG: STD killed $x17, 280, $x1 :: (store (s64) into %fixed-stack.44)
695 ;MIR64-DAG: STD killed $x18, 288, $x1 :: (store (s64) into %fixed-stack.43, align 16)
696 ;MIR64-DAG: STD killed $x19, 296, $x1 :: (store (s64) into %fixed-stack.42)
697 ;MIR64-DAG: STD killed $x20, 304, $x1 :: (store (s64) into %fixed-stack.41, align 16)
698 ;MIR64-DAG: STD killed $x21, 312, $x1 :: (store (s64) into %fixed-stack.40)
699 ;MIR64-DAG: STD killed $x22, 320, $x1 :: (store (s64) into %fixed-stack.39, align 16)
700 ;MIR64-DAG: STD killed $x23, 328, $x1 :: (store (s64) into %fixed-stack.38)
701 ;MIR64-DAG: STD killed $x24, 336, $x1 :: (store (s64) into %fixed-stack.37, align 16)
702 ;MIR64-DAG: STD killed $x25, 344, $x1 :: (store (s64) into %fixed-stack.36)
703 ;MIR64-DAG: STD killed $x26, 352, $x1 :: (store (s64) into %fixed-stack.35, align 16)
704 ;MIR64-DAG: STD killed $x27, 360, $x1 :: (store (s64) into %fixed-stack.34)
705 ;MIR64-DAG: STD killed $x28, 368, $x1 :: (store (s64) into %fixed-stack.33, align 16)
706 ;MIR64-DAG: STD killed $x29, 376, $x1 :: (store (s64) into %fixed-stack.32)
707 ;MIR64-DAG: STD killed $x30, 384, $x1 :: (store (s64) into %fixed-stack.31, align 16)
708 ;MIR64-DAG: STD killed $x31, 392, $x1 :: (store (s64) into %fixed-stack.30)
709 ;MIR64-DAG: STFD killed $f14, 400, $x1 :: (store (s64) into %fixed-stack.29, align 16)
710 ;MIR64-DAG: STFD killed $f15, 408, $x1 :: (store (s64) into %fixed-stack.28)
711 ;MIR64-DAG: STFD killed $f16, 416, $x1 :: (store (s64) into %fixed-stack.27, align 16)
712 ;MIR64-DAG: STFD killed $f17, 424, $x1 :: (store (s64) into %fixed-stack.26)
713 ;MIR64-DAG: STFD killed $f18, 432, $x1 :: (store (s64) into %fixed-stack.25, align 16)
714 ;MIR64-DAG: STFD killed $f19, 440, $x1 :: (store (s64) into %fixed-stack.24)
715 ;MIR64-DAG: STFD killed $f20, 448, $x1 :: (store (s64) into %fixed-stack.23, align 16)
716 ;MIR64-DAG: STFD killed $f21, 456, $x1 :: (store (s64) into %fixed-stack.22)
717 ;MIR64-DAG: STFD killed $f22, 464, $x1 :: (store (s64) into %fixed-stack.21, align 16)
718 ;MIR64-DAG: STFD killed $f23, 472, $x1 :: (store (s64) into %fixed-stack.20)
719 ;MIR64-DAG: STFD killed $f24, 480, $x1 :: (store (s64) into %fixed-stack.19, align 16)
720 ;MIR64-DAG: STFD killed $f25, 488, $x1 :: (store (s64) into %fixed-stack.18)
721 ;MIR64-DAG: STFD killed $f26, 496, $x1 :: (store (s64) into %fixed-stack.17, align 16)
722 ;MIR64-DAG: STFD killed $f27, 504, $x1 :: (store (s64) into %fixed-stack.16)
723 ;MIR64-DAG: STFD killed $f28, 512, $x1 :: (store (s64) into %fixed-stack.15, align 16)
724 ;MIR64-DAG: STFD killed $f29, 520, $x1 :: (store (s64) into %fixed-stack.14)
725 ;MIR64-DAG: STFD killed $f30, 528, $x1 :: (store (s64) into %fixed-stack.13, align 16)
726 ;MIR64-DAG: STFD killed $f31, 536, $x1 :: (store (s64) into %fixed-stack.12)
727 ;MIR64-DAG: STXVD2X killed $v20, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.11)
728 ;MIR64-DAG: STXVD2X killed $v21, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.10)
729 ;MIR64-DAG: STXVD2X killed $v22, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.9)
730 ;MIR64-DAG: STXVD2X killed $v23, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.8)
731 ;MIR64-DAG: STXVD2X killed $v24, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.7)
732 ;MIR64-DAG: STXVD2X killed $v25, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.6)
733 ;MIR64-DAG: STXVD2X killed $v26, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.5)
734 ;MIR64-DAG: STXVD2X killed $v27, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.4)
735 ;MIR64-DAG: STXVD2X killed $v28, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.3)
736 ;MIR64-DAG: STXVD2X killed $v29, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.2)
737 ;MIR64-DAG: STXVD2X killed $v30, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.1)
738 ;MIR64-DAG: STXVD2X killed $v31, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.0)
742 ; MIR64-DAG: $v31 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.0)
743 ; MIR64-DAG: $v30 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.1)
744 ; MIR64-DAG: $v29 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.2)
745 ; MIR64-DAG: $v28 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.3)
746 ; MIR64-DAG: $v27 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.4)
747 ; MIR64-DAG: $v26 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.5)
748 ; MIR64-DAG: $v25 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.6)
749 ; MIR64-DAG: $v24 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.7)
750 ; MIR64-DAG: $v23 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.8)
751 ; MIR64-DAG: $v22 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.9)
752 ; MIR64-DAG: $v21 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.10)
753 ; MIR64-DAG: $v20 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.11)
754 ; MIR64-DAG: $f31 = LFD 536, $x1 :: (load (s64) from %fixed-stack.12)
755 ; MIR64-DAG: $f30 = LFD 528, $x1 :: (load (s64) from %fixed-stack.13, align 16)
756 ; MIR64-DAG: $f29 = LFD 520, $x1 :: (load (s64) from %fixed-stack.14)
757 ; MIR64-DAG: $f28 = LFD 512, $x1 :: (load (s64) from %fixed-stack.15, align 16)
758 ; MIR64-DAG: $f27 = LFD 504, $x1 :: (load (s64) from %fixed-stack.16)
759 ; MIR64-DAG: $f26 = LFD 496, $x1 :: (load (s64) from %fixed-stack.17, align 16)
760 ; MIR64-DAG: $f25 = LFD 488, $x1 :: (load (s64) from %fixed-stack.18)
761 ; MIR64-DAG: $f24 = LFD 480, $x1 :: (load (s64) from %fixed-stack.19, align 16)
762 ; MIR64-DAG: $f23 = LFD 472, $x1 :: (load (s64) from %fixed-stack.20)
763 ; MIR64-DAG: $f22 = LFD 464, $x1 :: (load (s64) from %fixed-stack.21, align 16)
764 ; MIR64-DAG: $f21 = LFD 456, $x1 :: (load (s64) from %fixed-stack.22)
765 ; MIR64-DAG: $f20 = LFD 448, $x1 :: (load (s64) from %fixed-stack.23, align 16)
766 ; MIR64-DAG: $f19 = LFD 440, $x1 :: (load (s64) from %fixed-stack.24)
767 ; MIR64-DAG: $f18 = LFD 432, $x1 :: (load (s64) from %fixed-stack.25, align 16)
768 ; MIR64-DAG: $f17 = LFD 424, $x1 :: (load (s64) from %fixed-stack.26)
769 ; MIR64-DAG: $f16 = LFD 416, $x1 :: (load (s64) from %fixed-stack.27, align 16)
770 ; MIR64-DAG: $f15 = LFD 408, $x1 :: (load (s64) from %fixed-stack.28)
771 ; MIR64-DAG: $f14 = LFD 400, $x1 :: (load (s64) from %fixed-stack.29, align 16)
772 ; MIR64-DAG: $x31 = LD 392, $x1 :: (load (s64) from %fixed-stack.30)
773 ; MIR64-DAG: $x30 = LD 384, $x1 :: (load (s64) from %fixed-stack.31, align 16)
774 ; MIR64-DAG: $x29 = LD 376, $x1 :: (load (s64) from %fixed-stack.32)
775 ; MIR64-DAG: $x28 = LD 368, $x1 :: (load (s64) from %fixed-stack.33, align 16)
776 ; MIR64-DAG: $x27 = LD 360, $x1 :: (load (s64) from %fixed-stack.34)
777 ; MIR64-DAG: $x26 = LD 352, $x1 :: (load (s64) from %fixed-stack.35, align 16)
778 ; MIR64-DAG: $x25 = LD 344, $x1 :: (load (s64) from %fixed-stack.36)
779 ; MIR64-DAG: $x24 = LD 336, $x1 :: (load (s64) from %fixed-stack.37, align 16)
780 ; MIR64-DAG: $x23 = LD 328, $x1 :: (load (s64) from %fixed-stack.38)
781 ; MIR64-DAG: $x22 = LD 320, $x1 :: (load (s64) from %fixed-stack.39, align 16)
782 ; MIR64-DAG: $x21 = LD 312, $x1 :: (load (s64) from %fixed-stack.40)
783 ; MIR64-DAG: $x20 = LD 304, $x1 :: (load (s64) from %fixed-stack.41, align 16)
784 ; MIR64-DAG: $x19 = LD 296, $x1 :: (load (s64) from %fixed-stack.42)
785 ; MIR64-DAG: $x18 = LD 288, $x1 :: (load (s64) from %fixed-stack.43, align 16)
786 ; MIR64-DAG: $x17 = LD 280, $x1 :: (load (s64) from %fixed-stack.44)
787 ; MIR64-DAG: $x16 = LD 272, $x1 :: (load (s64) from %fixed-stack.45, align 16)
788 ; MIR64-DAG: $x15 = LD 264, $x1 :: (load (s64) from %fixed-stack.46)
789 ; MIR64-DAG: $x14 = LD 256, $x1 :: (load (s64) from %fixed-stack.47, align 16)
790 ; MIR64: $x1 = ADDI8 $x1, 544
791 ; MIR64-NEXT: BLR8 implicit $lr8, implicit $rm
793 ; ASM32-LABEL: .fprs_gprs_vecregs:
795 ; ASM32: stwu 1, -448(1)
796 ; ASM32-DAG: li [[FIXEDSTACK11:[0-9]+]], 32
797 ; ASM32-DAG: stxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Spill
798 ; ASM32-DAG: li [[FIXEDSTACK10:[0-9]+]], 48
799 ; ASM32-DAG: stxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Spill
800 ; ASM32-DAG: li [[FIXEDSTACK9:[0-9]+]], 64
801 ; ASM32-DAG: stxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Spill
802 ; ASM32-DAG: li [[FIXEDSTACK8:[0-9]+]], 80
803 ; ASM32-DAG: stxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Spill
804 ; ASM32-DAG: li [[FIXEDSTACK7:[0-9]+]], 96
805 ; ASM32-DAG: stxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Spill
806 ; ASM32-DAG: li [[FIXEDSTACK6:[0-9]+]], 112
807 ; ASM32-DAG: stxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Spill
808 ; ASM32-DAG: li [[FIXEDSTACK5:[0-9]+]], 128
809 ; ASM32-DAG: stxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Spill
810 ; ASM32-DAG: li [[FIXEDSTACK4:[0-9]+]], 144
811 ; ASM32-DAG: stxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Spill
812 ; ASM32-DAG: li [[FIXEDSTACK3:[0-9]+]], 160
813 ; ASM32-DAG: stxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Spill
814 ; ASM32-DAG: li [[FIXEDSTACK2:[0-9]+]], 176
815 ; ASM32-DAG: stxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Spill
816 ; ASM32-DAG: li [[FIXEDSTACK1:[0-9]+]], 192
817 ; ASM32-DAG: stxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Spill
818 ; ASM32-DAG: li [[FIXEDSTACK0:[0-9]+]], 208
819 ; ASM32-DAG: stxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Spill
820 ; ASM32-DAG: stw 14, 232(1) # 4-byte Folded Spill
821 ; ASM32-DAG: stw 15, 236(1) # 4-byte Folded Spill
822 ; ASM32-DAG: stw 16, 240(1) # 4-byte Folded Spill
823 ; ASM32-DAG: stw 17, 244(1) # 4-byte Folded Spill
824 ; ASM32-DAG: stw 18, 248(1) # 4-byte Folded Spill
825 ; ASM32-DAG: stw 19, 252(1) # 4-byte Folded Spill
826 ; ASM32-DAG: stw 20, 256(1) # 4-byte Folded Spill
827 ; ASM32-DAG: stw 21, 260(1) # 4-byte Folded Spill
828 ; ASM32-DAG: stw 22, 264(1) # 4-byte Folded Spill
829 ; ASM32-DAG: stw 23, 268(1) # 4-byte Folded Spill
830 ; ASM32-DAG: stw 24, 272(1) # 4-byte Folded Spill
831 ; ASM32-DAG: stw 25, 276(1) # 4-byte Folded Spill
832 ; ASM32-DAG: stw 26, 280(1) # 4-byte Folded Spill
833 ; ASM32-DAG: stw 27, 284(1) # 4-byte Folded Spill
834 ; ASM32-DAG: stw 28, 288(1) # 4-byte Folded Spill
835 ; ASM32-DAG: stw 29, 292(1) # 4-byte Folded Spill
836 ; ASM32-DAG: stw 30, 296(1) # 4-byte Folded Spill
837 ; ASM32-DAG: stw 31, 300(1) # 4-byte Folded Spill
838 ; ASM32-DAG: stfd 14, 304(1) # 8-byte Folded Spill
839 ; ASM32-DAG: stfd 15, 312(1) # 8-byte Folded Spill
840 ; ASM32-DAG: stfd 16, 320(1) # 8-byte Folded Spill
841 ; ASM32-DAG: stfd 17, 328(1) # 8-byte Folded Spill
842 ; ASM32-DAG: stfd 18, 336(1) # 8-byte Folded Spill
843 ; ASM32-DAG: stfd 19, 344(1) # 8-byte Folded Spill
844 ; ASM32-DAG: stfd 20, 352(1) # 8-byte Folded Spill
845 ; ASM32-DAG: stfd 21, 360(1) # 8-byte Folded Spill
846 ; ASM32-DAG: stfd 22, 368(1) # 8-byte Folded Spill
847 ; ASM32-DAG: stfd 23, 376(1) # 8-byte Folded Spill
848 ; ASM32-DAG: stfd 24, 384(1) # 8-byte Folded Spill
849 ; ASM32-DAG: stfd 25, 392(1) # 8-byte Folded Spill
850 ; ASM32-DAG: stfd 26, 400(1) # 8-byte Folded Spill
851 ; ASM32-DAG: stfd 27, 408(1) # 8-byte Folded Spill
852 ; ASM32-DAG: stfd 28, 416(1) # 8-byte Folded Spill
853 ; ASM32-DAG: stfd 29, 424(1) # 8-byte Folded Spill
854 ; ASM32-DAG: stfd 30, 432(1) # 8-byte Folded Spill
855 ; ASM32-DAG: stfd 31, 440(1) # 8-byte Folded Spill
858 ; ASM32-NEXT: #NO_APP
860 ; ASM32-DAG: lxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Reload
861 ; ASM32-DAG: li [[FIXEDSTACK1:[0-9]+]], 192
862 ; ASM32-DAG: lxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Reload
863 ; ASM32-DAG: li [[FIXEDSTACK2:[0-9]+]], 176
864 ; ASM32-DAG: lxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Reload
865 ; ASM32-DAG: li [[FIXEDSTACK3:[0-9]+]], 160
866 ; ASM32-DAG: lxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Reload
867 ; ASM32-DAG: li [[FIXEDSTACK4:[0-9]+]], 144
868 ; ASM32-DAG: lxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Reload
869 ; ASM32-DAG: li [[FIXEDSTACK5:[0-9]+]], 128
870 ; ASM32-DAG: lxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Reload
871 ; ASM32-DAG: li [[FIXEDSTACK6:[0-9]+]], 112
872 ; ASM32-DAG: lxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Reload
873 ; ASM32-DAG: li [[FIXEDSTACK7:[0-9]+]], 96
874 ; ASM32-DAG: lxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Reload
875 ; ASM32-DAG: li [[FIXEDSTACK8:[0-9]+]], 80
876 ; ASM32-DAG: lxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Reload
877 ; ASM32-DAG: li [[FIXEDSTACK9:[0-9]+]], 64
878 ; ASM32-DAG: lxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Reload
879 ; ASM32-DAG: li [[FIXEDSTACK10:[0-9]+]], 48
880 ; ASM32-DAG: lxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Reload
881 ; ASM32-DAG: li [[FIXEDSTACK11:[0-9]+]], 32
882 ; ASM32-DAG: lxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Reload
883 ; ASM32-DAG: lfd 31, 440(1) # 8-byte Folded Reload
884 ; ASM32-DAG: lfd 30, 432(1) # 8-byte Folded Reload
885 ; ASM32-DAG: lfd 29, 424(1) # 8-byte Folded Reload
886 ; ASM32-DAG: lfd 28, 416(1) # 8-byte Folded Reload
887 ; ASM32-DAG: lfd 27, 408(1) # 8-byte Folded Reload
888 ; ASM32-DAG: lfd 26, 400(1) # 8-byte Folded Reload
889 ; ASM32-DAG: lfd 25, 392(1) # 8-byte Folded Reload
890 ; ASM32-DAG: lfd 24, 384(1) # 8-byte Folded Reload
891 ; ASM32-DAG: lfd 23, 376(1) # 8-byte Folded Reload
892 ; ASM32-DAG: lfd 22, 368(1) # 8-byte Folded Reload
893 ; ASM32-DAG: lfd 21, 360(1) # 8-byte Folded Reload
894 ; ASM32-DAG: lfd 20, 352(1) # 8-byte Folded Reload
895 ; ASM32-DAG: lfd 19, 344(1) # 8-byte Folded Reload
896 ; ASM32-DAG: lfd 18, 336(1) # 8-byte Folded Reload
897 ; ASM32-DAG: lfd 17, 328(1) # 8-byte Folded Reload
898 ; ASM32-DAG: lfd 16, 320(1) # 8-byte Folded Reload
899 ; ASM32-DAG: lfd 15, 312(1) # 8-byte Folded Reload
900 ; ASM32-DAG: lfd 14, 304(1) # 8-byte Folded Reload
901 ; ASM32-DAG: lwz 31, 300(1) # 4-byte Folded Reload
902 ; ASM32-DAG: lwz 30, 296(1) # 4-byte Folded Reload
903 ; ASM32-DAG: lwz 29, 292(1) # 4-byte Folded Reload
904 ; ASM32-DAG: lwz 28, 288(1) # 4-byte Folded Reload
905 ; ASM32-DAG: lwz 27, 284(1) # 4-byte Folded Reload
906 ; ASM32-DAG: lwz 26, 280(1) # 4-byte Folded Reload
907 ; ASM32-DAG: lwz 25, 276(1) # 4-byte Folded Reload
908 ; ASM32-DAG: lwz 24, 272(1) # 4-byte Folded Reload
909 ; ASM32-DAG: lwz 23, 268(1) # 4-byte Folded Reload
910 ; ASM32-DAG: lwz 22, 264(1) # 4-byte Folded Reload
911 ; ASM32-DAG: lwz 21, 260(1) # 4-byte Folded Reload
912 ; ASM32-DAG: lwz 20, 256(1) # 4-byte Folded Reload
913 ; ASM32-DAG: lwz 19, 252(1) # 4-byte Folded Reload
914 ; ASM32-DAG: lwz 18, 248(1) # 4-byte Folded Reload
915 ; ASM32-DAG: lwz 17, 244(1) # 4-byte Folded Reload
916 ; ASM32-DAG: lwz 16, 240(1) # 4-byte Folded Reload
917 ; ASM32-DAG: lwz 15, 236(1) # 4-byte Folded Reload
918 ; ASM32-DAG: lwz 14, 232(1) # 4-byte Folded Reload
920 ; ASM32: addi 1, 1, 448
923 ; ASM64-LABEL: .fprs_gprs_vecregs:
925 ; ASM64: stdu 1, -544(1)
926 ; ASM64-DAG: li [[FIXEDSTACK11:[0-9]+]], 64
927 ; ASM64-DAG: stxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Spill
928 ; ASM64-DAG: li [[FIXEDSTACK10:[0-9]+]], 80
929 ; ASM64-DAG: stxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Spill
930 ; ASM64-DAG: li [[FIXEDSTACK9:[0-9]+]], 96
931 ; ASM64-DAG: stxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Spill
932 ; ASM64-DAG: li [[FIXEDSTACK8:[0-9]+]], 112
933 ; ASM64-DAG: stxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Spill
934 ; ASM64-DAG: li [[FIXEDSTACK7:[0-9]+]], 128
935 ; ASM64-DAG: stxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Spill
936 ; ASM64-DAG: li [[FIXEDSTACK6:[0-9]+]], 144
937 ; ASM64-DAG: stxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Spill
938 ; ASM64-DAG: li [[FIXEDSTACK5:[0-9]+]], 160
939 ; ASM64-DAG: stxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Spill
940 ; ASM64-DAG: li [[FIXEDSTACK4:[0-9]+]], 176
941 ; ASM64-DAG: stxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Spill
942 ; ASM64-DAG: li [[FIXEDSTACK3:[0-9]+]], 192
943 ; ASM64-DAG: stxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Spill
944 ; ASM64-DAG: li [[FIXEDSTACK2:[0-9]+]], 208
945 ; ASM64-DAG: stxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Spill
946 ; ASM64-DAG: li [[FIXEDSTACK1:[0-9]+]], 224
947 ; ASM64-DAG: stxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Spill
948 ; ASM64-DAG: li [[FIXEDSTACK0:[0-9]+]], 240
949 ; ASM64-DAG: stxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Spill
950 ; ASM64-DAG: std 14, 256(1) # 8-byte Folded Spill
951 ; ASM64-DAG: std 15, 264(1) # 8-byte Folded Spill
952 ; ASM64-DAG: std 16, 272(1) # 8-byte Folded Spill
953 ; ASM64-DAG: std 17, 280(1) # 8-byte Folded Spill
954 ; ASM64-DAG: std 18, 288(1) # 8-byte Folded Spill
955 ; ASM64-DAG: std 19, 296(1) # 8-byte Folded Spill
956 ; ASM64-DAG: std 20, 304(1) # 8-byte Folded Spill
957 ; ASM64-DAG: std 21, 312(1) # 8-byte Folded Spill
958 ; ASM64-DAG: std 22, 320(1) # 8-byte Folded Spill
959 ; ASM64-DAG: std 23, 328(1) # 8-byte Folded Spill
960 ; ASM64-DAG: std 24, 336(1) # 8-byte Folded Spill
961 ; ASM64-DAG: std 25, 344(1) # 8-byte Folded Spill
962 ; ASM64-DAG: std 26, 352(1) # 8-byte Folded Spill
963 ; ASM64-DAG: std 27, 360(1) # 8-byte Folded Spill
964 ; ASM64-DAG: std 28, 368(1) # 8-byte Folded Spill
965 ; ASM64-DAG: std 29, 376(1) # 8-byte Folded Spill
966 ; ASM64-DAG: std 30, 384(1) # 8-byte Folded Spill
967 ; ASM64-DAG: std 31, 392(1) # 8-byte Folded Spill
968 ; ASM64-DAG: stfd 14, 400(1) # 8-byte Folded Spill
969 ; ASM64-DAG: stfd 15, 408(1) # 8-byte Folded Spill
970 ; ASM64-DAG: stfd 16, 416(1) # 8-byte Folded Spill
971 ; ASM64-DAG: stfd 17, 424(1) # 8-byte Folded Spill
972 ; ASM64-DAG: stfd 18, 432(1) # 8-byte Folded Spill
973 ; ASM64-DAG: stfd 19, 440(1) # 8-byte Folded Spill
974 ; ASM64-DAG: stfd 20, 448(1) # 8-byte Folded Spill
975 ; ASM64-DAG: stfd 21, 456(1) # 8-byte Folded Spill
976 ; ASM64-DAG: stfd 22, 464(1) # 8-byte Folded Spill
977 ; ASM64-DAG: stfd 23, 472(1) # 8-byte Folded Spill
978 ; ASM64-DAG: stfd 24, 480(1) # 8-byte Folded Spill
979 ; ASM64-DAG: stfd 25, 488(1) # 8-byte Folded Spill
980 ; ASM64-DAG: stfd 26, 496(1) # 8-byte Folded Spill
981 ; ASM64-DAG: stfd 27, 504(1) # 8-byte Folded Spill
982 ; ASM64-DAG: stfd 28, 512(1) # 8-byte Folded Spill
983 ; ASM64-DAG: stfd 29, 520(1) # 8-byte Folded Spill
984 ; ASM64-DAG: stfd 30, 528(1) # 8-byte Folded Spill
985 ; ASM64-DAG: stfd 31, 536(1) # 8-byte Folded Spill
988 ; ASM64-NEXT: #NO_APP
990 ; ASM64-DAG: lxvd2x 63, 1, [[FIXEDSTACK0]] # 16-byte Folded Reload
991 ; ASM64-DAG: li [[FIXEDSTACK1:[0-9]+]], 224
992 ; ASM64-DAG: lxvd2x 62, 1, [[FIXEDSTACK1]] # 16-byte Folded Reload
993 ; ASM64-DAG: li [[FIXEDSTACK2:[0-9]+]], 208
994 ; ASM64-DAG: lxvd2x 61, 1, [[FIXEDSTACK2]] # 16-byte Folded Reload
995 ; ASM64-DAG: li [[FIXEDSTACK3:[0-9]+]], 192
996 ; ASM64-DAG: lxvd2x 60, 1, [[FIXEDSTACK3]] # 16-byte Folded Reload
997 ; ASM64-DAG: li [[FIXEDSTACK4:[0-9]+]], 176
998 ; ASM64-DAG: lxvd2x 59, 1, [[FIXEDSTACK4]] # 16-byte Folded Reload
999 ; ASM64-DAG: li [[FIXEDSTACK5:[0-9]+]], 160
1000 ; ASM64-DAG: lxvd2x 58, 1, [[FIXEDSTACK5]] # 16-byte Folded Reload
1001 ; ASM64-DAG: li [[FIXEDSTACK6:[0-9]+]], 144
1002 ; ASM64-DAG: lxvd2x 57, 1, [[FIXEDSTACK6]] # 16-byte Folded Reload
1003 ; ASM64-DAG: li [[FIXEDSTACK7:[0-9]+]], 128
1004 ; ASM64-DAG: lxvd2x 56, 1, [[FIXEDSTACK7]] # 16-byte Folded Reload
1005 ; ASM64-DAG: li [[FIXEDSTACK8:[0-9]+]], 112
1006 ; ASM64-DAG: lxvd2x 55, 1, [[FIXEDSTACK8]] # 16-byte Folded Reload
1007 ; ASM64-DAG: li [[FIXEDSTACK9:[0-9]+]], 96
1008 ; ASM64-DAG: lxvd2x 54, 1, [[FIXEDSTACK9]] # 16-byte Folded Reload
1009 ; ASM64-DAG: li [[FIXEDSTACK10:[0-9]+]], 80
1010 ; ASM64-DAG: lxvd2x 53, 1, [[FIXEDSTACK10]] # 16-byte Folded Reload
1011 ; ASM64-DAG: li [[FIXEDSTACK11:[0-9]+]], 64
1012 ; ASM64-DAG: lxvd2x 52, 1, [[FIXEDSTACK11]] # 16-byte Folded Reload
1013 ; ASM64-DAG: lfd 31, 536(1) # 8-byte Folded Reload
1014 ; ASM64-DAG: lfd 30, 528(1) # 8-byte Folded Reload
1015 ; ASM64-DAG: lfd 29, 520(1) # 8-byte Folded Reload
1016 ; ASM64-DAG: lfd 28, 512(1) # 8-byte Folded Reload
1017 ; ASM64-DAG: lfd 27, 504(1) # 8-byte Folded Reload
1018 ; ASM64-DAG: lfd 26, 496(1) # 8-byte Folded Reload
1019 ; ASM64-DAG: lfd 25, 488(1) # 8-byte Folded Reload
1020 ; ASM64-DAG: lfd 24, 480(1) # 8-byte Folded Reload
1021 ; ASM64-DAG: lfd 23, 472(1) # 8-byte Folded Reload
1022 ; ASM64-DAG: lfd 22, 464(1) # 8-byte Folded Reload
1023 ; ASM64-DAG: lfd 21, 456(1) # 8-byte Folded Reload
1024 ; ASM64-DAG: lfd 20, 448(1) # 8-byte Folded Reload
1025 ; ASM64-DAG: lfd 19, 440(1) # 8-byte Folded Reload
1026 ; ASM64-DAG: lfd 18, 432(1) # 8-byte Folded Reload
1027 ; ASM64-DAG: lfd 17, 424(1) # 8-byte Folded Reload
1028 ; ASM64-DAG: lfd 16, 416(1) # 8-byte Folded Reload
1029 ; ASM64-DAG: lfd 15, 408(1) # 8-byte Folded Reload
1030 ; ASM64-DAG: lfd 14, 400(1) # 8-byte Folded Reload
1031 ; ASM64-DAG: ld 31, 392(1) # 8-byte Folded Reload
1032 ; ASM64-DAG: ld 30, 384(1) # 8-byte Folded Reload
1033 ; ASM64-DAG: ld 29, 376(1) # 8-byte Folded Reload
1034 ; ASM64-DAG: ld 28, 368(1) # 8-byte Folded Reload
1035 ; ASM64-DAG: ld 27, 360(1) # 8-byte Folded Reload
1036 ; ASM64-DAG: ld 26, 352(1) # 8-byte Folded Reload
1037 ; ASM64-DAG: ld 25, 344(1) # 8-byte Folded Reload
1038 ; ASM64-DAG: ld 24, 336(1) # 8-byte Folded Reload
1039 ; ASM64-DAG: ld 23, 328(1) # 8-byte Folded Reload
1040 ; ASM64-DAG: ld 22, 320(1) # 8-byte Folded Reload
1041 ; ASM64-DAG: ld 21, 312(1) # 8-byte Folded Reload
1042 ; ASM64-DAG: ld 20, 304(1) # 8-byte Folded Reload
1043 ; ASM64-DAG: ld 19, 296(1) # 8-byte Folded Reload
1044 ; ASM64-DAG: ld 18, 288(1) # 8-byte Folded Reload
1045 ; ASM64-DAG: ld 17, 280(1) # 8-byte Folded Reload
1046 ; ASM64-DAG: ld 16, 272(1) # 8-byte Folded Reload
1047 ; ASM64-DAG: ld 15, 264(1) # 8-byte Folded Reload
1048 ; ASM64-DAG: ld 14, 256(1) # 8-byte Folded Reload
1050 ; ASM64: addi 1, 1, 544