1 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
2 ; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
3 ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck -D#NFA=2 --check-prefix=RELOC %s
4 ; RUN: llvm-readobj --syms %t.o | FileCheck -D#NFA=2 --check-prefix=SYM %s
5 ; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck -D#NFA=2 --check-prefix=DIS %s
7 @ThreadLocalVarInit = thread_local(localexec) global i32 1, align 4
8 @VarInit = global i32 87, align 4
9 @IThreadLocalVarUninit = internal thread_local(localexec) global i32 0, align 4
10 @IThreadLocalVarUninit2 = internal thread_local(localexec) global i32 0, align 4
11 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
13 define void @storeITLUninit(i32 noundef signext %x) {
15 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit)
16 store i32 %x, ptr %0, align 4
20 define signext i32 @loadTLInit() {
22 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
23 %1 = load i32, ptr %0, align 4
24 %2 = load i32, ptr @VarInit, align 4
25 %add = add nsw i32 %2, %1
29 define signext i32 @loadTLUninit() {
31 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit)
32 store i32 1, ptr %0, align 4
33 %1 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit2)
34 %2 = load i32, ptr %1, align 4
35 %add = add nsw i32 %2, 1
40 ; RELOC-NEXT: Format: aixcoff-rs6000
41 ; RELOC-NEXT: Arch: powerpc
42 ; RELOC-NEXT: AddressSize: 32bit
43 ; RELOC-NEXT: Relocations [
44 ; RELOC: Virtual Address: 0xA
45 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+23]])
46 ; RELOC-NEXT: IsSigned: No
47 ; RELOC-NEXT: FixupBitValue: 0
48 ; RELOC-NEXT: Length: 16
49 ; RELOC-NEXT: Type: R_TOC (0x3)
51 ; RELOC: Virtual Address: 0x10
52 ; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
53 ; RELOC-NEXT: IsSigned: No
54 ; RELOC-NEXT: FixupBitValue: 0
55 ; RELOC-NEXT: Length: 26
56 ; RELOC-NEXT: Type: R_RBA (0x18)
58 ; RELOC: Virtual Address: 0x3A
59 ; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+25]])
60 ; RELOC-NEXT: IsSigned: No
61 ; RELOC-NEXT: FixupBitValue: 0
62 ; RELOC-NEXT: Length: 16
63 ; RELOC-NEXT: Type: R_TOC (0x3)
65 ; RELOC: Virtual Address: 0x40
66 ; RELOC-NEXT: Symbol: .__get_tpointer ([[#NFA+1]])
67 ; RELOC-NEXT: IsSigned: No
68 ; RELOC-NEXT: FixupBitValue: 0
69 ; RELOC-NEXT: Length: 26
70 ; RELOC-NEXT: Type: R_RBA (0x18)
72 ; RELOC: Virtual Address: 0x8E
73 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+29]])
74 ; RELOC-NEXT: IsSigned: No
75 ; RELOC-NEXT: FixupBitValue: 0
76 ; RELOC-NEXT: Length: 16
77 ; RELOC-NEXT: Type: R_TOC (0x3)
79 ; RELOC: Virtual Address: 0xD0
80 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit ([[#NFA+35]])
81 ; RELOC-NEXT: IsSigned: No
82 ; RELOC-NEXT: FixupBitValue: 0
83 ; RELOC-NEXT: Length: 32
84 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
86 ; RELOC: Virtual Address: 0xD4
87 ; RELOC-NEXT: Symbol: ThreadLocalVarInit ([[#NFA+33]])
88 ; RELOC-NEXT: IsSigned: No
89 ; RELOC-NEXT: FixupBitValue: 0
90 ; RELOC-NEXT: Length: 32
91 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
93 ; RELOC: Virtual Address: 0xDC
94 ; RELOC-NEXT: Symbol: IThreadLocalVarUninit2 ([[#NFA+37]])
95 ; RELOC-NEXT: IsSigned: No
96 ; RELOC-NEXT: FixupBitValue: 0
97 ; RELOC-NEXT: Length: 32
98 ; RELOC-NEXT: Type: R_TLS_LE (0x23)
102 ; SYM-NEXT: Format: aixcoff-rs6000
103 ; SYM-NEXT: Arch: powerpc
104 ; SYM-NEXT: AddressSize: 32bit
105 ; SYM-NEXT: Symbols [
106 ; SYM: Index: [[#NFA+1]]
107 ; SYM-NEXT: Name: .__get_tpointer
108 ; SYM-NEXT: Value (RelocatableAddress): 0x0
109 ; SYM-NEXT: Section: N_UNDEF
110 ; SYM-NEXT: Type: 0x0
111 ; SYM-NEXT: StorageClass: C_EXT (0x2)
112 ; SYM-NEXT: NumberOfAuxEntries: 1
113 ; SYM-NEXT: CSECT Auxiliary Entry {
114 ; SYM-NEXT: Index: [[#NFA+2]]
115 ; SYM-NEXT: SectionLen: 0
116 ; SYM-NEXT: ParameterHashIndex: 0x0
117 ; SYM-NEXT: TypeChkSectNum: 0x0
118 ; SYM-NEXT: SymbolAlignmentLog2: 0
119 ; SYM-NEXT: SymbolType: XTY_ER (0x0)
120 ; SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
121 ; SYM-NEXT: StabInfoIndex: 0x0
122 ; SYM-NEXT: StabSectNum: 0x0
125 ; SYM: Index: [[#NFA+23]]
126 ; SYM-NEXT: Name: IThreadLocalVarUninit
127 ; SYM-NEXT: Value (RelocatableAddress): 0xD0
128 ; SYM-NEXT: Section: .data
129 ; SYM-NEXT: Type: 0x0
130 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
131 ; SYM-NEXT: NumberOfAuxEntries: 1
132 ; SYM-NEXT: CSECT Auxiliary Entry {
133 ; SYM-NEXT: Index: [[#NFA+24]]
134 ; SYM-NEXT: SectionLen: 4
135 ; SYM-NEXT: ParameterHashIndex: 0x0
136 ; SYM-NEXT: TypeChkSectNum: 0x0
137 ; SYM-NEXT: SymbolAlignmentLog2: 2
138 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
139 ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3)
140 ; SYM-NEXT: StabInfoIndex: 0x0
141 ; SYM-NEXT: StabSectNum: 0x0
144 ; SYM: Index: [[#NFA+25]]
145 ; SYM-NEXT: Name: ThreadLocalVarInit
146 ; SYM-NEXT: Value (RelocatableAddress): 0xD4
147 ; SYM-NEXT: Section: .data
148 ; SYM-NEXT: Type: 0x0
149 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
150 ; SYM-NEXT: NumberOfAuxEntries: 1
151 ; SYM-NEXT: CSECT Auxiliary Entry {
152 ; SYM-NEXT: Index: [[#NFA+26]]
153 ; SYM-NEXT: SectionLen: 4
154 ; SYM-NEXT: ParameterHashIndex: 0x0
155 ; SYM-NEXT: TypeChkSectNum: 0x0
156 ; SYM-NEXT: SymbolAlignmentLog2: 2
157 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
158 ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3)
159 ; SYM-NEXT: StabInfoIndex: 0x0
160 ; SYM-NEXT: StabSectNum: 0x0
163 ; SYM: Index: [[#NFA+29]]
164 ; SYM-NEXT: Name: IThreadLocalVarUninit2
165 ; SYM-NEXT: Value (RelocatableAddress): 0xDC
166 ; SYM-NEXT: Section: .data
167 ; SYM-NEXT: Type: 0x0
168 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
169 ; SYM-NEXT: NumberOfAuxEntries: 1
170 ; SYM-NEXT: CSECT Auxiliary Entry {
171 ; SYM-NEXT: Index: [[#NFA+30]]
172 ; SYM-NEXT: SectionLen: 4
173 ; SYM-NEXT: ParameterHashIndex: 0x0
174 ; SYM-NEXT: TypeChkSectNum: 0x0
175 ; SYM-NEXT: SymbolAlignmentLog2: 2
176 ; SYM-NEXT: SymbolType: XTY_SD (0x1)
177 ; SYM-NEXT: StorageMappingClass: XMC_TC (0x3)
178 ; SYM-NEXT: StabInfoIndex: 0x0
179 ; SYM-NEXT: StabSectNum: 0x0
182 ; SYM: Index: [[#NFA+33]]
183 ; SYM-NEXT: Name: ThreadLocalVarInit
184 ; SYM-NEXT: Value (RelocatableAddress): 0x0
185 ; SYM-NEXT: Section: .tdata
186 ; SYM-NEXT: Type: 0x0
187 ; SYM-NEXT: StorageClass: C_EXT (0x2)
188 ; SYM-NEXT: NumberOfAuxEntries: 1
189 ; SYM-NEXT: CSECT Auxiliary Entry {
190 ; SYM-NEXT: Index: [[#NFA+34]]
191 ; SYM-NEXT: ContainingCsectSymbolIndex: [[#NFA+31]]
192 ; SYM-NEXT: ParameterHashIndex: 0x0
193 ; SYM-NEXT: TypeChkSectNum: 0x0
194 ; SYM-NEXT: SymbolAlignmentLog2: 0
195 ; SYM-NEXT: SymbolType: XTY_LD (0x2)
196 ; SYM-NEXT: StorageMappingClass: XMC_TL (0x14)
197 ; SYM-NEXT: StabInfoIndex: 0x0
198 ; SYM-NEXT: StabSectNum: 0x0
201 ; SYM: Index: [[#NFA+35]]
202 ; SYM-NEXT: Name: IThreadLocalVarUninit
203 ; SYM-NEXT: Value (RelocatableAddress): 0x4
204 ; SYM-NEXT: Section: .tbss
205 ; SYM-NEXT: Type: 0x0
206 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
207 ; SYM-NEXT: NumberOfAuxEntries: 1
208 ; SYM-NEXT: CSECT Auxiliary Entry {
209 ; SYM-NEXT: Index: [[#NFA+36]]
210 ; SYM-NEXT: SectionLen: 4
211 ; SYM-NEXT: ParameterHashIndex: 0x0
212 ; SYM-NEXT: TypeChkSectNum: 0x0
213 ; SYM-NEXT: SymbolAlignmentLog2: 2
214 ; SYM-NEXT: SymbolType: XTY_CM (0x3)
215 ; SYM-NEXT: StorageMappingClass: XMC_UL (0x15)
216 ; SYM-NEXT: StabInfoIndex: 0x0
217 ; SYM-NEXT: StabSectNum: 0x0
220 ; SYM: Index: [[#NFA+37]]
221 ; SYM-NEXT: Name: IThreadLocalVarUninit2
222 ; SYM-NEXT: Value (RelocatableAddress): 0x8
223 ; SYM-NEXT: Section: .tbss
224 ; SYM-NEXT: Type: 0x0
225 ; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
226 ; SYM-NEXT: NumberOfAuxEntries: 1
227 ; SYM-NEXT: CSECT Auxiliary Entry {
228 ; SYM-NEXT: Index: [[#NFA+38]]
229 ; SYM-NEXT: SectionLen: 4
230 ; SYM-NEXT: ParameterHashIndex: 0x0
231 ; SYM-NEXT: TypeChkSectNum: 0x0
232 ; SYM-NEXT: SymbolAlignmentLog2: 2
233 ; SYM-NEXT: SymbolType: XTY_CM (0x3)
234 ; SYM-NEXT: StorageMappingClass: XMC_UL (0x15)
235 ; SYM-NEXT: StabInfoIndex: 0x0
236 ; SYM-NEXT: StabSectNum: 0x0
240 ; DIS: file format aixcoff-rs6000
241 ; DIS: Disassembly of section .text:
242 ; DIS: 00000000 (idx: [[#NFA+5]]) .storeITLUninit:
244 ; DIS-NEXT: stwu 1, -32(1)
245 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 5, 0(2)
246 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]
248 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
249 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
250 ; DIS-NEXT: stw 0, 40(1)
251 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 4, 3, 5
252 ; DIS-NEXT: addi 1, 1, 32
253 ; DIS-NEXT: lwz 0, 8(1)
256 ; DIS: 00000030 (idx: [[#NFA+7]]) .loadTLInit:
258 ; DIS-NEXT: stwu 1, -32(1)
259 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 4(2)
260 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+25]]) ThreadLocalVarInit[TC]
261 ; DIS-NEXT: stw 0, 40(1)
262 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
263 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
264 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 3, 4
265 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 8(2)
266 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+27]]) VarInit[TC]
267 ; DIS-NEXT: lwz 4, 0(4)
268 ; DIS-NEXT: add 3, 4, 3
269 ; DIS-NEXT: addi 1, 1, 32
270 ; DIS-NEXT: lwz 0, 8(1)
273 ; DIS: 00000070 (idx: [[#NFA+9]]) .loadTLUninit:
275 ; DIS-NEXT: stwu 1, -32(1)
276 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 0(2)
277 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]
279 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
280 ; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: [[#NFA+1]]) .__get_tpointer[PR]
281 ; DIS-NEXT: stw 0, 40(1)
282 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stwx 5, 3, 4
283 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwz 4, 12(2)
284 ; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: [[#NFA+29]]) IThreadLocalVarUninit2[TC]
285 ; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} lwzx 3, 3, 4
286 ; DIS-NEXT: addi 3, 3, 1
287 ; DIS-NEXT: addi 1, 1, 32
288 ; DIS-NEXT: lwz 0, 8(1)
292 ; DIS: Disassembly of section .data:
293 ; DIS: 000000a8 (idx: [[#NFA+13]]) VarInit:
294 ; DIS-NEXT: a8: 00 00 00 57
295 ; DIS: 000000ac (idx: [[#NFA+15]]) storeITLUninit[DS]:
296 ; DIS-NEXT: ac: 00 00 00 00
297 ; DIS-NEXT: 000000ac: R_POS (idx: [[#NFA+5]]) .storeITLUninit
298 ; DIS-NEXT: b0: 00 00 00 d0
299 ; DIS-NEXT: 000000b0: R_POS (idx: [[#NFA+21]]) TOC[TC0]
300 ; DIS-NEXT: b4: 00 00 00 00
301 ; DIS: 000000b8 (idx: [[#NFA+17]]) loadTLInit[DS]:
302 ; DIS-NEXT: b8: 00 00 00 30
303 ; DIS-NEXT: 000000b8: R_POS (idx: [[#NFA+7]]) .loadTLInit
304 ; DIS-NEXT: bc: 00 00 00 d0
305 ; DIS-NEXT: 000000bc: R_POS (idx: [[#NFA+21]]) TOC[TC0]
306 ; DIS-NEXT: c0: 00 00 00 00
307 ; DIS: 000000c4 (idx: [[#NFA+19]]) loadTLUninit[DS]:
308 ; DIS-NEXT: c4: 00 00 00 70
309 ; DIS-NEXT: 000000c4: R_POS (idx: [[#NFA+9]]) .loadTLUninit
310 ; DIS-NEXT: c8: 00 00 00 d0
311 ; DIS-NEXT: 000000c8: R_POS (idx: [[#NFA+21]]) TOC[TC0]
312 ; DIS-NEXT: cc: 00 00 00 00
313 ; DIS: 000000d0 (idx: [[#NFA+23]]) IThreadLocalVarUninit[TC]:
314 ; DIS-NEXT: d0: 00 00 00 04
315 ; DIS-NEXT: 000000d0: R_TLS_LE (idx: [[#NFA+35]]) IThreadLocalVarUninit[UL]
316 ; DIS: 000000d4 (idx: [[#NFA+25]]) ThreadLocalVarInit[TC]:
317 ; DIS-NEXT: d4: 00 00 00 00
318 ; DIS-NEXT: 000000d4: R_TLS_LE (idx: [[#NFA+33]]) ThreadLocalVarInit
319 ; DIS: 000000d8 (idx: [[#NFA+27]]) VarInit[TC]:
320 ; DIS-NEXT: d8: 00 00 00 a8
321 ; DIS-NEXT: 000000d8: R_POS (idx: [[#NFA+13]]) VarInit
322 ; DIS: 000000dc (idx: [[#NFA+29]]) IThreadLocalVarUninit2[TC]:
323 ; DIS-NEXT: dc: 00 00 00 08
324 ; DIS-NEXT: 000000dc: R_TLS_LE (idx: [[#NFA+37]]) IThreadLocalVarUninit2[UL]
326 ; DIS: Disassembly of section .tdata:
327 ; DIS: 00000000 (idx: [[#NFA+33]]) ThreadLocalVarInit:
328 ; DIS-NEXT: 0: 00 00 00 01
330 ; DIS: Disassembly of section .tbss:
331 ; DIS: 00000004 (idx: [[#NFA+35]]) IThreadLocalVarUninit[UL]:
333 ; DIS: 00000008 (idx: [[#NFA+37]]) IThreadLocalVarUninit2[UL]: