1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O3 -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 -run-pass=ppc-mi-peepholes \
3 # RUN: -simplify-mir %s -o - | FileCheck %s
7 tracksRegLiveness: true
9 ; CHECK-LABEL: name: poc
11 ; CHECK-NEXT: successors: %bb.1, %bb.2
12 ; CHECK-NEXT: liveins: $x3, $x4, $x5, $x6
14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x6
15 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:g8rc = COPY killed $x5
16 ; CHECK-NEXT: dead %2:g8rc = COPY killed $x4
17 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY killed $x3
18 ; CHECK-NEXT: [[ANDI8_rec:%[0-9]+]]:g8rc = ANDI8_rec killed [[COPY1]], 1, implicit-def dead $cr0, implicit-def $cr0gt
19 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:crbitrc = COPY killed $cr0gt
20 ; CHECK-NEXT: BCn killed [[COPY3]], %bb.2
24 ; CHECK-NEXT: liveins: $x3
26 ; CHECK-NEXT: [[EXTSW:%[0-9]+]]:g8rc = EXTSW killed $x3
27 ; CHECK-NEXT: [[RLDICR:%[0-9]+]]:g8rc = RLDICR killed [[ANDI8_rec]], 2, 61
28 ; CHECK-NEXT: dead $x3 = COPY killed [[RLDICR]]
29 ; CHECK-NEXT: [[RLDICR1:%[0-9]+]]:g8rc = RLDICR killed [[EXTSW]], 2, 61
30 ; CHECK-NEXT: [[ADD8_:%[0-9]+]]:g8rc = ADD8 killed [[COPY2]], killed [[RLDICR1]]
31 ; CHECK-NEXT: $x3 = COPY killed [[ADD8_]]
32 ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
35 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
36 ; CHECK-NEXT: [[DEF:%[0-9]+]]:g8rc = IMPLICIT_DEF
37 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:g8rc = INSERT_SUBREG killed [[DEF]], killed [[COPY4]], %subreg.sub_32
38 ; CHECK-NEXT: $x3 = COPY killed [[INSERT_SUBREG]]
39 ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit killed $x3
41 successors: %bb.1, %bb.2
42 liveins: $x3, $x4, $x5, $x6
47 %1:g8rc_and_g8rc_nox0 = COPY $x3
48 %11:g8rc = ANDI8_rec %3, 1, implicit-def $cr0
49 %6:crbitrc = COPY $cr0gt
57 %12:g8rc = RLDICR %11, 2, 61
59 %9:g8rc = RLDICR %0, 2, 61
60 %10:g8rc = ADD8 %1, %9
62 BLR8 implicit $lr8, implicit $rm, implicit $x3
65 %5:gprc = COPY %4.sub_32
66 %8:g8rc = IMPLICIT_DEF
67 %7:g8rc = INSERT_SUBREG %8, %5, %subreg.sub_32
69 BLR8 implicit $lr8, implicit $rm, implicit $x3