1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv64 -mattr=+zfh -run-pass=regbankselect \
3 # RUN: -simplify-mir -verify-machineinstrs %s \
4 # RUN: -o - | FileCheck %s
9 tracksRegLiveness: true
14 ; CHECK-LABEL: name: fptosi_s32_s16
15 ; CHECK: liveins: $f10_h
17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
18 ; CHECK-NEXT: [[FCVT_W_RV64_:%[0-9]+]]:gprb(s64) = G_FCVT_W_RV64 [[COPY]](s16), 1
19 ; CHECK-NEXT: $x10 = COPY [[FCVT_W_RV64_]](s64)
20 ; CHECK-NEXT: PseudoRET implicit $x10
21 %0:_(s16) = COPY $f10_h
22 %1:_(s64) = G_FCVT_W_RV64 %0(s16), 1
24 PseudoRET implicit $x10
30 tracksRegLiveness: true
35 ; CHECK-LABEL: name: fptoui_s32_s16
36 ; CHECK: liveins: $f10_h
38 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
39 ; CHECK-NEXT: [[FCVT_WU_RV64_:%[0-9]+]]:gprb(s64) = G_FCVT_WU_RV64 [[COPY]](s16), 1
40 ; CHECK-NEXT: $x10 = COPY [[FCVT_WU_RV64_]](s64)
41 ; CHECK-NEXT: PseudoRET implicit $x10
42 %0:_(s16) = COPY $f10_h
43 %1:_(s64) = G_FCVT_WU_RV64 %0(s16), 1
45 PseudoRET implicit $x10
51 tracksRegLiveness: true
56 ; CHECK-LABEL: name: fptosi_s64_s16
57 ; CHECK: liveins: $f10_h
59 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
60 ; CHECK-NEXT: [[FPTOSI:%[0-9]+]]:gprb(s64) = G_FPTOSI [[COPY]](s16)
61 ; CHECK-NEXT: $x10 = COPY [[FPTOSI]](s64)
62 ; CHECK-NEXT: PseudoRET implicit $x10
63 %0:_(s16) = COPY $f10_h
64 %1:_(s64) = G_FPTOSI %0(s16)
66 PseudoRET implicit $x10
72 tracksRegLiveness: true
77 ; CHECK-LABEL: name: fptoui_s64_s16
78 ; CHECK: liveins: $f10_h
80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
81 ; CHECK-NEXT: [[FPTOUI:%[0-9]+]]:gprb(s64) = G_FPTOUI [[COPY]](s16)
82 ; CHECK-NEXT: $x10 = COPY [[FPTOUI]](s64)
83 ; CHECK-NEXT: PseudoRET implicit $x10
84 %0:_(s16) = COPY $f10_h
85 %1:_(s64) = G_FPTOUI %0(s16)
87 PseudoRET implicit $x10