1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s
7 define <vscale x 1 x half> @ceil_nxv1f16(<vscale x 1 x half> %x) strictfp {
8 ; CHECK-LABEL: ceil_nxv1f16:
10 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu
11 ; CHECK-NEXT: vmfne.vv v0, v8, v8
12 ; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
13 ; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
14 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
15 ; CHECK-NEXT: vfabs.v v9, v8
16 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
17 ; CHECK-NEXT: fsrmi a0, 3
18 ; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
19 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
21 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
22 ; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
23 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
25 %a = call <vscale x 1 x half> @llvm.experimental.constrained.ceil.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
26 ret <vscale x 1 x half> %a
28 declare <vscale x 1 x half> @llvm.experimental.constrained.ceil.nxv1f16(<vscale x 1 x half>, metadata)
30 define <vscale x 2 x half> @ceil_nxv2f16(<vscale x 2 x half> %x) strictfp {
31 ; CHECK-LABEL: ceil_nxv2f16:
33 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, mu
34 ; CHECK-NEXT: vmfne.vv v0, v8, v8
35 ; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
36 ; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
37 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
38 ; CHECK-NEXT: vfabs.v v9, v8
39 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
40 ; CHECK-NEXT: fsrmi a0, 3
41 ; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
42 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
44 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
45 ; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
46 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
48 %a = call <vscale x 2 x half> @llvm.experimental.constrained.ceil.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
49 ret <vscale x 2 x half> %a
51 declare <vscale x 2 x half> @llvm.experimental.constrained.ceil.nxv2f16(<vscale x 2 x half>, metadata)
53 define <vscale x 4 x half> @ceil_nxv4f16(<vscale x 4 x half> %x) strictfp {
54 ; CHECK-LABEL: ceil_nxv4f16:
56 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, mu
57 ; CHECK-NEXT: vmfne.vv v0, v8, v8
58 ; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
59 ; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
60 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
61 ; CHECK-NEXT: vfabs.v v9, v8
62 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
63 ; CHECK-NEXT: fsrmi a0, 3
64 ; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
65 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
67 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
68 ; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
69 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
71 %a = call <vscale x 4 x half> @llvm.experimental.constrained.ceil.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
72 ret <vscale x 4 x half> %a
74 declare <vscale x 4 x half> @llvm.experimental.constrained.ceil.nxv4f16(<vscale x 4 x half>, metadata)
76 define <vscale x 8 x half> @ceil_nxv8f16(<vscale x 8 x half> %x) strictfp {
77 ; CHECK-LABEL: ceil_nxv8f16:
79 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, mu
80 ; CHECK-NEXT: vmfne.vv v0, v8, v8
81 ; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
82 ; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
83 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
84 ; CHECK-NEXT: vfabs.v v10, v8
85 ; CHECK-NEXT: vmflt.vf v0, v10, fa5
86 ; CHECK-NEXT: fsrmi a0, 3
87 ; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma
88 ; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
90 ; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
91 ; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
92 ; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
94 %a = call <vscale x 8 x half> @llvm.experimental.constrained.ceil.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
95 ret <vscale x 8 x half> %a
97 declare <vscale x 8 x half> @llvm.experimental.constrained.ceil.nxv8f16(<vscale x 8 x half>, metadata)
99 define <vscale x 16 x half> @ceil_nxv16f16(<vscale x 16 x half> %x) strictfp {
100 ; CHECK-LABEL: ceil_nxv16f16:
102 ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, mu
103 ; CHECK-NEXT: vmfne.vv v0, v8, v8
104 ; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
105 ; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
106 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
107 ; CHECK-NEXT: vfabs.v v12, v8
108 ; CHECK-NEXT: vmflt.vf v0, v12, fa5
109 ; CHECK-NEXT: fsrmi a0, 3
110 ; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma
111 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
112 ; CHECK-NEXT: fsrm a0
113 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
114 ; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
115 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
117 %a = call <vscale x 16 x half> @llvm.experimental.constrained.ceil.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
118 ret <vscale x 16 x half> %a
120 declare <vscale x 16 x half> @llvm.experimental.constrained.ceil.nxv16f16(<vscale x 16 x half>, metadata)
122 define <vscale x 32 x half> @ceil_nxv32f16(<vscale x 32 x half> %x) strictfp {
123 ; CHECK-LABEL: ceil_nxv32f16:
125 ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, mu
126 ; CHECK-NEXT: vmfne.vv v0, v8, v8
127 ; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
128 ; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
129 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
130 ; CHECK-NEXT: vfabs.v v16, v8
131 ; CHECK-NEXT: vmflt.vf v0, v16, fa5
132 ; CHECK-NEXT: fsrmi a0, 3
133 ; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, ma
134 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
135 ; CHECK-NEXT: fsrm a0
136 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
137 ; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
138 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
140 %a = call <vscale x 32 x half> @llvm.experimental.constrained.ceil.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
141 ret <vscale x 32 x half> %a
143 declare <vscale x 32 x half> @llvm.experimental.constrained.ceil.nxv32f16(<vscale x 32 x half>, metadata)
145 define <vscale x 1 x float> @ceil_nxv1f32(<vscale x 1 x float> %x) strictfp {
146 ; CHECK-LABEL: ceil_nxv1f32:
148 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, mu
149 ; CHECK-NEXT: vmfne.vv v0, v8, v8
150 ; CHECK-NEXT: lui a0, 307200
151 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
152 ; CHECK-NEXT: fmv.w.x fa5, a0
153 ; CHECK-NEXT: vfabs.v v9, v8
154 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
155 ; CHECK-NEXT: fsrmi a0, 3
156 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
157 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
158 ; CHECK-NEXT: fsrm a0
159 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
160 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
161 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
163 %a = call <vscale x 1 x float> @llvm.experimental.constrained.ceil.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
164 ret <vscale x 1 x float> %a
166 declare <vscale x 1 x float> @llvm.experimental.constrained.ceil.nxv1f32(<vscale x 1 x float>, metadata)
168 define <vscale x 2 x float> @ceil_nxv2f32(<vscale x 2 x float> %x) strictfp {
169 ; CHECK-LABEL: ceil_nxv2f32:
171 ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, mu
172 ; CHECK-NEXT: vmfne.vv v0, v8, v8
173 ; CHECK-NEXT: lui a0, 307200
174 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
175 ; CHECK-NEXT: fmv.w.x fa5, a0
176 ; CHECK-NEXT: vfabs.v v9, v8
177 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
178 ; CHECK-NEXT: fsrmi a0, 3
179 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
180 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
181 ; CHECK-NEXT: fsrm a0
182 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
183 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
184 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
186 %a = call <vscale x 2 x float> @llvm.experimental.constrained.ceil.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
187 ret <vscale x 2 x float> %a
189 declare <vscale x 2 x float> @llvm.experimental.constrained.ceil.nxv2f32(<vscale x 2 x float>, metadata)
191 define <vscale x 4 x float> @ceil_nxv4f32(<vscale x 4 x float> %x) strictfp {
192 ; CHECK-LABEL: ceil_nxv4f32:
194 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, mu
195 ; CHECK-NEXT: vmfne.vv v0, v8, v8
196 ; CHECK-NEXT: lui a0, 307200
197 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
198 ; CHECK-NEXT: fmv.w.x fa5, a0
199 ; CHECK-NEXT: vfabs.v v10, v8
200 ; CHECK-NEXT: vmflt.vf v0, v10, fa5
201 ; CHECK-NEXT: fsrmi a0, 3
202 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
203 ; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
204 ; CHECK-NEXT: fsrm a0
205 ; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
206 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
207 ; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
209 %a = call <vscale x 4 x float> @llvm.experimental.constrained.ceil.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
210 ret <vscale x 4 x float> %a
212 declare <vscale x 4 x float> @llvm.experimental.constrained.ceil.nxv4f32(<vscale x 4 x float>, metadata)
214 define <vscale x 8 x float> @ceil_nxv8f32(<vscale x 8 x float> %x) strictfp {
215 ; CHECK-LABEL: ceil_nxv8f32:
217 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu
218 ; CHECK-NEXT: vmfne.vv v0, v8, v8
219 ; CHECK-NEXT: lui a0, 307200
220 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
221 ; CHECK-NEXT: fmv.w.x fa5, a0
222 ; CHECK-NEXT: vfabs.v v12, v8
223 ; CHECK-NEXT: vmflt.vf v0, v12, fa5
224 ; CHECK-NEXT: fsrmi a0, 3
225 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma
226 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
227 ; CHECK-NEXT: fsrm a0
228 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
229 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
230 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
232 %a = call <vscale x 8 x float> @llvm.experimental.constrained.ceil.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
233 ret <vscale x 8 x float> %a
235 declare <vscale x 8 x float> @llvm.experimental.constrained.ceil.nxv8f32(<vscale x 8 x float>, metadata)
237 define <vscale x 16 x float> @ceil_nxv16f32(<vscale x 16 x float> %x) strictfp {
238 ; CHECK-LABEL: ceil_nxv16f32:
240 ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, mu
241 ; CHECK-NEXT: vmfne.vv v0, v8, v8
242 ; CHECK-NEXT: lui a0, 307200
243 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
244 ; CHECK-NEXT: fmv.w.x fa5, a0
245 ; CHECK-NEXT: vfabs.v v16, v8
246 ; CHECK-NEXT: vmflt.vf v0, v16, fa5
247 ; CHECK-NEXT: fsrmi a0, 3
248 ; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma
249 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
250 ; CHECK-NEXT: fsrm a0
251 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
252 ; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
253 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
255 %a = call <vscale x 16 x float> @llvm.experimental.constrained.ceil.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
256 ret <vscale x 16 x float> %a
258 declare <vscale x 16 x float> @llvm.experimental.constrained.ceil.nxv16f32(<vscale x 16 x float>, metadata)
260 define <vscale x 1 x double> @ceil_nxv1f64(<vscale x 1 x double> %x) strictfp {
261 ; CHECK-LABEL: ceil_nxv1f64:
263 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, mu
264 ; CHECK-NEXT: vmfne.vv v0, v8, v8
265 ; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
266 ; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
267 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
268 ; CHECK-NEXT: vfabs.v v9, v8
269 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
270 ; CHECK-NEXT: fsrmi a0, 3
271 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma
272 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
273 ; CHECK-NEXT: fsrm a0
274 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
275 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
276 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
278 %a = call <vscale x 1 x double> @llvm.experimental.constrained.ceil.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
279 ret <vscale x 1 x double> %a
281 declare <vscale x 1 x double> @llvm.experimental.constrained.ceil.nxv1f64(<vscale x 1 x double>, metadata)
283 define <vscale x 2 x double> @ceil_nxv2f64(<vscale x 2 x double> %x) strictfp {
284 ; CHECK-LABEL: ceil_nxv2f64:
286 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, mu
287 ; CHECK-NEXT: vmfne.vv v0, v8, v8
288 ; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
289 ; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
290 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
291 ; CHECK-NEXT: vfabs.v v10, v8
292 ; CHECK-NEXT: vmflt.vf v0, v10, fa5
293 ; CHECK-NEXT: fsrmi a0, 3
294 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, ma
295 ; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
296 ; CHECK-NEXT: fsrm a0
297 ; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
298 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
299 ; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
301 %a = call <vscale x 2 x double> @llvm.experimental.constrained.ceil.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
302 ret <vscale x 2 x double> %a
304 declare <vscale x 2 x double> @llvm.experimental.constrained.ceil.nxv2f64(<vscale x 2 x double>, metadata)
306 define <vscale x 4 x double> @ceil_nxv4f64(<vscale x 4 x double> %x) strictfp {
307 ; CHECK-LABEL: ceil_nxv4f64:
309 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, mu
310 ; CHECK-NEXT: vmfne.vv v0, v8, v8
311 ; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
312 ; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
313 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
314 ; CHECK-NEXT: vfabs.v v12, v8
315 ; CHECK-NEXT: vmflt.vf v0, v12, fa5
316 ; CHECK-NEXT: fsrmi a0, 3
317 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, ma
318 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
319 ; CHECK-NEXT: fsrm a0
320 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
321 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
322 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
324 %a = call <vscale x 4 x double> @llvm.experimental.constrained.ceil.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
325 ret <vscale x 4 x double> %a
327 declare <vscale x 4 x double> @llvm.experimental.constrained.ceil.nxv4f64(<vscale x 4 x double>, metadata)
329 define <vscale x 8 x double> @ceil_nxv8f64(<vscale x 8 x double> %x) strictfp {
330 ; CHECK-LABEL: ceil_nxv8f64:
332 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, mu
333 ; CHECK-NEXT: vmfne.vv v0, v8, v8
334 ; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
335 ; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
336 ; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
337 ; CHECK-NEXT: vfabs.v v16, v8
338 ; CHECK-NEXT: vmflt.vf v0, v16, fa5
339 ; CHECK-NEXT: fsrmi a0, 3
340 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
341 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
342 ; CHECK-NEXT: fsrm a0
343 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
344 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
345 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
347 %a = call <vscale x 8 x double> @llvm.experimental.constrained.ceil.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
348 ret <vscale x 8 x double> %a
350 declare <vscale x 8 x double> @llvm.experimental.constrained.ceil.nxv8f64(<vscale x 8 x double>, metadata)