1 ; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o - | FileCheck %s
2 ; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o - -filetype=obj | spirv-val %}
4 ; Test lowering to spir-v backend for various types and scalar/vector
6 ; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
7 ; CHECK-DAG: %[[#f32:]] = OpTypeFloat 32
8 ; CHECK-DAG: %[[#v4_float:]] = OpTypeVector %[[#f32]] 4
9 ; CHECK-DAG: %[[#bool:]] = OpTypeBool
10 ; CHECK-DAG: %[[#v4_bool:]] = OpTypeVector %[[#bool]] 4
11 ; CHECK-DAG: %[[#scope:]] = OpConstant %[[#uint]] 3
13 ; CHECK-LABEL: Begin function test_float
14 ; CHECK: %[[#fexpr:]] = OpFunctionParameter %[[#f32]]
15 ; CHECK: %[[#idx1:]] = OpFunctionParameter %[[#uint]]
16 define float @test_float(float %fexpr, i32 %idx) {
18 ; CHECK: %[[#fret:]] = OpGroupNonUniformShuffle %[[#f32]] %[[#scope]] %[[#fexpr]] %[[#idx1]]
19 %0 = call float @llvm.spv.wave.readlane.f32(float %fexpr, i32 %idx)
23 ; CHECK-LABEL: Begin function test_int
24 ; CHECK: %[[#iexpr:]] = OpFunctionParameter %[[#uint]]
25 ; CHECK: %[[#idx2:]] = OpFunctionParameter %[[#uint]]
26 define i32 @test_int(i32 %iexpr, i32 %idx) {
28 ; CHECK: %[[#iret:]] = OpGroupNonUniformShuffle %[[#uint]] %[[#scope]] %[[#iexpr]] %[[#idx2]]
29 %0 = call i32 @llvm.spv.wave.readlane.i32(i32 %iexpr, i32 %idx)
33 ; CHECK-LABEL: Begin function test_vbool
34 ; CHECK: %[[#vbexpr:]] = OpFunctionParameter %[[#v4_bool]]
35 ; CHECK: %[[#idx3:]] = OpFunctionParameter %[[#uint]]
36 define <4 x i1> @test_vbool(<4 x i1> %vbexpr, i32 %idx) {
38 ; CHECK: %[[#vbret:]] = OpGroupNonUniformShuffle %[[#v4_bool]] %[[#scope]] %[[#vbexpr]] %[[#idx3]]
39 %0 = call <4 x i1> @llvm.spv.wave.readlane.v4i1(<4 x i1> %vbexpr, i32 %idx)
43 ; CHECK-LABEL: Begin function test_vfloat
44 ; CHECK: %[[#vfexpr:]] = OpFunctionParameter %[[#v4_float]]
45 ; CHECK: %[[#idx4:]] = OpFunctionParameter %[[#uint]]
46 define <4 x float> @test_vfloat(<4 x float> %vfexpr, i32 %idx) {
48 ; CHECK: %[[#vbret:]] = OpGroupNonUniformShuffle %[[#v4_float]] %[[#scope]] %[[#vfexpr]] %[[#idx4]]
49 %0 = call <4 x float> @llvm.spv.wave.readlane.v4f32(<4 x float> %vfexpr, i32 %idx)
53 declare float @llvm.spv.wave.readlane.f32(float, i32)
54 declare i32 @llvm.spv.wave.readlane.i32(i32, i32)
55 declare <4 x i1> @llvm.spv.wave.readlane.v4i1(<4 x i1>, i32)
56 declare <4 x float> @llvm.spv.wave.readlane.v4f32(<4 x float>, i32)