1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
4 ; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode().
6 ; SystemZISD::REPLICATE
7 define i32 @f0(ptr %p0) {
10 ; CHECK-NEXT: vl %v0, 0(%r2), 3
11 ; CHECK-NEXT: vgbm %v1, 0
12 ; CHECK-NEXT: vceqf %v0, %v0, %v1
13 ; CHECK-NEXT: vrepif %v1, 1
14 ; CHECK-NEXT: vnc %v0, %v1, %v0
15 ; CHECK-NEXT: vst %v0, 0(%r2), 3
16 ; CHECK-NEXT: vlgvf %r2, %v0, 3
17 ; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d
19 %a0 = load <4 x i32>, ptr %p0, align 8
20 %cmp0 = icmp ne <4 x i32> %a0, zeroinitializer
21 %zxt0 = zext <4 x i1> %cmp0 to <4 x i32>
22 store <4 x i32> %zxt0, ptr %p0, align 8
23 %ext0 = extractelement <4 x i32> %zxt0, i32 3
27 ; The vector icmp+zext involves a REPLICATE of 1's. If KnownBits reflects
28 ; this, DAGCombiner can see that the i32 icmp and zext here are not needed.
29 %cmp1 = icmp ne i32 %ext0, 0
30 %zxt1 = zext i1 %cmp1 to i32
34 ; SystemZISD::JOIN_DWORDS (and REPLICATE)
35 ; The DAG XOR has JOIN_DWORDS and REPLICATE operands. With KnownBits properly set
36 ; for both these nodes, ICMP is used instead of TM during lowering because
37 ; adjustForRedundantAnd() succeeds.
38 define void @f1(i64 %a0, i64 %a1) {
41 ; CHECK-NEXT: risbgn %r0, %r2, 63, 191, 0
42 ; CHECK-NEXT: risbgn %r1, %r3, 63, 191, 0
43 ; CHECK-NEXT: vlvgp %v0, %r0, %r1
44 ; CHECK-NEXT: vrepig %v1, 1
45 ; CHECK-NEXT: vx %v0, %v0, %v1
46 ; CHECK-NEXT: vlgvg %r0, %v0, 0
47 ; CHECK-NEXT: cgijlh %r0, 0, .LBB1_3
48 ; CHECK-NEXT: # %bb.1:
49 ; CHECK-NEXT: vlgvg %r0, %v0, 1
50 ; CHECK-NEXT: cgijlh %r0, 0, .LBB1_3
51 ; CHECK-NEXT: # %bb.2:
52 ; CHECK-NEXT: .LBB1_3:
55 %3 = insertelement <2 x i64> undef, i64 %1, i32 0
56 %4 = insertelement <2 x i64> %3, i64 %2, i32 1
57 %5 = xor <2 x i64> %4, <i64 1, i64 1>
58 %6 = extractelement <2 x i64> %5, i32 0
60 %8 = icmp eq i64 %7, 0
61 br i1 %8, label %9, label %14
63 ; <label>:9: ; preds = %0
64 %10 = extractelement <2 x i64> %5, i32 1
66 %12 = icmp eq i64 %11, 0
67 br i1 %12, label %13, label %14
69 ; <label>:13: ; preds = %0
72 ; <label>:14: ; preds = %0