1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z13 -disable-basic-aa | FileCheck %s
4 ; This test checks that we do not a reference to a deleted node.
8 @g_11 = external dso_local unnamed_addr global i1, align 4
9 @g_69 = external dso_local global i32, align 4
10 @g_73 = external dso_local unnamed_addr global i32, align 4
11 @g_832 = external dso_local constant %0, align 4
12 @g_938 = external dso_local unnamed_addr global i64, align 8
14 ; Function Attrs: nounwind
15 define void @main() local_unnamed_addr #0 {
18 ; CHECK-NEXT: lhi %r0, 1
19 ; CHECK-NEXT: larl %r1, g_938
20 ; CHECK-NEXT: lhi %r2, 3
21 ; CHECK-NEXT: lhi %r3, 4
22 ; CHECK-NEXT: larl %r4, g_11
23 ; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
24 ; CHECK-NEXT: strl %r0, g_73
25 ; CHECK-NEXT: lrl %r5, g_832
26 ; CHECK-NEXT: lrl %r5, g_832
27 ; CHECK-NEXT: lrl %r5, g_832
28 ; CHECK-NEXT: lrl %r5, g_832
29 ; CHECK-NEXT: lrl %r5, g_832
30 ; CHECK-NEXT: lrl %r5, g_832
31 ; CHECK-NEXT: strl %r2, g_69
32 ; CHECK-NEXT: lrl %r5, g_832
33 ; CHECK-NEXT: lrl %r5, g_832
34 ; CHECK-NEXT: lrl %r5, g_832
35 ; CHECK-NEXT: lrl %r5, g_832
36 ; CHECK-NEXT: lrl %r5, g_832
37 ; CHECK-NEXT: lrl %r5, g_832
38 ; CHECK-NEXT: lrl %r5, g_832
39 ; CHECK-NEXT: lrl %r5, g_832
40 ; CHECK-NEXT: lrl %r5, g_832
41 ; CHECK-NEXT: lrl %r5, g_832
42 ; CHECK-NEXT: lrl %r5, g_832
43 ; CHECK-NEXT: lrl %r5, g_832
44 ; CHECK-NEXT: lrl %r5, g_832
45 ; CHECK-NEXT: lrl %r5, g_832
46 ; CHECK-NEXT: lrl %r5, g_832
47 ; CHECK-NEXT: agsi 0(%r1), 24
48 ; CHECK-NEXT: lrl %r5, g_832
49 ; CHECK-NEXT: strl %r3, g_69
50 ; CHECK-NEXT: mvi 0(%r4), 1
51 ; CHECK-NEXT: j .LBB0_1
54 ; <label>:1: ; preds = %1, %0
55 store i32 1, ptr @g_73, align 4
56 %2 = load i64, ptr @g_938, align 8
57 store i32 0, ptr @g_69, align 4
58 %3 = load volatile i32, ptr @g_832, align 4
59 %4 = load volatile i32, ptr @g_832, align 4
60 %5 = load volatile i32, ptr @g_832, align 4
61 %6 = load volatile i32, ptr @g_832, align 4
62 store i32 1, ptr @g_69, align 4
63 %7 = load volatile i32, ptr @g_832, align 4
64 %8 = load volatile i32, ptr @g_832, align 4
65 store i32 3, ptr @g_69, align 4
66 %9 = load volatile i32, ptr @g_832, align 4
67 %10 = load volatile i32, ptr @g_832, align 4
68 store i32 1, ptr @g_69, align 4
69 %11 = load volatile i32, ptr @g_832, align 4
70 store i32 2, ptr @g_69, align 4
71 %12 = load volatile i32, ptr @g_832, align 4
72 store i32 3, ptr @g_69, align 4
73 %13 = load volatile i32, ptr @g_832, align 4
74 store i32 0, ptr @g_69, align 4
75 %14 = load volatile i32, ptr @g_832, align 4
76 %15 = load volatile i32, ptr @g_832, align 4
77 %16 = load volatile i32, ptr @g_832, align 4
78 %17 = load volatile i32, ptr @g_832, align 4
79 store i32 1, ptr @g_69, align 4
80 %18 = load volatile i32, ptr @g_832, align 4
81 store i32 2, ptr @g_69, align 4
82 %19 = load volatile i32, ptr @g_832, align 4
83 store i32 3, ptr @g_69, align 4
84 %20 = load volatile i32, ptr @g_832, align 4
85 store i32 0, ptr @g_69, align 4
86 %21 = load volatile i32, ptr @g_832, align 4
87 store i32 1, ptr @g_69, align 4
88 %22 = load volatile i32, ptr @g_832, align 4
89 store i32 2, ptr @g_69, align 4
90 %23 = load volatile i32, ptr @g_832, align 4
91 store i32 3, ptr @g_69, align 4
93 store i64 %24, ptr @g_938, align 8
94 %25 = load volatile i32, ptr @g_832, align 4
95 store i32 4, ptr @g_69, align 4
96 store i1 true, ptr @g_11, align 4