1 ; Test insertions of register values into 0.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5 ; Test v16i8 insertion into 0.
6 define <16 x i8> @f1(i8 %val1, i8 %val2) {
9 ; CHECK-DAG: vlvgb %v24, %r2, 2
10 ; CHECK-DAG: vlvgb %v24, %r3, 12
12 %vec1 = insertelement <16 x i8> zeroinitializer, i8 %val1, i32 2
13 %vec2 = insertelement <16 x i8> %vec1, i8 %val2, i32 12
17 ; Test v8i16 insertion into 0.
18 define <8 x i16> @f2(i16 %val1, i16 %val2) {
21 ; CHECK-DAG: vlvgh %v24, %r2, 3
22 ; CHECK-DAG: vlvgh %v24, %r3, 5
24 %vec1 = insertelement <8 x i16> zeroinitializer, i16 %val1, i32 3
25 %vec2 = insertelement <8 x i16> %vec1, i16 %val2, i32 5
29 ; Test v4i32 insertion into 0.
30 define <4 x i32> @f3(i32 %val) {
33 ; CHECK: vlvgf %v24, %r2, 3
35 %ret = insertelement <4 x i32> zeroinitializer, i32 %val, i32 3
39 ; Test v2i64 insertion into 0.
40 define <2 x i64> @f4(i64 %val) {
42 ; CHECK: lghi [[REG:%r[0-5]]], 0
43 ; CHECK: vlvgp %v24, [[REG]], %r2
45 %ret = insertelement <2 x i64> zeroinitializer, i64 %val, i32 1
49 ; Test v4f32 insertion into 0.
50 define <4 x float> @f5(float %val) {
52 ; CHECK-DAG: vuplhf [[REG:%v[0-9]+]], %v0
53 ; CHECK-DAG: vgbm [[ZERO:%v[0-9]+]], 0
54 ; CHECK: vmrhg %v24, [[ZERO]], [[REG]]
56 %ret = insertelement <4 x float> zeroinitializer, float %val, i32 3
60 ; Test v2f64 insertion into 0.
61 define <2 x double> @f6(double %val) {
63 ; CHECK: vgbm [[REG:%v[0-9]+]], 0
64 ; CHECK: vmrhg %v24, [[REG]], %v0
66 %ret = insertelement <2 x double> zeroinitializer, double %val, i32 1