1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no-generate-body-for-unused-prefixes
2 ; i686 uses -fast-isel-abort=1 only as argument lowering is not supported, so check that FastISel didn't miss the call.
3 ; RUN: llc < %s -fast-isel -pass-remarks-missed=sdagisel -mtriple=i686-unknown-unknown -mattr=+crc32 2>&1 >/dev/null | FileCheck %s -check-prefix=STDERR-X86 -allow-empty
4 ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=-sse4.2,+crc32 | FileCheck %s -check-prefix=X86
5 ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=+crc32 | FileCheck %s -check-prefix=X86
6 ; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=-sse4.2,+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
7 ; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
8 ; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
10 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
12 ; STDERR-X86-NOT: FastISel missed call: %res = call i32 @llvm.x86.sse42.crc32
14 ; Note: %a1 is i32 as FastISel can't handle i8/i16 arguments.
15 define i32 @test_mm_crc32_u8(i32 %a0, i32 %a1) nounwind {
16 ; X86-LABEL: test_mm_crc32_u8:
18 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
19 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
20 ; X86-NEXT: crc32b %cl, %eax
23 ; X64-LABEL: test_mm_crc32_u8:
25 ; X64-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
26 ; X64-NEXT: crc32b %sil, %eax # encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
27 ; X64-NEXT: retq # encoding: [0xc3]
29 ; EGPR-LABEL: test_mm_crc32_u8:
31 ; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
32 ; EGPR-NEXT: crc32b %sil, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
33 ; EGPR-NEXT: retq # encoding: [0xc3]
34 %trunc = trunc i32 %a1 to i8
35 %res = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a0, i8 %trunc)
38 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind readnone
40 ; Note: %a1 is i32 as FastISel can't handle i8/i16 arguments.
41 define i32 @test_mm_crc32_u16(i32 %a0, i32 %a1) nounwind {
42 ; X86-LABEL: test_mm_crc32_u16:
44 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
45 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
46 ; X86-NEXT: crc32w %cx, %eax
49 ; X64-LABEL: test_mm_crc32_u16:
51 ; X64-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
52 ; X64-NEXT: crc32w %si, %eax # encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
53 ; X64-NEXT: retq # encoding: [0xc3]
55 ; EGPR-LABEL: test_mm_crc32_u16:
57 ; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
58 ; EGPR-NEXT: crc32w %si, %eax # EVEX TO LEGACY Compression encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
59 ; EGPR-NEXT: retq # encoding: [0xc3]
60 %trunc = trunc i32 %a1 to i16
61 %res = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a0, i16 %trunc)
64 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind readnone
66 define i32 @test_mm_crc32_u32(i32 %a0, i32 %a1) nounwind {
67 ; X86-LABEL: test_mm_crc32_u32:
69 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
70 ; X86-NEXT: crc32l {{[0-9]+}}(%esp), %eax
73 ; X64-LABEL: test_mm_crc32_u32:
75 ; X64-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
76 ; X64-NEXT: crc32l %esi, %eax # encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
77 ; X64-NEXT: retq # encoding: [0xc3]
79 ; EGPR-LABEL: test_mm_crc32_u32:
81 ; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
82 ; EGPR-NEXT: crc32l %esi, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
83 ; EGPR-NEXT: retq # encoding: [0xc3]
84 %res = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a0, i32 %a1)
87 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind readnone