| blob | 332fbf7188af81c8b34c64b26022eda034680a48 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK-SSE
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-NO-FASTFMA
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx -fp-contract=fast | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512F,CHECK-FMA
7 declare i16 @llvm.umax.i16(i16, i16)
8 declare i64 @llvm.umin.i64(i64, i64)
10 declare <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float>, <4 x i32>)
12 define <4 x float> @fmul_pow2_4xfloat(<4 x i32> %i) {
13 ; CHECK-SSE-LABEL: fmul_pow2_4xfloat:
14 ; CHECK-SSE: # %bb.0:
15 ; CHECK-SSE-NEXT: pslld $23, %xmm0
16 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
17 ; CHECK-SSE-NEXT: retq
18 ;
19 ; CHECK-AVX2-LABEL: fmul_pow2_4xfloat:
20 ; CHECK-AVX2: # %bb.0:
21 ; CHECK-AVX2-NEXT: vpslld $23, %xmm0, %xmm0
22 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
23 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
24 ; CHECK-AVX2-NEXT: retq
25 ;
26 ; CHECK-NO-FASTFMA-LABEL: fmul_pow2_4xfloat:
27 ; CHECK-NO-FASTFMA: # %bb.0:
28 ; CHECK-NO-FASTFMA-NEXT: vpslld $23, %xmm0, %xmm0
29 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
30 ; CHECK-NO-FASTFMA-NEXT: vpaddd %xmm1, %xmm0, %xmm0
31 ; CHECK-NO-FASTFMA-NEXT: retq
32 ;
33 ; CHECK-FMA-LABEL: fmul_pow2_4xfloat:
34 ; CHECK-FMA: # %bb.0:
35 ; CHECK-FMA-NEXT: vpslld $23, %xmm0, %xmm0
36 ; CHECK-FMA-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
37 ; CHECK-FMA-NEXT: retq
38 %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i
39 %p2_f = uitofp <4 x i32> %p2 to <4 x float>
40 %r = fmul <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f
41 ret <4 x float> %r
42 }
44 define <4 x float> @fmul_pow2_ldexp_4xfloat(<4 x i32> %i) {
45 ; CHECK-SSE-LABEL: fmul_pow2_ldexp_4xfloat:
46 ; CHECK-SSE: # %bb.0:
47 ; CHECK-SSE-NEXT: subq $56, %rsp
48 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 64
49 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
50 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
51 ; CHECK-SSE-NEXT: movd %xmm1, %edi
52 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
53 ; CHECK-SSE-NEXT: callq ldexpf@PLT
54 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
55 ; CHECK-SSE-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
56 ; CHECK-SSE-NEXT: # xmm0 = mem[2,3,2,3]
57 ; CHECK-SSE-NEXT: movd %xmm0, %edi
58 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
59 ; CHECK-SSE-NEXT: callq ldexpf@PLT
60 ; CHECK-SSE-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
61 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
62 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
63 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
64 ; CHECK-SSE-NEXT: movd %xmm0, %edi
65 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
66 ; CHECK-SSE-NEXT: callq ldexpf@PLT
67 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
68 ; CHECK-SSE-NEXT: pshufd $85, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
69 ; CHECK-SSE-NEXT: # xmm0 = mem[1,1,1,1]
70 ; CHECK-SSE-NEXT: movd %xmm0, %edi
71 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
72 ; CHECK-SSE-NEXT: callq ldexpf@PLT
73 ; CHECK-SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
74 ; CHECK-SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
75 ; CHECK-SSE-NEXT: unpcklpd (%rsp), %xmm1 # 16-byte Folded Reload
76 ; CHECK-SSE-NEXT: # xmm1 = xmm1[0],mem[0]
77 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
78 ; CHECK-SSE-NEXT: addq $56, %rsp
79 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
80 ; CHECK-SSE-NEXT: retq
81 ;
82 ; CHECK-AVX-LABEL: fmul_pow2_ldexp_4xfloat:
83 ; CHECK-AVX: # %bb.0:
84 ; CHECK-AVX-NEXT: subq $40, %rsp
85 ; CHECK-AVX-NEXT: .cfi_def_cfa_offset 48
86 ; CHECK-AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
87 ; CHECK-AVX-NEXT: vextractps $1, %xmm0, %edi
88 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
89 ; CHECK-AVX-NEXT: callq ldexpf@PLT
90 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
91 ; CHECK-AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
92 ; CHECK-AVX-NEXT: vmovd %xmm0, %edi
93 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
94 ; CHECK-AVX-NEXT: callq ldexpf@PLT
95 ; CHECK-AVX-NEXT: vinsertps $16, (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
96 ; CHECK-AVX-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[2,3]
97 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
98 ; CHECK-AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
99 ; CHECK-AVX-NEXT: vextractps $2, %xmm0, %edi
100 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
101 ; CHECK-AVX-NEXT: callq ldexpf@PLT
102 ; CHECK-AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
103 ; CHECK-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
104 ; CHECK-AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
105 ; CHECK-AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
106 ; CHECK-AVX-NEXT: vextractps $3, %xmm0, %edi
107 ; CHECK-AVX-NEXT: vmovss {{.*#+}} xmm0 = [9.0E+0,0.0E+0,0.0E+0,0.0E+0]
108 ; CHECK-AVX-NEXT: callq ldexpf@PLT
109 ; CHECK-AVX-NEXT: vmovaps (%rsp), %xmm1 # 16-byte Reload
110 ; CHECK-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
111 ; CHECK-AVX-NEXT: addq $40, %rsp
112 ; CHECK-AVX-NEXT: .cfi_def_cfa_offset 8
113 ; CHECK-AVX-NEXT: retq
114 %r = call <4 x float> @llvm.ldexp.v4f32.v4i32(<4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, <4 x i32> %i)
115 ret <4 x float> %r
116 }
118 define <4 x float> @fdiv_pow2_4xfloat(<4 x i32> %i) {
119 ; CHECK-SSE-LABEL: fdiv_pow2_4xfloat:
120 ; CHECK-SSE: # %bb.0:
121 ; CHECK-SSE-NEXT: pslld $23, %xmm0
122 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
123 ; CHECK-SSE-NEXT: psubd %xmm0, %xmm1
124 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
125 ; CHECK-SSE-NEXT: retq
126 ;
127 ; CHECK-AVX-LABEL: fdiv_pow2_4xfloat:
128 ; CHECK-AVX: # %bb.0:
129 ; CHECK-AVX-NEXT: vpslld $23, %xmm0, %xmm0
130 ; CHECK-AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1091567616,1091567616,1091567616,1091567616]
131 ; CHECK-AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0
132 ; CHECK-AVX-NEXT: retq
133 %p2 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %i
134 %p2_f = uitofp <4 x i32> %p2 to <4 x float>
135 %r = fdiv <4 x float> <float 9.000000e+00, float 9.000000e+00, float 9.000000e+00, float 9.000000e+00>, %p2_f
136 ret <4 x float> %r
137 }
139 declare <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half>, <8 x i16>)
141 define <8 x half> @fmul_pow2_8xhalf(<8 x i16> %i) {
142 ; CHECK-SSE-LABEL: fmul_pow2_8xhalf:
143 ; CHECK-SSE: # %bb.0:
144 ; CHECK-SSE-NEXT: subq $88, %rsp
145 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 96
146 ; CHECK-SSE-NEXT: movdqa %xmm0, %xmm1
147 ; CHECK-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
148 ; CHECK-SSE-NEXT: pslld $23, %xmm1
149 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm2 = [1065353216,1065353216,1065353216,1065353216]
150 ; CHECK-SSE-NEXT: paddd %xmm2, %xmm1
151 ; CHECK-SSE-NEXT: cvttps2dq %xmm1, %xmm1
152 ; CHECK-SSE-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill
153 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
154 ; CHECK-SSE-NEXT: pslld $23, %xmm0
155 ; CHECK-SSE-NEXT: paddd %xmm2, %xmm0
156 ; CHECK-SSE-NEXT: cvttps2dq %xmm0, %xmm0
157 ; CHECK-SSE-NEXT: pslld $16, %xmm0
158 ; CHECK-SSE-NEXT: psrld $16, %xmm0
159 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
160 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
161 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
162 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
163 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
164 ; CHECK-SSE-NEXT: cvtdq2ps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
165 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
166 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
167 ; CHECK-SSE-NEXT: pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
168 ; CHECK-SSE-NEXT: # xmm0 = mem[2,3,2,3]
169 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
170 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
171 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
172 ; CHECK-SSE-NEXT: pshufd $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
173 ; CHECK-SSE-NEXT: # xmm0 = mem[3,3,3,3]
174 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
175 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
176 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
177 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
178 ; CHECK-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
179 ; CHECK-SSE-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
180 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
181 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
182 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
183 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
184 ; CHECK-SSE-NEXT: cvtdq2ps (%rsp), %xmm0 # 16-byte Folded Reload
185 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
186 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
187 ; CHECK-SSE-NEXT: pshufd $238, (%rsp), %xmm0 # 16-byte Folded Reload
188 ; CHECK-SSE-NEXT: # xmm0 = mem[2,3,2,3]
189 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
190 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
191 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
192 ; CHECK-SSE-NEXT: pshufd $255, (%rsp), %xmm0 # 16-byte Folded Reload
193 ; CHECK-SSE-NEXT: # xmm0 = mem[3,3,3,3]
194 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
195 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
196 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
197 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
198 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
199 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
200 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
201 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
202 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
203 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
204 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
205 ; CHECK-SSE-NEXT: punpcklwd (%rsp), %xmm0 # 16-byte Folded Reload
206 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
207 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
208 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
209 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
210 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
211 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
212 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
213 ; CHECK-SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
214 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
215 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
216 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
217 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
218 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
219 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm1 # 16-byte Reload
220 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
221 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
222 ; CHECK-SSE-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
223 ; CHECK-SSE-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
224 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
225 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
226 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
227 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
228 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
229 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
230 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
231 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
232 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
233 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
234 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
235 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
236 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
237 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
238 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
239 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
240 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
241 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
242 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
243 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
244 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
245 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
246 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
247 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
248 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
249 ; CHECK-SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
250 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
251 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
252 ; CHECK-SSE-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
253 ; CHECK-SSE-NEXT: punpcklqdq (%rsp), %xmm1 # 16-byte Folded Reload
254 ; CHECK-SSE-NEXT: # xmm1 = xmm1[0],mem[0]
255 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
256 ; CHECK-SSE-NEXT: addq $88, %rsp
257 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
258 ; CHECK-SSE-NEXT: retq
259 ;
260 ; CHECK-AVX2-LABEL: fmul_pow2_8xhalf:
261 ; CHECK-AVX2: # %bb.0:
262 ; CHECK-AVX2-NEXT: subq $120, %rsp
263 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 128
264 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
265 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]
266 ; CHECK-AVX2-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
267 ; CHECK-AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]
268 ; CHECK-AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
269 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
270 ; CHECK-AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
271 ; CHECK-AVX2-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
272 ; CHECK-AVX2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
273 ; CHECK-AVX2-NEXT: vzeroupper
274 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
275 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
276 ; CHECK-AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
277 ; CHECK-AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
278 ; CHECK-AVX2-NEXT: vzeroupper
279 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
280 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
281 ; CHECK-AVX2-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
282 ; CHECK-AVX2-NEXT: # xmm0 = mem[1,0]
283 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
284 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
285 ; CHECK-AVX2-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
286 ; CHECK-AVX2-NEXT: # xmm0 = mem[3,3,3,3]
287 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
288 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
289 ; CHECK-AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
290 ; CHECK-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm0
291 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
292 ; CHECK-AVX2-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
293 ; CHECK-AVX2-NEXT: vzeroupper
294 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
295 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
296 ; CHECK-AVX2-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
297 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
298 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
299 ; CHECK-AVX2-NEXT: vpermilpd $1, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
300 ; CHECK-AVX2-NEXT: # xmm0 = mem[1,0]
301 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
302 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
303 ; CHECK-AVX2-NEXT: vpermilps $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
304 ; CHECK-AVX2-NEXT: # xmm0 = mem[3,3,3,3]
305 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
306 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
307 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
308 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
309 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
310 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
311 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
312 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
313 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
314 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
315 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
316 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
317 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
318 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
319 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
320 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
321 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
322 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
323 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
324 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
325 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
326 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
327 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
328 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
329 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
330 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
331 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
332 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
333 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
334 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
335 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
336 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
337 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
338 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
339 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
340 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
341 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
342 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
343 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
344 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
345 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
346 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
347 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
348 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
349 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
350 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
351 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
352 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
353 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
354 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
355 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
356 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
357 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
358 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
359 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
360 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
361 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
362 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
363 ; CHECK-AVX2-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
364 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0]
365 ; CHECK-AVX2-NEXT: addq $120, %rsp
366 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 8
367 ; CHECK-AVX2-NEXT: retq
368 ;
369 ; CHECK-NO-FASTFMA-LABEL: fmul_pow2_8xhalf:
370 ; CHECK-NO-FASTFMA: # %bb.0:
371 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
372 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]
373 ; CHECK-NO-FASTFMA-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
374 ; CHECK-NO-FASTFMA-NEXT: vpxor %xmm1, %xmm1, %xmm1
375 ; CHECK-NO-FASTFMA-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15]
376 ; CHECK-NO-FASTFMA-NEXT: vcvtdq2ps %ymm0, %ymm0
377 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
378 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %ymm0
379 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3,8.192E+3]
380 ; CHECK-NO-FASTFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
381 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
382 ; CHECK-NO-FASTFMA-NEXT: vzeroupper
383 ; CHECK-NO-FASTFMA-NEXT: retq
384 ;
385 ; CHECK-FMA-LABEL: fmul_pow2_8xhalf:
386 ; CHECK-FMA: # %bb.0:
387 ; CHECK-FMA-NEXT: vpbroadcastw {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1]
388 ; CHECK-FMA-NEXT: vpsllvw %xmm0, %xmm1, %xmm0
389 ; CHECK-FMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
390 ; CHECK-FMA-NEXT: vcvtdq2ps %ymm0, %ymm0
391 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
392 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %ymm0
393 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
394 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
395 ; CHECK-FMA-NEXT: vzeroupper
396 ; CHECK-FMA-NEXT: retq
397 %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i
398 %p2_f = uitofp <8 x i16> %p2 to <8 x half>
399 %r = fmul <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f
400 ret <8 x half> %r
401 }
403 define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
404 ; CHECK-SSE-LABEL: fmul_pow2_ldexp_8xhalf:
405 ; CHECK-SSE: # %bb.0:
406 ; CHECK-SSE-NEXT: subq $72, %rsp
407 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 80
408 ; CHECK-SSE-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
409 ; CHECK-SSE-NEXT: pextrw $7, %xmm0, %eax
410 ; CHECK-SSE-NEXT: movswl %ax, %edi
411 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
412 ; CHECK-SSE-NEXT: callq ldexpf@PLT
413 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
414 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
415 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
416 ; CHECK-SSE-NEXT: pextrw $6, %xmm0, %eax
417 ; CHECK-SSE-NEXT: movswl %ax, %edi
418 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
419 ; CHECK-SSE-NEXT: callq ldexpf@PLT
420 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
421 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
422 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
423 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
424 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
425 ; CHECK-SSE-NEXT: pextrw $5, %xmm0, %eax
426 ; CHECK-SSE-NEXT: movswl %ax, %edi
427 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
428 ; CHECK-SSE-NEXT: callq ldexpf@PLT
429 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
430 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
431 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
432 ; CHECK-SSE-NEXT: pextrw $4, %xmm0, %eax
433 ; CHECK-SSE-NEXT: movswl %ax, %edi
434 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
435 ; CHECK-SSE-NEXT: callq ldexpf@PLT
436 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
437 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
438 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
439 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
440 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
441 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
442 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
443 ; CHECK-SSE-NEXT: pextrw $3, %xmm0, %eax
444 ; CHECK-SSE-NEXT: movswl %ax, %edi
445 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
446 ; CHECK-SSE-NEXT: callq ldexpf@PLT
447 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
448 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
449 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
450 ; CHECK-SSE-NEXT: pextrw $2, %xmm0, %eax
451 ; CHECK-SSE-NEXT: movswl %ax, %edi
452 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
453 ; CHECK-SSE-NEXT: callq ldexpf@PLT
454 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
455 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
456 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
457 ; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
458 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
459 ; CHECK-SSE-NEXT: pextrw $1, %xmm0, %eax
460 ; CHECK-SSE-NEXT: movswl %ax, %edi
461 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
462 ; CHECK-SSE-NEXT: callq ldexpf@PLT
463 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
464 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
465 ; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
466 ; CHECK-SSE-NEXT: movd %xmm0, %eax
467 ; CHECK-SSE-NEXT: movswl %ax, %edi
468 ; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
469 ; CHECK-SSE-NEXT: callq ldexpf@PLT
470 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
471 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
472 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
473 ; CHECK-SSE-NEXT: punpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
474 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
475 ; CHECK-SSE-NEXT: punpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
476 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0]
477 ; CHECK-SSE-NEXT: addq $72, %rsp
478 ; CHECK-SSE-NEXT: .cfi_def_cfa_offset 8
479 ; CHECK-SSE-NEXT: retq
480 ;
481 ; CHECK-AVX2-LABEL: fmul_pow2_ldexp_8xhalf:
482 ; CHECK-AVX2: # %bb.0:
483 ; CHECK-AVX2-NEXT: subq $72, %rsp
484 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 80
485 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
486 ; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %eax
487 ; CHECK-AVX2-NEXT: movswl %ax, %edi
488 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
489 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
490 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
491 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
492 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
493 ; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %eax
494 ; CHECK-AVX2-NEXT: movswl %ax, %edi
495 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
496 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
497 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
498 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
499 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
500 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
501 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
502 ; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %eax
503 ; CHECK-AVX2-NEXT: movswl %ax, %edi
504 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
505 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
506 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
507 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
508 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
509 ; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %eax
510 ; CHECK-AVX2-NEXT: movswl %ax, %edi
511 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
512 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
513 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
514 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
515 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
516 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
517 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
518 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
519 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
520 ; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %eax
521 ; CHECK-AVX2-NEXT: movswl %ax, %edi
522 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
523 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
524 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
525 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
526 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
527 ; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
528 ; CHECK-AVX2-NEXT: movswl %ax, %edi
529 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
530 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
531 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
532 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
533 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
534 ; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
535 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
536 ; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %eax
537 ; CHECK-AVX2-NEXT: movswl %ax, %edi
538 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
539 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
540 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
541 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
542 ; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
543 ; CHECK-AVX2-NEXT: vmovd %xmm0, %eax
544 ; CHECK-AVX2-NEXT: movswl %ax, %edi
545 ; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
546 ; CHECK-AVX2-NEXT: callq ldexpf@PLT
547 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
548 ; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
549 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
550 ; CHECK-AVX2-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
551 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
552 ; CHECK-AVX2-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
553 ; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0]
554 ; CHECK-AVX2-NEXT: addq $72, %rsp
555 ; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 8
556 ; CHECK-AVX2-NEXT: retq
557 ;
558 ; CHECK-AVX512F-LABEL: fmul_pow2_ldexp_8xhalf:
559 ; CHECK-AVX512F: # %bb.0:
560 ; CHECK-AVX512F-NEXT: subq $72, %rsp
561 ; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 80
562 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
563 ; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %eax
564 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
565 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
566 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
567 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
568 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
569 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
570 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
571 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
572 ; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %eax
573 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
574 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
575 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
576 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
577 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
578 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
579 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
580 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
581 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
582 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
583 ; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %eax
584 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
585 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
586 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
587 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
588 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
589 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
590 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
591 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
592 ; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %eax
593 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
594 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
595 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
596 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
597 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
598 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
599 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
600 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
601 ; CHECK-AVX512F-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
602 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
603 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
604 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
605 ; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %eax
606 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
607 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
608 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
609 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
610 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
611 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
612 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
613 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
614 ; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %eax
615 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
616 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
617 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
618 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
619 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
620 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
621 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
622 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
623 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
624 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
625 ; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %eax
626 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
627 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
628 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
629 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
630 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
631 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
632 ; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
633 ; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
634 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
635 ; CHECK-AVX512F-NEXT: movswl %ax, %edi
636 ; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
637 ; CHECK-AVX512F-NEXT: callq ldexpf@PLT
638 ; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
639 ; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
640 ; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
641 ; CHECK-AVX512F-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
642 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
643 ; CHECK-AVX512F-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
644 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
645 ; CHECK-AVX512F-NEXT: vpunpcklqdq {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
646 ; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0]
647 ; CHECK-AVX512F-NEXT: addq $72, %rsp
648 ; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 8
649 ; CHECK-AVX512F-NEXT: retq
650 %r = call <8 x half> @llvm.ldexp.v8f16.v8i16(<8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, <8 x i16> %i)
651 ret <8 x half> %r
652 }
654 define <8 x half> @fdiv_pow2_8xhalf(<8 x i16> %i) {
655 ; CHECK-SSE-LABEL: fdiv_pow2_8xhalf:
656 ; CHECK-SSE: # %bb.0:
657 ; CHECK-SSE-NEXT: psllw $10, %xmm0
658 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]
659 ; CHECK-SSE-NEXT: psubw %xmm0, %xmm1
660 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
661 ; CHECK-SSE-NEXT: retq
662 ;
663 ; CHECK-AVX-LABEL: fdiv_pow2_8xhalf:
664 ; CHECK-AVX: # %bb.0:
665 ; CHECK-AVX-NEXT: vpsllw $10, %xmm0, %xmm0
666 ; CHECK-AVX-NEXT: vpbroadcastw {{.*#+}} xmm1 = [28672,28672,28672,28672,28672,28672,28672,28672]
667 ; CHECK-AVX-NEXT: vpsubw %xmm0, %xmm1, %xmm0
668 ; CHECK-AVX-NEXT: retq
669 %p2 = shl <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, %i
670 %p2_f = uitofp <8 x i16> %p2 to <8 x half>
671 %r = fdiv <8 x half> <half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000, half 0xH7000>, %p2_f
672 ret <8 x half> %r
673 }
675 define double @fmul_pow_shl_cnt(i64 %cnt) nounwind {
676 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt:
677 ; CHECK-SSE: # %bb.0:
678 ; CHECK-SSE-NEXT: shlq $52, %rdi
679 ; CHECK-SSE-NEXT: movabsq $4621256167635550208, %rax # imm = 0x4022000000000000
680 ; CHECK-SSE-NEXT: addq %rdi, %rax
681 ; CHECK-SSE-NEXT: movq %rax, %xmm0
682 ; CHECK-SSE-NEXT: retq
683 ;
684 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt:
685 ; CHECK-AVX: # %bb.0:
686 ; CHECK-AVX-NEXT: shlq $52, %rdi
687 ; CHECK-AVX-NEXT: movabsq $4621256167635550208, %rax # imm = 0x4022000000000000
688 ; CHECK-AVX-NEXT: addq %rdi, %rax
689 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
690 ; CHECK-AVX-NEXT: retq
691 %shl = shl nuw i64 1, %cnt
692 %conv = uitofp i64 %shl to double
693 %mul = fmul double 9.000000e+00, %conv
694 ret double %mul
695 }
697 define double @fmul_pow_shl_cnt2(i64 %cnt) nounwind {
698 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt2:
699 ; CHECK-SSE: # %bb.0:
700 ; CHECK-SSE-NEXT: incl %edi
701 ; CHECK-SSE-NEXT: shlq $52, %rdi
702 ; CHECK-SSE-NEXT: movabsq $-4602115869219225600, %rax # imm = 0xC022000000000000
703 ; CHECK-SSE-NEXT: addq %rdi, %rax
704 ; CHECK-SSE-NEXT: movq %rax, %xmm0
705 ; CHECK-SSE-NEXT: retq
706 ;
707 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt2:
708 ; CHECK-AVX: # %bb.0:
709 ; CHECK-AVX-NEXT: incl %edi
710 ; CHECK-AVX-NEXT: shlq $52, %rdi
711 ; CHECK-AVX-NEXT: movabsq $-4602115869219225600, %rax # imm = 0xC022000000000000
712 ; CHECK-AVX-NEXT: addq %rdi, %rax
713 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
714 ; CHECK-AVX-NEXT: retq
715 %shl = shl nuw i64 2, %cnt
716 %conv = uitofp i64 %shl to double
717 %mul = fmul double -9.000000e+00, %conv
718 ret double %mul
719 }
721 define float @fmul_pow_select(i32 %cnt, i1 %c) nounwind {
722 ; CHECK-SSE-LABEL: fmul_pow_select:
723 ; CHECK-SSE: # %bb.0:
724 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
725 ; CHECK-SSE-NEXT: leal 1(%rdi), %eax
726 ; CHECK-SSE-NEXT: testb $1, %sil
727 ; CHECK-SSE-NEXT: cmovnel %edi, %eax
728 ; CHECK-SSE-NEXT: shll $23, %eax
729 ; CHECK-SSE-NEXT: addl $1091567616, %eax # imm = 0x41100000
730 ; CHECK-SSE-NEXT: movd %eax, %xmm0
731 ; CHECK-SSE-NEXT: retq
732 ;
733 ; CHECK-AVX-LABEL: fmul_pow_select:
734 ; CHECK-AVX: # %bb.0:
735 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
736 ; CHECK-AVX-NEXT: leal 1(%rdi), %eax
737 ; CHECK-AVX-NEXT: testb $1, %sil
738 ; CHECK-AVX-NEXT: cmovnel %edi, %eax
739 ; CHECK-AVX-NEXT: shll $23, %eax
740 ; CHECK-AVX-NEXT: addl $1091567616, %eax # imm = 0x41100000
741 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
742 ; CHECK-AVX-NEXT: retq
743 %shl2 = shl nuw i32 2, %cnt
744 %shl1 = shl nuw i32 1, %cnt
745 %shl = select i1 %c, i32 %shl1, i32 %shl2
746 %conv = uitofp i32 %shl to float
747 %mul = fmul float 9.000000e+00, %conv
748 ret float %mul
749 }
751 define float @fmul_fly_pow_mul_min_pow2(i64 %cnt) nounwind {
752 ; CHECK-SSE-LABEL: fmul_fly_pow_mul_min_pow2:
753 ; CHECK-SSE: # %bb.0:
754 ; CHECK-SSE-NEXT: addl $3, %edi
755 ; CHECK-SSE-NEXT: cmpl $13, %edi
756 ; CHECK-SSE-NEXT: movl $13, %eax
757 ; CHECK-SSE-NEXT: cmovbl %edi, %eax
758 ; CHECK-SSE-NEXT: shll $23, %eax
759 ; CHECK-SSE-NEXT: addl $1091567616, %eax # imm = 0x41100000
760 ; CHECK-SSE-NEXT: movd %eax, %xmm0
761 ; CHECK-SSE-NEXT: retq
762 ;
763 ; CHECK-AVX-LABEL: fmul_fly_pow_mul_min_pow2:
764 ; CHECK-AVX: # %bb.0:
765 ; CHECK-AVX-NEXT: addl $3, %edi
766 ; CHECK-AVX-NEXT: cmpl $13, %edi
767 ; CHECK-AVX-NEXT: movl $13, %eax
768 ; CHECK-AVX-NEXT: cmovbl %edi, %eax
769 ; CHECK-AVX-NEXT: shll $23, %eax
770 ; CHECK-AVX-NEXT: addl $1091567616, %eax # imm = 0x41100000
771 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
772 ; CHECK-AVX-NEXT: retq
773 %shl8 = shl nuw i64 8, %cnt
774 %shl = call i64 @llvm.umin.i64(i64 %shl8, i64 8192)
775 %conv = uitofp i64 %shl to float
776 %mul = fmul float 9.000000e+00, %conv
777 ret float %mul
778 }
780 define double @fmul_pow_mul_max_pow2(i16 %cnt) nounwind {
781 ; CHECK-SSE-LABEL: fmul_pow_mul_max_pow2:
782 ; CHECK-SSE: # %bb.0:
783 ; CHECK-SSE-NEXT: movl %edi, %eax
784 ; CHECK-SSE-NEXT: leaq 1(%rax), %rcx
785 ; CHECK-SSE-NEXT: cmpq %rcx, %rax
786 ; CHECK-SSE-NEXT: cmovaq %rax, %rcx
787 ; CHECK-SSE-NEXT: shlq $52, %rcx
788 ; CHECK-SSE-NEXT: movabsq $4613937818241073152, %rax # imm = 0x4008000000000000
789 ; CHECK-SSE-NEXT: addq %rcx, %rax
790 ; CHECK-SSE-NEXT: movq %rax, %xmm0
791 ; CHECK-SSE-NEXT: retq
792 ;
793 ; CHECK-AVX-LABEL: fmul_pow_mul_max_pow2:
794 ; CHECK-AVX: # %bb.0:
795 ; CHECK-AVX-NEXT: movl %edi, %eax
796 ; CHECK-AVX-NEXT: leaq 1(%rax), %rcx
797 ; CHECK-AVX-NEXT: cmpq %rcx, %rax
798 ; CHECK-AVX-NEXT: cmovaq %rax, %rcx
799 ; CHECK-AVX-NEXT: shlq $52, %rcx
800 ; CHECK-AVX-NEXT: movabsq $4613937818241073152, %rax # imm = 0x4008000000000000
801 ; CHECK-AVX-NEXT: addq %rcx, %rax
802 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
803 ; CHECK-AVX-NEXT: retq
804 %shl2 = shl nuw i16 2, %cnt
805 %shl1 = shl nuw i16 1, %cnt
806 %shl = call i16 @llvm.umax.i16(i16 %shl1, i16 %shl2)
807 %conv = uitofp i16 %shl to double
808 %mul = fmul double 3.000000e+00, %conv
809 ret double %mul
810 }
812 define double @fmul_pow_shl_cnt_fail_maybe_non_pow2(i64 %v, i64 %cnt) nounwind {
813 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
814 ; CHECK-SSE: # %bb.0:
815 ; CHECK-SSE-NEXT: movq %rsi, %rcx
816 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
817 ; CHECK-SSE-NEXT: shlq %cl, %rdi
818 ; CHECK-SSE-NEXT: movq %rdi, %xmm1
819 ; CHECK-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
820 ; CHECK-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
821 ; CHECK-SSE-NEXT: movapd %xmm1, %xmm0
822 ; CHECK-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
823 ; CHECK-SSE-NEXT: addsd %xmm1, %xmm0
824 ; CHECK-SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
825 ; CHECK-SSE-NEXT: retq
826 ;
827 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
828 ; CHECK-AVX2: # %bb.0:
829 ; CHECK-AVX2-NEXT: movq %rsi, %rcx
830 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
831 ; CHECK-AVX2-NEXT: shlq %cl, %rdi
832 ; CHECK-AVX2-NEXT: vmovq %rdi, %xmm0
833 ; CHECK-AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
834 ; CHECK-AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
835 ; CHECK-AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
836 ; CHECK-AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm0
837 ; CHECK-AVX2-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
838 ; CHECK-AVX2-NEXT: retq
839 ;
840 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
841 ; CHECK-NO-FASTFMA: # %bb.0:
842 ; CHECK-NO-FASTFMA-NEXT: movq %rsi, %rcx
843 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
844 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rdi
845 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2sd %rdi, %xmm0, %xmm0
846 ; CHECK-NO-FASTFMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
847 ; CHECK-NO-FASTFMA-NEXT: retq
848 ;
849 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_fail_maybe_non_pow2:
850 ; CHECK-FMA: # %bb.0:
851 ; CHECK-FMA-NEXT: shlxq %rsi, %rdi, %rax
852 ; CHECK-FMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
853 ; CHECK-FMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
854 ; CHECK-FMA-NEXT: retq
855 %shl = shl nuw i64 %v, %cnt
856 %conv = uitofp i64 %shl to double
857 %mul = fmul double 9.000000e+00, %conv
858 ret double %mul
859 }
861 define <2 x float> @fmul_pow_shl_cnt_vec_fail_expensive_cast(<2 x i64> %cnt) nounwind {
862 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
863 ; CHECK-SSE: # %bb.0:
864 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
865 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,2]
866 ; CHECK-SSE-NEXT: movdqa %xmm2, %xmm3
867 ; CHECK-SSE-NEXT: psllq %xmm1, %xmm3
868 ; CHECK-SSE-NEXT: psllq %xmm0, %xmm2
869 ; CHECK-SSE-NEXT: movq %xmm2, %rax
870 ; CHECK-SSE-NEXT: xorps %xmm0, %xmm0
871 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
872 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[2,3,2,3]
873 ; CHECK-SSE-NEXT: movq %xmm1, %rax
874 ; CHECK-SSE-NEXT: xorps %xmm1, %xmm1
875 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
876 ; CHECK-SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
877 ; CHECK-SSE-NEXT: mulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
878 ; CHECK-SSE-NEXT: retq
879 ;
880 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
881 ; CHECK-AVX2: # %bb.0:
882 ; CHECK-AVX2-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
883 ; CHECK-AVX2-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
884 ; CHECK-AVX2-NEXT: vpextrq $1, %xmm0, %rax
885 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
886 ; CHECK-AVX2-NEXT: vmovq %xmm0, %rax
887 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
888 ; CHECK-AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
889 ; CHECK-AVX2-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
890 ; CHECK-AVX2-NEXT: vmulps %xmm1, %xmm0, %xmm0
891 ; CHECK-AVX2-NEXT: retq
892 ;
893 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
894 ; CHECK-NO-FASTFMA: # %bb.0:
895 ; CHECK-NO-FASTFMA-NEXT: vpmovsxbq {{.*#+}} xmm1 = [2,2]
896 ; CHECK-NO-FASTFMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
897 ; CHECK-NO-FASTFMA-NEXT: vpextrq $1, %xmm0, %rax
898 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm1
899 ; CHECK-NO-FASTFMA-NEXT: vmovq %xmm0, %rax
900 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
901 ; CHECK-NO-FASTFMA-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero
902 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1]
903 ; CHECK-NO-FASTFMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
904 ; CHECK-NO-FASTFMA-NEXT: retq
905 ;
906 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_fail_expensive_cast:
907 ; CHECK-FMA: # %bb.0:
908 ; CHECK-FMA-NEXT: vpbroadcastq {{.*#+}} xmm1 = [2,2]
909 ; CHECK-FMA-NEXT: vpsllvq %xmm0, %xmm1, %xmm0
910 ; CHECK-FMA-NEXT: vcvtqq2ps %xmm0, %xmm0
911 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
912 ; CHECK-FMA-NEXT: retq
913 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
914 %conv = uitofp <2 x i64> %shl to <2 x float>
915 %mul = fmul <2 x float> <float 15.000000e+00, float 15.000000e+00>, %conv
916 ret <2 x float> %mul
917 }
919 define <2 x double> @fmul_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {
920 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec:
921 ; CHECK-SSE: # %bb.0:
922 ; CHECK-SSE-NEXT: psllq $52, %xmm0
923 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
924 ; CHECK-SSE-NEXT: retq
925 ;
926 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec:
927 ; CHECK-AVX2: # %bb.0:
928 ; CHECK-AVX2-NEXT: vpsllq $52, %xmm0, %xmm0
929 ; CHECK-AVX2-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
930 ; CHECK-AVX2-NEXT: retq
931 ;
932 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec:
933 ; CHECK-NO-FASTFMA: # %bb.0:
934 ; CHECK-NO-FASTFMA-NEXT: vpsllq $52, %xmm0, %xmm0
935 ; CHECK-NO-FASTFMA-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
936 ; CHECK-NO-FASTFMA-NEXT: retq
937 ;
938 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec:
939 ; CHECK-FMA: # %bb.0:
940 ; CHECK-FMA-NEXT: vpsllq $52, %xmm0, %xmm0
941 ; CHECK-FMA-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0
942 ; CHECK-FMA-NEXT: retq
943 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
944 %conv = uitofp <2 x i64> %shl to <2 x double>
945 %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv
946 ret <2 x double> %mul
947 }
949 define <4 x float> @fmul_pow_shl_cnt_vec_preserve_fma(<4 x i32> %cnt, <4 x float> %add) nounwind {
950 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
951 ; CHECK-SSE: # %bb.0:
952 ; CHECK-SSE-NEXT: pslld $23, %xmm0
953 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
954 ; CHECK-SSE-NEXT: addps %xmm1, %xmm0
955 ; CHECK-SSE-NEXT: retq
956 ;
957 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
958 ; CHECK-AVX2: # %bb.0:
959 ; CHECK-AVX2-NEXT: vpslld $23, %xmm0, %xmm0
960 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]
961 ; CHECK-AVX2-NEXT: vpaddd %xmm2, %xmm0, %xmm0
962 ; CHECK-AVX2-NEXT: vaddps %xmm1, %xmm0, %xmm0
963 ; CHECK-AVX2-NEXT: retq
964 ;
965 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
966 ; CHECK-NO-FASTFMA: # %bb.0:
967 ; CHECK-NO-FASTFMA-NEXT: vpslld $23, %xmm0, %xmm0
968 ; CHECK-NO-FASTFMA-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1092616192,1092616192,1092616192,1092616192]
969 ; CHECK-NO-FASTFMA-NEXT: vpaddd %xmm2, %xmm0, %xmm0
970 ; CHECK-NO-FASTFMA-NEXT: vaddps %xmm1, %xmm0, %xmm0
971 ; CHECK-NO-FASTFMA-NEXT: retq
972 ;
973 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_preserve_fma:
974 ; CHECK-FMA: # %bb.0:
975 ; CHECK-FMA-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]
976 ; CHECK-FMA-NEXT: vpsllvd %xmm0, %xmm2, %xmm0
977 ; CHECK-FMA-NEXT: vcvtdq2ps %xmm0, %xmm0
978 ; CHECK-FMA-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * mem) + xmm1
979 ; CHECK-FMA-NEXT: retq
980 %shl = shl nsw nuw <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %cnt
981 %conv = uitofp <4 x i32> %shl to <4 x float>
982 %mul = fmul <4 x float> <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>, %conv
983 %res = fadd <4 x float> %mul, %add
984 ret <4 x float> %res
985 }
987 define <2 x double> @fmul_pow_shl_cnt_vec_non_splat_todo(<2 x i64> %cnt) nounwind {
988 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:
989 ; CHECK-SSE: # %bb.0:
990 ; CHECK-SSE-NEXT: psllq $52, %xmm0
991 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
992 ; CHECK-SSE-NEXT: retq
993 ;
994 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat_todo:
995 ; CHECK-AVX: # %bb.0:
996 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
997 ; CHECK-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
998 ; CHECK-AVX-NEXT: retq
999 %shl = shl nsw nuw <2 x i64> <i64 2, i64 2>, %cnt
1000 %conv = uitofp <2 x i64> %shl to <2 x double>
1001 %mul = fmul <2 x double> <double 15.000000e+00, double 14.000000e+00>, %conv
1002 ret <2 x double> %mul
1003 }
1005 define <2 x double> @fmul_pow_shl_cnt_vec_non_splat2_todo(<2 x i64> %cnt) nounwind {
1006 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:
1007 ; CHECK-SSE: # %bb.0:
1008 ; CHECK-SSE-NEXT: psllq $52, %xmm0
1009 ; CHECK-SSE-NEXT: paddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1010 ; CHECK-SSE-NEXT: retq
1011 ;
1012 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_vec_non_splat2_todo:
1013 ; CHECK-AVX: # %bb.0:
1014 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
1015 ; CHECK-AVX-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1016 ; CHECK-AVX-NEXT: retq
1017 %shl = shl nsw nuw <2 x i64> <i64 2, i64 1>, %cnt
1018 %conv = uitofp <2 x i64> %shl to <2 x double>
1019 %mul = fmul <2 x double> <double 15.000000e+00, double 15.000000e+00>, %conv
1020 ret <2 x double> %mul
1021 }
1023 define <2 x half> @fmul_pow_shl_cnt_vec_fail_to_large(<2 x i16> %cnt) nounwind {
1024 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1025 ; CHECK-SSE: # %bb.0:
1026 ; CHECK-SSE-NEXT: subq $40, %rsp
1027 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1028 ; CHECK-SSE-NEXT: pslld $23, %xmm0
1029 ; CHECK-SSE-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1030 ; CHECK-SSE-NEXT: cvttps2dq %xmm0, %xmm0
1031 ; CHECK-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,2,2,3,4,5,6,7]
1032 ; CHECK-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [2,2,u,u,u,u,u,u]
1033 ; CHECK-SSE-NEXT: pxor %xmm0, %xmm0
1034 ; CHECK-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1035 ; CHECK-SSE-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1036 ; CHECK-SSE-NEXT: cvtdq2ps %xmm1, %xmm0
1037 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1038 ; CHECK-SSE-NEXT: movss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
1039 ; CHECK-SSE-NEXT: pshufd $85, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
1040 ; CHECK-SSE-NEXT: # xmm0 = mem[1,1,1,1]
1041 ; CHECK-SSE-NEXT: cvtdq2ps %xmm0, %xmm0
1042 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1043 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1044 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1045 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1046 ; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1047 ; CHECK-SSE-NEXT: movss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
1048 ; CHECK-SSE-NEXT: # xmm0 = mem[0],zero,zero,zero
1049 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1050 ; CHECK-SSE-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1051 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1052 ; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
1053 ; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
1054 ; CHECK-SSE-NEXT: addq $40, %rsp
1055 ; CHECK-SSE-NEXT: retq
1056 ;
1057 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1058 ; CHECK-AVX2: # %bb.0:
1059 ; CHECK-AVX2-NEXT: subq $56, %rsp
1060 ; CHECK-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1061 ; CHECK-AVX2-NEXT: vpmovsxbd {{.*#+}} ymm1 = [2,2,0,0,0,0,0,0]
1062 ; CHECK-AVX2-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
1063 ; CHECK-AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
1064 ; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
1065 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm2, %xmm0
1066 ; CHECK-AVX2-NEXT: vzeroupper
1067 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1068 ; CHECK-AVX2-NEXT: vmovss %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
1069 ; CHECK-AVX2-NEXT: vmovdqu {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
1070 ; CHECK-AVX2-NEXT: vpextrw $0, %xmm0, %eax
1071 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm2, %xmm0
1072 ; CHECK-AVX2-NEXT: vzeroupper
1073 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1074 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1075 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1076 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1077 ; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
1078 ; CHECK-AVX2-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Reload
1079 ; CHECK-AVX2-NEXT: # xmm0 = mem[0],zero,zero,zero
1080 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1081 ; CHECK-AVX2-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1082 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1083 ; CHECK-AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
1084 ; CHECK-AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1085 ; CHECK-AVX2-NEXT: addq $56, %rsp
1086 ; CHECK-AVX2-NEXT: retq
1087 ;
1088 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1089 ; CHECK-NO-FASTFMA: # %bb.0:
1090 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1091 ; CHECK-NO-FASTFMA-NEXT: vpmovsxbd {{.*#+}} ymm1 = [2,2,0,0,0,0,0,0]
1092 ; CHECK-NO-FASTFMA-NEXT: vpsllvd %ymm0, %ymm1, %ymm0
1093 ; CHECK-NO-FASTFMA-NEXT: vpmovdw %zmm0, %ymm0
1094 ; CHECK-NO-FASTFMA-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1095 ; CHECK-NO-FASTFMA-NEXT: vcvtdq2ps %ymm0, %ymm0
1096 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1097 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %ymm0
1098 ; CHECK-NO-FASTFMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1,1.5E+1]
1099 ; CHECK-NO-FASTFMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
1100 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1101 ; CHECK-NO-FASTFMA-NEXT: vzeroupper
1102 ; CHECK-NO-FASTFMA-NEXT: retq
1103 ;
1104 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_vec_fail_to_large:
1105 ; CHECK-FMA: # %bb.0:
1106 ; CHECK-FMA-NEXT: vpbroadcastw {{.*#+}} xmm1 = [2,2,2,2,2,2,2,2]
1107 ; CHECK-FMA-NEXT: vpsllvw %xmm0, %xmm1, %xmm0
1108 ; CHECK-FMA-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1109 ; CHECK-FMA-NEXT: vcvtdq2ps %ymm0, %ymm0
1110 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1111 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %ymm0
1112 ; CHECK-FMA-NEXT: vmulps {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
1113 ; CHECK-FMA-NEXT: vcvtps2ph $4, %ymm0, %xmm0
1114 ; CHECK-FMA-NEXT: vzeroupper
1115 ; CHECK-FMA-NEXT: retq
1116 %shl = shl nsw nuw <2 x i16> <i16 2, i16 2>, %cnt
1117 %conv = uitofp <2 x i16> %shl to <2 x half>
1118 %mul = fmul <2 x half> <half 15.000000e+00, half 15.000000e+00>, %conv
1119 ret <2 x half> %mul
1120 }
1122 define double @fmul_pow_shl_cnt_fail_maybe_bad_exp(i64 %cnt) nounwind {
1123 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1124 ; CHECK-SSE: # %bb.0:
1125 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1126 ; CHECK-SSE-NEXT: movl $1, %eax
1127 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1128 ; CHECK-SSE-NEXT: shlq %cl, %rax
1129 ; CHECK-SSE-NEXT: movq %rax, %xmm1
1130 ; CHECK-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
1131 ; CHECK-SSE-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1132 ; CHECK-SSE-NEXT: movapd %xmm1, %xmm0
1133 ; CHECK-SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
1134 ; CHECK-SSE-NEXT: addsd %xmm1, %xmm0
1135 ; CHECK-SSE-NEXT: mulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1136 ; CHECK-SSE-NEXT: retq
1137 ;
1138 ; CHECK-AVX2-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1139 ; CHECK-AVX2: # %bb.0:
1140 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1141 ; CHECK-AVX2-NEXT: movl $1, %eax
1142 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1143 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1144 ; CHECK-AVX2-NEXT: vmovq %rax, %xmm0
1145 ; CHECK-AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
1146 ; CHECK-AVX2-NEXT: vsubpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1147 ; CHECK-AVX2-NEXT: vshufpd {{.*#+}} xmm1 = xmm0[1,0]
1148 ; CHECK-AVX2-NEXT: vaddsd %xmm0, %xmm1, %xmm0
1149 ; CHECK-AVX2-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1150 ; CHECK-AVX2-NEXT: retq
1151 ;
1152 ; CHECK-NO-FASTFMA-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1153 ; CHECK-NO-FASTFMA: # %bb.0:
1154 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1155 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1156 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1157 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1158 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
1159 ; CHECK-NO-FASTFMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1160 ; CHECK-NO-FASTFMA-NEXT: retq
1161 ;
1162 ; CHECK-FMA-LABEL: fmul_pow_shl_cnt_fail_maybe_bad_exp:
1163 ; CHECK-FMA: # %bb.0:
1164 ; CHECK-FMA-NEXT: movl $1, %eax
1165 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1166 ; CHECK-FMA-NEXT: vcvtusi2sd %rax, %xmm0, %xmm0
1167 ; CHECK-FMA-NEXT: vmulsd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1168 ; CHECK-FMA-NEXT: retq
1169 %shl = shl nuw i64 1, %cnt
1170 %conv = uitofp i64 %shl to double
1171 %mul = fmul double 9.745314e+288, %conv
1172 ret double %mul
1173 }
1175 define double @fmul_pow_shl_cnt_safe(i16 %cnt) nounwind {
1176 ; CHECK-SSE-LABEL: fmul_pow_shl_cnt_safe:
1177 ; CHECK-SSE: # %bb.0:
1178 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
1179 ; CHECK-SSE-NEXT: shlq $52, %rdi
1180 ; CHECK-SSE-NEXT: movabsq $8930638061065157010, %rax # imm = 0x7BEFFFFFFF5F3992
1181 ; CHECK-SSE-NEXT: addq %rdi, %rax
1182 ; CHECK-SSE-NEXT: movq %rax, %xmm0
1183 ; CHECK-SSE-NEXT: retq
1184 ;
1185 ; CHECK-AVX-LABEL: fmul_pow_shl_cnt_safe:
1186 ; CHECK-AVX: # %bb.0:
1187 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
1188 ; CHECK-AVX-NEXT: shlq $52, %rdi
1189 ; CHECK-AVX-NEXT: movabsq $8930638061065157010, %rax # imm = 0x7BEFFFFFFF5F3992
1190 ; CHECK-AVX-NEXT: addq %rdi, %rax
1191 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
1192 ; CHECK-AVX-NEXT: retq
1193 %shl = shl nuw i16 1, %cnt
1194 %conv = uitofp i16 %shl to double
1195 %mul = fmul double 9.745314e+288, %conv
1196 ret double %mul
1197 }
1199 define <2 x double> @fdiv_pow_shl_cnt_vec(<2 x i64> %cnt) nounwind {
1200 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec:
1201 ; CHECK-SSE: # %bb.0:
1202 ; CHECK-SSE-NEXT: psllq $52, %xmm0
1203 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]
1204 ; CHECK-SSE-NEXT: psubq %xmm0, %xmm1
1205 ; CHECK-SSE-NEXT: movdqa %xmm1, %xmm0
1206 ; CHECK-SSE-NEXT: retq
1207 ;
1208 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec:
1209 ; CHECK-AVX: # %bb.0:
1210 ; CHECK-AVX-NEXT: vpsllq $52, %xmm0, %xmm0
1211 ; CHECK-AVX-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4607182418800017408,4607182418800017408]
1212 ; CHECK-AVX-NEXT: vpsubq %xmm0, %xmm1, %xmm0
1213 ; CHECK-AVX-NEXT: retq
1214 %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt
1215 %conv = uitofp <2 x i64> %shl to <2 x double>
1216 %mul = fdiv <2 x double> <double 1.000000e+00, double 1.000000e+00>, %conv
1217 ret <2 x double> %mul
1218 }
1220 define <2 x float> @fdiv_pow_shl_cnt_vec_with_expensive_cast(<2 x i64> %cnt) nounwind {
1221 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:
1222 ; CHECK-SSE: # %bb.0:
1223 ; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
1224 ; CHECK-SSE-NEXT: pslld $23, %xmm1
1225 ; CHECK-SSE-NEXT: movdqa {{.*#+}} xmm0 = [1065353216,1065353216,u,u]
1226 ; CHECK-SSE-NEXT: psubd %xmm1, %xmm0
1227 ; CHECK-SSE-NEXT: retq
1228 ;
1229 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_vec_with_expensive_cast:
1230 ; CHECK-AVX: # %bb.0:
1231 ; CHECK-AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1232 ; CHECK-AVX-NEXT: vpslld $23, %xmm0, %xmm0
1233 ; CHECK-AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1065353216,1065353216,1065353216,1065353216]
1234 ; CHECK-AVX-NEXT: vpsubd %xmm0, %xmm1, %xmm0
1235 ; CHECK-AVX-NEXT: retq
1236 %shl = shl nuw <2 x i64> <i64 1, i64 1>, %cnt
1237 %conv = uitofp <2 x i64> %shl to <2 x float>
1238 %mul = fdiv <2 x float> <float 1.000000e+00, float 1.000000e+00>, %conv
1239 ret <2 x float> %mul
1240 }
1242 define float @fdiv_pow_shl_cnt_fail_maybe_z(i64 %cnt) nounwind {
1243 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1244 ; CHECK-SSE: # %bb.0:
1245 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1246 ; CHECK-SSE-NEXT: movl $8, %eax
1247 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1248 ; CHECK-SSE-NEXT: shlq %cl, %rax
1249 ; CHECK-SSE-NEXT: testq %rax, %rax
1250 ; CHECK-SSE-NEXT: js .LBB22_1
1251 ; CHECK-SSE-NEXT: # %bb.2:
1252 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1253 ; CHECK-SSE-NEXT: jmp .LBB22_3
1254 ; CHECK-SSE-NEXT: .LBB22_1:
1255 ; CHECK-SSE-NEXT: shrq %rax
1256 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1257 ; CHECK-SSE-NEXT: addss %xmm1, %xmm1
1258 ; CHECK-SSE-NEXT: .LBB22_3:
1259 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1260 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1261 ; CHECK-SSE-NEXT: retq
1262 ;
1263 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1264 ; CHECK-AVX2: # %bb.0:
1265 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1266 ; CHECK-AVX2-NEXT: movl $8, %eax
1267 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1268 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1269 ; CHECK-AVX2-NEXT: testq %rax, %rax
1270 ; CHECK-AVX2-NEXT: js .LBB22_1
1271 ; CHECK-AVX2-NEXT: # %bb.2:
1272 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1273 ; CHECK-AVX2-NEXT: jmp .LBB22_3
1274 ; CHECK-AVX2-NEXT: .LBB22_1:
1275 ; CHECK-AVX2-NEXT: shrq %rax
1276 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1277 ; CHECK-AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm0
1278 ; CHECK-AVX2-NEXT: .LBB22_3:
1279 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1280 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1281 ; CHECK-AVX2-NEXT: retq
1282 ;
1283 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1284 ; CHECK-NO-FASTFMA: # %bb.0:
1285 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1286 ; CHECK-NO-FASTFMA-NEXT: movl $8, %eax
1287 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1288 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1289 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %rax, %xmm0, %xmm0
1290 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1291 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1292 ; CHECK-NO-FASTFMA-NEXT: retq
1293 ;
1294 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_maybe_z:
1295 ; CHECK-FMA: # %bb.0:
1296 ; CHECK-FMA-NEXT: movl $8, %eax
1297 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1298 ; CHECK-FMA-NEXT: vcvtusi2ss %rax, %xmm0, %xmm0
1299 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1300 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1301 ; CHECK-FMA-NEXT: retq
1302 %shl = shl i64 8, %cnt
1303 %conv = uitofp i64 %shl to float
1304 %mul = fdiv float -9.000000e+00, %conv
1305 ret float %mul
1306 }
1308 define float @fdiv_pow_shl_cnt_fail_neg_int(i64 %cnt) nounwind {
1309 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1310 ; CHECK-SSE: # %bb.0:
1311 ; CHECK-SSE-NEXT: movq %rdi, %rcx
1312 ; CHECK-SSE-NEXT: movl $8, %eax
1313 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $rcx
1314 ; CHECK-SSE-NEXT: shlq %cl, %rax
1315 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1316 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1317 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1318 ; CHECK-SSE-NEXT: retq
1319 ;
1320 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1321 ; CHECK-AVX2: # %bb.0:
1322 ; CHECK-AVX2-NEXT: movq %rdi, %rcx
1323 ; CHECK-AVX2-NEXT: movl $8, %eax
1324 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $rcx
1325 ; CHECK-AVX2-NEXT: shlq %cl, %rax
1326 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1327 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1328 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1329 ; CHECK-AVX2-NEXT: retq
1330 ;
1331 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1332 ; CHECK-NO-FASTFMA: # %bb.0:
1333 ; CHECK-NO-FASTFMA-NEXT: movq %rdi, %rcx
1334 ; CHECK-NO-FASTFMA-NEXT: movl $8, %eax
1335 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $rcx
1336 ; CHECK-NO-FASTFMA-NEXT: shlq %cl, %rax
1337 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1338 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1339 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1340 ; CHECK-NO-FASTFMA-NEXT: retq
1341 ;
1342 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_neg_int:
1343 ; CHECK-FMA: # %bb.0:
1344 ; CHECK-FMA-NEXT: movl $8, %eax
1345 ; CHECK-FMA-NEXT: shlxq %rdi, %rax, %rax
1346 ; CHECK-FMA-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1347 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [-9.0E+0,0.0E+0,0.0E+0,0.0E+0]
1348 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1349 ; CHECK-FMA-NEXT: retq
1350 %shl = shl i64 8, %cnt
1351 %conv = sitofp i64 %shl to float
1352 %mul = fdiv float -9.000000e+00, %conv
1353 ret float %mul
1354 }
1356 define float @fdiv_pow_shl_cnt(i64 %cnt_in) nounwind {
1357 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt:
1358 ; CHECK-SSE: # %bb.0:
1359 ; CHECK-SSE-NEXT: andl $31, %edi
1360 ; CHECK-SSE-NEXT: shll $23, %edi
1361 ; CHECK-SSE-NEXT: movl $-1115684864, %eax # imm = 0xBD800000
1362 ; CHECK-SSE-NEXT: subl %edi, %eax
1363 ; CHECK-SSE-NEXT: movd %eax, %xmm0
1364 ; CHECK-SSE-NEXT: retq
1365 ;
1366 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt:
1367 ; CHECK-AVX: # %bb.0:
1368 ; CHECK-AVX-NEXT: andl $31, %edi
1369 ; CHECK-AVX-NEXT: shll $23, %edi
1370 ; CHECK-AVX-NEXT: movl $-1115684864, %eax # imm = 0xBD800000
1371 ; CHECK-AVX-NEXT: subl %edi, %eax
1372 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
1373 ; CHECK-AVX-NEXT: retq
1374 %cnt = and i64 %cnt_in, 31
1375 %shl = shl i64 8, %cnt
1376 %conv = sitofp i64 %shl to float
1377 %mul = fdiv float -0.500000e+00, %conv
1378 ret float %mul
1379 }
1381 define half @fdiv_pow_shl_cnt_fail_out_of_bounds(i32 %cnt) nounwind {
1382 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1383 ; CHECK-SSE: # %bb.0:
1384 ; CHECK-SSE-NEXT: pushq %rax
1385 ; CHECK-SSE-NEXT: movl %edi, %ecx
1386 ; CHECK-SSE-NEXT: movl $1, %eax
1387 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1388 ; CHECK-SSE-NEXT: shll %cl, %eax
1389 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm0
1390 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1391 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1392 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1393 ; CHECK-SSE-NEXT: divss %xmm0, %xmm1
1394 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
1395 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1396 ; CHECK-SSE-NEXT: popq %rax
1397 ; CHECK-SSE-NEXT: retq
1398 ;
1399 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1400 ; CHECK-AVX2: # %bb.0:
1401 ; CHECK-AVX2-NEXT: pushq %rax
1402 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1403 ; CHECK-AVX2-NEXT: movl $1, %eax
1404 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1405 ; CHECK-AVX2-NEXT: shll %cl, %eax
1406 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1407 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1408 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1409 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1410 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1411 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1412 ; CHECK-AVX2-NEXT: popq %rax
1413 ; CHECK-AVX2-NEXT: retq
1414 ;
1415 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1416 ; CHECK-NO-FASTFMA: # %bb.0:
1417 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1418 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1419 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1420 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1421 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1422 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1423 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %xmm0
1424 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1425 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1426 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1427 ; CHECK-NO-FASTFMA-NEXT: vmovd %xmm0, %eax
1428 ; CHECK-NO-FASTFMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1429 ; CHECK-NO-FASTFMA-NEXT: retq
1430 ;
1431 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bounds:
1432 ; CHECK-FMA: # %bb.0:
1433 ; CHECK-FMA-NEXT: movl $1, %eax
1434 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1435 ; CHECK-FMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1436 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1437 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %xmm0
1438 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
1439 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1440 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1441 ; CHECK-FMA-NEXT: vmovd %xmm0, %eax
1442 ; CHECK-FMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1443 ; CHECK-FMA-NEXT: retq
1444 %shl = shl nuw i32 1, %cnt
1445 %conv = uitofp i32 %shl to half
1446 %mul = fdiv half 0xH7000, %conv
1447 ret half %mul
1448 }
1450 define half @fdiv_pow_shl_cnt_in_bounds(i16 %cnt) nounwind {
1451 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds:
1452 ; CHECK-SSE: # %bb.0:
1453 ; CHECK-SSE-NEXT: shll $10, %edi
1454 ; CHECK-SSE-NEXT: movl $28672, %eax # imm = 0x7000
1455 ; CHECK-SSE-NEXT: subl %edi, %eax
1456 ; CHECK-SSE-NEXT: pinsrw $0, %eax, %xmm0
1457 ; CHECK-SSE-NEXT: retq
1458 ;
1459 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds:
1460 ; CHECK-AVX: # %bb.0:
1461 ; CHECK-AVX-NEXT: shll $10, %edi
1462 ; CHECK-AVX-NEXT: movl $28672, %eax # imm = 0x7000
1463 ; CHECK-AVX-NEXT: subl %edi, %eax
1464 ; CHECK-AVX-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1465 ; CHECK-AVX-NEXT: retq
1466 %shl = shl nuw i16 1, %cnt
1467 %conv = uitofp i16 %shl to half
1468 %mul = fdiv half 0xH7000, %conv
1469 ret half %mul
1470 }
1472 define half @fdiv_pow_shl_cnt_in_bounds2(i16 %cnt) nounwind {
1473 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_in_bounds2:
1474 ; CHECK-SSE: # %bb.0:
1475 ; CHECK-SSE-NEXT: shll $10, %edi
1476 ; CHECK-SSE-NEXT: movl $18432, %eax # imm = 0x4800
1477 ; CHECK-SSE-NEXT: subl %edi, %eax
1478 ; CHECK-SSE-NEXT: pinsrw $0, %eax, %xmm0
1479 ; CHECK-SSE-NEXT: retq
1480 ;
1481 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt_in_bounds2:
1482 ; CHECK-AVX: # %bb.0:
1483 ; CHECK-AVX-NEXT: shll $10, %edi
1484 ; CHECK-AVX-NEXT: movl $18432, %eax # imm = 0x4800
1485 ; CHECK-AVX-NEXT: subl %edi, %eax
1486 ; CHECK-AVX-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1487 ; CHECK-AVX-NEXT: retq
1488 %shl = shl nuw i16 1, %cnt
1489 %conv = uitofp i16 %shl to half
1490 %mul = fdiv half 0xH4800, %conv
1491 ret half %mul
1492 }
1494 define half @fdiv_pow_shl_cnt_fail_out_of_bound2(i16 %cnt) nounwind {
1495 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1496 ; CHECK-SSE: # %bb.0:
1497 ; CHECK-SSE-NEXT: pushq %rax
1498 ; CHECK-SSE-NEXT: movl %edi, %ecx
1499 ; CHECK-SSE-NEXT: movl $1, %eax
1500 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1501 ; CHECK-SSE-NEXT: shll %cl, %eax
1502 ; CHECK-SSE-NEXT: movzwl %ax, %eax
1503 ; CHECK-SSE-NEXT: cvtsi2ss %eax, %xmm0
1504 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1505 ; CHECK-SSE-NEXT: callq __extendhfsf2@PLT
1506 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1507 ; CHECK-SSE-NEXT: divss %xmm0, %xmm1
1508 ; CHECK-SSE-NEXT: movaps %xmm1, %xmm0
1509 ; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
1510 ; CHECK-SSE-NEXT: popq %rax
1511 ; CHECK-SSE-NEXT: retq
1512 ;
1513 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1514 ; CHECK-AVX2: # %bb.0:
1515 ; CHECK-AVX2-NEXT: pushq %rax
1516 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1517 ; CHECK-AVX2-NEXT: movl $1, %eax
1518 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1519 ; CHECK-AVX2-NEXT: shll %cl, %eax
1520 ; CHECK-AVX2-NEXT: movzwl %ax, %eax
1521 ; CHECK-AVX2-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1522 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1523 ; CHECK-AVX2-NEXT: callq __extendhfsf2@PLT
1524 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1525 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1526 ; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
1527 ; CHECK-AVX2-NEXT: popq %rax
1528 ; CHECK-AVX2-NEXT: retq
1529 ;
1530 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1531 ; CHECK-NO-FASTFMA: # %bb.0:
1532 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1533 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1534 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1535 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1536 ; CHECK-NO-FASTFMA-NEXT: movzwl %ax, %eax
1537 ; CHECK-NO-FASTFMA-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1538 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1539 ; CHECK-NO-FASTFMA-NEXT: vcvtph2ps %xmm0, %xmm0
1540 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1541 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1542 ; CHECK-NO-FASTFMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1543 ; CHECK-NO-FASTFMA-NEXT: vmovd %xmm0, %eax
1544 ; CHECK-NO-FASTFMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1545 ; CHECK-NO-FASTFMA-NEXT: retq
1546 ;
1547 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt_fail_out_of_bound2:
1548 ; CHECK-FMA: # %bb.0:
1549 ; CHECK-FMA-NEXT: movl $1, %eax
1550 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1551 ; CHECK-FMA-NEXT: movzwl %ax, %eax
1552 ; CHECK-FMA-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
1553 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1554 ; CHECK-FMA-NEXT: vcvtph2ps %xmm0, %xmm0
1555 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [2.0E+0,0.0E+0,0.0E+0,0.0E+0]
1556 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1557 ; CHECK-FMA-NEXT: vcvtps2ph $4, %xmm0, %xmm0
1558 ; CHECK-FMA-NEXT: vmovd %xmm0, %eax
1559 ; CHECK-FMA-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
1560 ; CHECK-FMA-NEXT: retq
1561 %shl = shl nuw i16 1, %cnt
1562 %conv = uitofp i16 %shl to half
1563 %mul = fdiv half 0xH4000, %conv
1564 ret half %mul
1565 }
1567 define double @fdiv_pow_shl_cnt32_to_dbl_okay(i32 %cnt) nounwind {
1568 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:
1569 ; CHECK-SSE: # %bb.0:
1570 ; CHECK-SSE-NEXT: # kill: def $edi killed $edi def $rdi
1571 ; CHECK-SSE-NEXT: shlq $52, %rdi
1572 ; CHECK-SSE-NEXT: movabsq $3936146074321813504, %rax # imm = 0x36A0000000000000
1573 ; CHECK-SSE-NEXT: subq %rdi, %rax
1574 ; CHECK-SSE-NEXT: movq %rax, %xmm0
1575 ; CHECK-SSE-NEXT: retq
1576 ;
1577 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_to_dbl_okay:
1578 ; CHECK-AVX: # %bb.0:
1579 ; CHECK-AVX-NEXT: # kill: def $edi killed $edi def $rdi
1580 ; CHECK-AVX-NEXT: shlq $52, %rdi
1581 ; CHECK-AVX-NEXT: movabsq $3936146074321813504, %rax # imm = 0x36A0000000000000
1582 ; CHECK-AVX-NEXT: subq %rdi, %rax
1583 ; CHECK-AVX-NEXT: vmovq %rax, %xmm0
1584 ; CHECK-AVX-NEXT: retq
1585 %shl = shl nuw i32 1, %cnt
1586 %conv = uitofp i32 %shl to double
1587 %mul = fdiv double 0x36A0000000000000, %conv
1588 ret double %mul
1589 }
1591 define float @fdiv_pow_shl_cnt32_out_of_bounds2(i32 %cnt) nounwind {
1592 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1593 ; CHECK-SSE: # %bb.0:
1594 ; CHECK-SSE-NEXT: movl %edi, %ecx
1595 ; CHECK-SSE-NEXT: movl $1, %eax
1596 ; CHECK-SSE-NEXT: # kill: def $cl killed $cl killed $ecx
1597 ; CHECK-SSE-NEXT: shll %cl, %eax
1598 ; CHECK-SSE-NEXT: cvtsi2ss %rax, %xmm1
1599 ; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1600 ; CHECK-SSE-NEXT: divss %xmm1, %xmm0
1601 ; CHECK-SSE-NEXT: retq
1602 ;
1603 ; CHECK-AVX2-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1604 ; CHECK-AVX2: # %bb.0:
1605 ; CHECK-AVX2-NEXT: movl %edi, %ecx
1606 ; CHECK-AVX2-NEXT: movl $1, %eax
1607 ; CHECK-AVX2-NEXT: # kill: def $cl killed $cl killed $ecx
1608 ; CHECK-AVX2-NEXT: shll %cl, %eax
1609 ; CHECK-AVX2-NEXT: vcvtsi2ss %rax, %xmm0, %xmm0
1610 ; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1611 ; CHECK-AVX2-NEXT: vdivss %xmm0, %xmm1, %xmm0
1612 ; CHECK-AVX2-NEXT: retq
1613 ;
1614 ; CHECK-NO-FASTFMA-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1615 ; CHECK-NO-FASTFMA: # %bb.0:
1616 ; CHECK-NO-FASTFMA-NEXT: movl %edi, %ecx
1617 ; CHECK-NO-FASTFMA-NEXT: movl $1, %eax
1618 ; CHECK-NO-FASTFMA-NEXT: # kill: def $cl killed $cl killed $ecx
1619 ; CHECK-NO-FASTFMA-NEXT: shll %cl, %eax
1620 ; CHECK-NO-FASTFMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1621 ; CHECK-NO-FASTFMA-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1622 ; CHECK-NO-FASTFMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1623 ; CHECK-NO-FASTFMA-NEXT: retq
1624 ;
1625 ; CHECK-FMA-LABEL: fdiv_pow_shl_cnt32_out_of_bounds2:
1626 ; CHECK-FMA: # %bb.0:
1627 ; CHECK-FMA-NEXT: movl $1, %eax
1628 ; CHECK-FMA-NEXT: shlxl %edi, %eax, %eax
1629 ; CHECK-FMA-NEXT: vcvtusi2ss %eax, %xmm0, %xmm0
1630 ; CHECK-FMA-NEXT: vmovss {{.*#+}} xmm1 = [1.00974148E-28,0.0E+0,0.0E+0,0.0E+0]
1631 ; CHECK-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
1632 ; CHECK-FMA-NEXT: retq
1633 %shl = shl nuw i32 1, %cnt
1634 %conv = uitofp i32 %shl to float
1635 %mul = fdiv float 0x3a1fffff00000000, %conv
1636 ret float %mul
1637 }
1639 define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind {
1640 ; CHECK-SSE-LABEL: fdiv_pow_shl_cnt32_okay:
1641 ; CHECK-SSE: # %bb.0:
1642 ; CHECK-SSE-NEXT: shll $23, %edi
1643 ; CHECK-SSE-NEXT: movl $285212672, %eax # imm = 0x11000000
1644 ; CHECK-SSE-NEXT: subl %edi, %eax
1645 ; CHECK-SSE-NEXT: movd %eax, %xmm0
1646 ; CHECK-SSE-NEXT: retq
1647 ;
1648 ; CHECK-AVX-LABEL: fdiv_pow_shl_cnt32_okay:
1649 ; CHECK-AVX: # %bb.0:
1650 ; CHECK-AVX-NEXT: shll $23, %edi
1651 ; CHECK-AVX-NEXT: movl $285212672, %eax # imm = 0x11000000
1652 ; CHECK-AVX-NEXT: subl %edi, %eax
1653 ; CHECK-AVX-NEXT: vmovd %eax, %xmm0
1654 ; CHECK-AVX-NEXT: retq
1655 %shl = shl nuw i32 1, %cnt
1656 %conv = uitofp i32 %shl to float
1657 %mul = fdiv float 0x3a20000000000000, %conv
1658 ret float %mul
1659 }