1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
4 define i1 @foo(i32 %i) optsize {
7 ; CHECK-NEXT: notl %edi
8 ; CHECK-NEXT: testl $305419896, %edi # imm = 0x12345678
11 %and = and i32 %i, 305419896
12 %cmp = icmp eq i32 %and, 305419896
16 define i1 @foo_pgso(i32 %i) !prof !14 {
17 ; CHECK-LABEL: foo_pgso:
19 ; CHECK-NEXT: notl %edi
20 ; CHECK-NEXT: testl $305419896, %edi # imm = 0x12345678
21 ; CHECK-NEXT: sete %al
23 %and = and i32 %i, 305419896
24 %cmp = icmp eq i32 %and, 305419896
28 ; 8-bit ALU immediates probably have small encodings.
29 ; We do not want to hoist the constant into a register here.
31 define zeroext i1 @g(i32 %x) optsize {
34 ; CHECK-NEXT: testl $-2, %edi
35 ; CHECK-NEXT: sete %al
38 %t1 = icmp eq i32 %t0, 1
42 ; 8-bit ALU immediates probably have small encodings.
43 ; We do not want to hoist the constant into a register here.
45 define i64 @PR46237(i64 %x, i64 %y, i64 %z) optsize {
46 ; CHECK-LABEL: PR46237:
48 ; CHECK-NEXT: movl %edx, %eax
49 ; CHECK-NEXT: shll $6, %eax
50 ; CHECK-NEXT: movzbl %al, %ecx
51 ; CHECK-NEXT: andl $7, %esi
52 ; CHECK-NEXT: andl $7, %edx
53 ; CHECK-NEXT: leaq (%rdx,%rsi,8), %rax
54 ; CHECK-NEXT: orq %rcx, %rax
57 %shl = and i64 %and, 192
59 %shl2 = and i64 %and1, 56
61 %or = or i64 %and3, %shl2
62 %or4 = or i64 %or, %shl
66 !llvm.module.flags = !{!0}
67 !0 = !{i32 1, !"ProfileSummary", !1}
68 !1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
69 !2 = !{!"ProfileFormat", !"InstrProf"}
70 !3 = !{!"TotalCount", i64 10000}
71 !4 = !{!"MaxCount", i64 10}
72 !5 = !{!"MaxInternalCount", i64 1}
73 !6 = !{!"MaxFunctionCount", i64 1000}
74 !7 = !{!"NumCounts", i64 3}
75 !8 = !{!"NumFunctions", i64 3}
76 !9 = !{!"DetailedSummary", !10}
77 !10 = !{!11, !12, !13}
78 !11 = !{i32 10000, i64 100, i32 1}
79 !12 = !{i32 999000, i64 100, i32 1}
80 !13 = !{i32 999999, i64 1, i32 2}
81 !14 = !{!"function_entry_count", i64 0}